专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07257793B2 Information display system and information display method 有权
标题翻译：信息显示系统和信息显示方式
公开(公告)号：US07257793B2
公开(公告)日：2007-08-14
申请号：US10948549
申请日：2004-09-24
申请人： Motochika Okano , Kazushi Ikeda , Kazuyuki Matsuda
发明人： Motochika Okano , Kazushi Ikeda , Kazuyuki Matsuda
IPC分类号： G06F17/50 , G06F9/455
CPC分类号： G06F17/5045 , G06F17/5068
摘要： An information display method includes converting circuit diagram CAD data of a circuit board into a first standard format and converting layout diagram CAD data of the circuit board into a second standard format, displaying a circuit diagram based on the circuit diagram CAD data converted into the first standard format on a screen of a circuit-diagram viewer and displaying a layout diagram based on the layout diagram CAD data converted into the second standard format on a screen of a layout-diagram viewer, highlighting a circuit element selected on the screen of either the circuit-diagram viewer or the layout-diagram viewer using specified color, and giving information for identifying the circuit element selected on the screen to another viewer, and highlighting an element corresponding to the circuit element identified by the given information on the screen of the viewer receiving the information using specified color.
摘要翻译：信息显示方法包括将电路板的CAD数据转换为第一标准格式并将电路板的CAD数据的布局图转换为第二标准格式，显示基于电路图的电路图，CAD数据被转换成第一标准格式标准格式，并且在布局图观察者的屏幕上显示基于转换成第二标准格式的布局图的CAD数据的布局图，突出显示在屏幕上选择的电路元件电路图查看器或使用指定颜色的布局图查看器，并且给出用于将屏幕上选择的电路元件识别给另一观看者的信息，并且突出显示与由观看者的屏幕上的给定信息识别的电路元件相对应的元件使用指定的颜色接收信息。

2. 发明申请

US20050091626A1 Information display system and information display method 有权
标题翻译：信息显示系统和信息显示方式
公开(公告)号：US20050091626A1
公开(公告)日：2005-04-28
申请号：US10948549
申请日：2004-09-24
申请人： Motochika Okano , Kazushi Ikeda , Kazuyuki Matsuda
发明人： Motochika Okano , Kazushi Ikeda , Kazuyuki Matsuda
IPC分类号： G06F17/50 , G06F3/00 , G06F3/048 , G06F9/455
CPC分类号： G06F17/5045 , G06F17/5068
摘要： An information display method includes converting circuit diagram CAD data of a circuit board into a first standard format and converting layout diagram CAD data of the circuit board into a second standard format, displaying a circuit diagram based on the circuit diagram CAD data converted into the first standard format on a screen of a circuit-diagram viewer and displaying a layout diagram based on the layout diagram CAD data converted into the second standard format on a screen of a layout-diagram viewer, highlighting a circuit element selected on the screen of either the circuit-diagram viewer or the layout-diagram viewer using specified color, and giving information for identifying the circuit element selected on the screen to another viewer, and highlighting an element corresponding to the circuit element identified by the given information on the screen of the viewer receiving the information using specified color.
摘要翻译：信息显示方法包括将电路板的CAD数据转换为第一标准格式并将电路板的CAD数据的布局图转换为第二标准格式，显示基于电路图的电路图，CAD数据被转换成第一标准格式标准格式，并且在布局图观察者的屏幕上显示基于转换成第二标准格式的布局图的CAD数据的布局图，突出显示在屏幕上选择的电路元件电路图查看器或使用指定颜色的布局图查看器，并且给出用于将屏幕上选择的电路元件识别给另一观看者的信息，并且突出显示与由观看者的屏幕上的给定信息识别的电路元件相对应的元件使用指定的颜色接收信息。

3. 发明授权

US07418687B2 Information processing apparatus and information display method 失效
标题翻译：信息处理装置和信息显示方法
公开(公告)号：US07418687B2
公开(公告)日：2008-08-26
申请号：US11168330
申请日：2005-06-29
申请人： Motochika Okano , Kazushi Ikeda
发明人： Motochika Okano , Kazushi Ikeda
IPC分类号： G06F17/50 , G06F9/455 , H03K17/693
CPC分类号： G06F17/5036 , G06F17/5077
摘要： An information processing apparatus includes: an input unit; a storing unit configured to store wiring layout information and layer configuration information of a multilayer printed circuit board; a layout displaying unit configured to display a wiring layout drawing based on the wiring layout information; a clipping position specifying unit configured to specify a clipping position on the displayed wiring layout drawing in response to user's operation of the input unit; and a cross section displaying unit configured to display a cross section indicating a cross-sectional structure of the wiring layout of the multilayer printed circuit board along the specified clipping position on the display based on the wiring layout information and the layer configuration information.
摘要翻译：一种信息处理装置，包括：输入单元; 存储单元，被配置为存储多层印刷电路板的布线布局信息和层配置信息; 布局显示单元，被配置为基于布线布局信息显示布线布局图; 剪辑位置指定单元，被配置为响应于用户对输入单元的操作来指定显示的布线布局图上的剪切位置; 以及横截面显示单元，其被配置为基于布线布局信息和层配置信息，在指示的剪切位置上显示表示多层印刷电路板的布线布局的横截面结构的横截面。

4. 发明申请

US20060002215A1 Information processing apparatus and information display method 失效
标题翻译：信息处理装置和信息显示方法
公开(公告)号：US20060002215A1
公开(公告)日：2006-01-05
申请号：US11168330
申请日：2005-06-29
申请人： Motochika Okano , Kazushi Ikeda
发明人： Motochika Okano , Kazushi Ikeda
IPC分类号： G11C7/02
CPC分类号： G06F17/5036 , G06F17/5077
摘要： An information processing apparatus includes: an input unit; a storing unit configured to store wiring layout information and layer configuration information of a multilayer printed circuit board; a layout displaying unit configured to display a wiring layout drawing based on the wiring layout information; a clipping position specifying unit configured to specify a clipping position on the displayed wiring layout drawing in response to user's operation of the input unit; and a cross section displaying unit configured to display a cross section indicating a cross-sectional structure of the wiring layout of the multilayer printed circuit board along the specified clipping position on the display based on the wiring layout information and the layer configuration information.
摘要翻译：一种信息处理装置，包括：输入单元; 存储单元，被配置为存储多层印刷电路板的布线布局信息和层配置信息; 布局显示单元，被配置为基于布线布局信息显示布线布局图; 剪辑位置指定单元，被配置为响应于用户对输入单元的操作来指定显示的布线布局图上的剪切位置; 以及横截面显示单元，其被配置为基于布线布局信息和层配置信息，在指示的剪切位置上显示表示多层印刷电路板的布线布局的横截面结构的横截面。

5. 发明授权

US07843703B2 Multilayer printed circuit board 失效
标题翻译：多层印刷电路板
公开(公告)号：US07843703B2
公开(公告)日：2010-11-30
申请号：US12350117
申请日：2009-01-07
申请人： Motochika Okano
发明人： Motochika Okano
IPC分类号： H05K1/11 , H05K1/14
CPC分类号： H05K1/0234 , H05K1/0298 , H05K3/0005 , H05K2201/09236 , H05K2201/09354 , H05K2201/10022 , H05K2201/10446
摘要： According to one embodiment, a multilayer printed circuit board having a plurality of wiring layers and an electronic component mounted thereon, includes a spiral wire including a path in a substantial spiral shape configured with a printed wire section of a substantial loop shape provided on each of at least two wiring layers of the plurality of wiring layers, and a plug provided on each wiring layer arranged between a top wiring layer which is a wiring layer on a top on which the printed wire section of a substantial loop shape is provided and a bottom wiring layer which is a wiring layer on a bottom on which the printed wire section of a substantial loop shape is provided.
摘要翻译：根据一个实施例，具有多个布线层和安装在其上的电子部件的多层印刷电路板包括螺旋线，其包括大致螺旋形状的路径，其构造为具有基本上环形的印刷线段，所述多个布线层中的至少两个布线层以及布置在布置在顶部布线层之间的布线层上的插塞，所述顶部布线层是设置有实质环形的印刷线路部分的顶部上的布线层和底部布线层，其是设置有实质环状的印刷线路部分的底部上的布线层。

6. 发明申请

US20090296362A1 Multilayer Printed Circuit Board, and Design Method of Multilayer Printed Circuit Board 失效
标题翻译：多层印刷电路板和多层印刷电路板的设计方法
公开(公告)号：US20090296362A1
公开(公告)日：2009-12-03
申请号：US12350117
申请日：2009-01-07
申请人： Motochika Okano
发明人： Motochika Okano
IPC分类号： H05K1/11
CPC分类号： H05K1/0234 , H05K1/0298 , H05K3/0005 , H05K2201/09236 , H05K2201/09354 , H05K2201/10022 , H05K2201/10446
摘要： According to one embodiment, a multilayer printed circuit board having a plurality of wiring layers and an electronic component mounted thereon, includes a spiral wire including a path in a substantial spiral shape configured with a printed wire section of a substantial loop shape provided on each of at least two wiring layers of the plurality of wiring layers, and a plug provided on each wiring layer arranged between a top wiring layer which is a wiring layer on a top on which the printed wire section of a substantial loop shape is provided and a bottom wiring layer which is a wiring layer on a bottom on which the printed wire section of a substantial loop shape is provided.
摘要翻译：根据一个实施例，具有多个布线层和安装在其上的电子部件的多层印刷电路板包括螺旋线，其包括大致螺旋形状的路径，其构造为具有基本上环形的印刷线段，所述多个布线层中的至少两个布线层以及布置在布置在顶部布线层之间的布线层上的插塞，所述顶部布线层是设置有实质环形的印刷线路部分的顶部上的布线层和底部布线层，其是设置有实质环状的印刷线路部分的底部上的布线层。

7. 发明申请

US20110055795A1 Design Support Apparatus and Design Support Method 有权
标题翻译：设计支持设备和设计支持方法
公开(公告)号：US20110055795A1
公开(公告)日：2011-03-03
申请号：US12845410
申请日：2010-07-28
申请人： Motochika Okano
发明人： Motochika Okano
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： According to one embodiment, a design support apparatus determines one of a first impedance between a power plane and a ground plane in the printed circuit board at an ON time of a high-side transistor in the switching power supply, a second impedance between the power plane and the ground plane at an ON time of a low-side transistor in the switching power supply, and a third impedance in an intermediate range between the first impedance and the second impedance to be an impedance between the power plane and the ground plane, based on ON-time information indicative of a ratio of an ON period of the high-side transistor to a switching cycle of the switching power supply in an operation period of the device. The apparatus evaluates capacitor information included in design information of the printed circuit by comparing the determined impedance and a target impedance.
摘要翻译：根据一个实施例，设计支持装置在开关电源中的高侧晶体管的导通时间确定印刷电路板中的电源平面和接地平面之间的第一阻抗之一，功率之间的第二阻抗在开关电源中的低侧晶体管的导通时间和第一阻抗与第二阻抗之间的中间范围内的第三阻抗成为电源面和接地面之间的阻抗的第三阻抗，基于在设备的操作周期中指示高侧晶体管的导通周期与开关电源的开关周期的比率的接通时间信息。该装置通过比较确定的阻抗和目标阻抗来评估包括在印刷电路的设计信息中的电容器信息。

8. 发明授权

US07593213B2 Capacitor arrangement support system, capacitor arrangement method and program 失效
标题翻译：电容器布置支持系统，电容器布置方法和程序
公开(公告)号：US07593213B2
公开(公告)日：2009-09-22
申请号：US12183467
申请日：2008-07-31
申请人： Motochika Okano
发明人： Motochika Okano
IPC分类号： H01G4/00
CPC分类号： H05K3/0005 , G06F17/5036 , G06F17/5068 , H05K1/0231
摘要： According to one embodiment, a capacitor arrangement support system includes a resonance analysis module configured to perform a resonance analysis based on data of a component producing electromagnetic radiation, a resonance point extraction module configured to extract a resonance point from an analysis result of the resonance analysis module, an electromagnetically radiated energy analysis module configured to analyze the ease of collection of electromagnetically radiated energy with respect to a resonance point extracted by the resonance point extraction module, a determination module configured to determine whether or not an absolute value of a value showing the ease of collection of electromagnetically radiated energy is larger than a preset absolute value, and a capacitor arrangement module configured to arrange a capacitor for suppressing electromagnetic radiation at a resonance point where the determination module determines that data of the component is larger the preset absolute value.
摘要翻译：根据一个实施例，一种电容器布置支撑系统包括谐振分析模块，其被配置为基于产生电磁辐射的分量的数据执行谐振分析;谐振点提取模块，被配置为从谐振分析的分析结果中提取谐振点模块，电磁辐射能量分析模块，其被配置为分析相对于由所述谐振点提取模块提取的谐振点的电磁辐射能量的收集的容易性;确定模块，被配置为确定是否显示所述谐振点提取模块的值的绝对值容易收集电磁辐射能量大于预设的绝对值，电容器配置模块被配置为布置用于抑制电磁辐射的电容器，该谐振点在确定模块确定组件的数据大于预设的绝对值琵琶值。

9. 发明申请

US20090059549A1 CAPACITOR ARRANGEMENT SUPPORT SYSTEM, CAPACITOR ARRANGEMENT METHOD AND PROGRAM 失效
标题翻译：电容器布置支持系统，电容器布置方法和程序
公开(公告)号：US20090059549A1
公开(公告)日：2009-03-05
申请号：US12183467
申请日：2008-07-31
申请人： Motochika Okano
发明人： Motochika Okano
IPC分类号： H05K9/00
CPC分类号： H05K3/0005 , G06F17/5036 , G06F17/5068 , H05K1/0231
摘要： According to one embodiment, a capacitor arrangement support system includes a resonance analysis module configured to perform a resonance analysis based on data of a component producing electromagnetic radiation, a resonance point extraction module configured to extract a resonance point from an analysis result of the resonance analysis module, an electromagnetically radiated energy analysis module configured to analyze the ease of collection of electromagnetically radiated energy with respect to a resonance point extracted by the resonance point extraction module, a determination module configured to determine whether or not an absolute value of a value showing the ease of collection of electromagnetically radiated energy is larger than a preset absolute value, and a capacitor arrangement module configured to arrange a capacitor for suppressing electromagnetic radiation at a resonance point where the determination module determines that data of the component is larger the preset absolute value.
摘要翻译：根据一个实施例，一种电容器布置支撑系统包括谐振分析模块，其被配置为基于产生电磁辐射的分量的数据执行谐振分析;谐振点提取模块，被配置为从谐振分析的分析结果中提取谐振点模块，电磁辐射能量分析模块，其被配置为分析相对于由所述谐振点提取模块提取的谐振点的电磁辐射能量的收集的容易性;确定模块，被配置为确定是否显示所述谐振点提取模块的值的绝对值容易收集电磁辐射能量大于预设的绝对值，电容器配置模块被配置为布置用于抑制电磁辐射的电容器，该谐振点在确定模块确定组件的数据大于预设的绝对值琵琶值。

10. 发明授权

US08146049B2 Support apparatus and design support method 有权
标题翻译：支持设备和设计支持方式
公开(公告)号：US08146049B2
公开(公告)日：2012-03-27
申请号：US12845410
申请日：2010-07-28
申请人： Motochika Okano
发明人： Motochika Okano
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： According to one embodiment, a design support apparatus determines one of a first impedance between a power plane and a ground plane in the printed circuit board at an ON time of a high-side transistor in the switching power supply, a second impedance between the power plane and the ground plane at an ON time of a low-side transistor in the switching power supply, and a third impedance in an intermediate range between the first impedance and the second impedance to be an impedance between the power plane and the ground plane, based on ON-time information indicative of a ratio of an ON period of the high-side transistor to a switching cycle of the switching power supply in an operation period of the device. The apparatus evaluates capacitor information included in design information of the printed circuit by comparing the determined impedance and a target impedance.
摘要翻译：根据一个实施例，设计支持装置在开关电源中的高侧晶体管的导通时间确定印刷电路板中的电源平面和接地平面之间的第一阻抗之一，功率之间的第二阻抗在开关电源中的低侧晶体管的导通时间和第一阻抗与第二阻抗之间的中间范围内的第三阻抗成为电源面和接地面之间的阻抗的第三阻抗，基于在设备的操作周期中指示高侧晶体管的导通周期与开关电源的开关周期的比率的接通时间信息。该装置通过比较确定的阻抗和目标阻抗来评估包括在印刷电路的设计信息中的电容器信息。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式