专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08988401B2 Display device and method of driving the same 有权
标题翻译：显示装置及其驱动方法
公开(公告)号：US08988401B2
公开(公告)日：2015-03-24
申请号：US13252010
申请日：2011-10-03
申请人： Moon-Sang Hwang , Won-Jun Choe , Sang-Soo Kim
发明人： Moon-Sang Hwang , Won-Jun Choe , Sang-Soo Kim
IPC分类号： G09G3/00 , G09G5/00 , G09G3/20 , H04N13/04
CPC分类号： G09G5/003 , G09G3/2092 , G09G2370/08 , H04N13/341
摘要： A display device is disclosed. According to some aspects, the display device includes a display panel for displaying an image, data drivers for supplying data signals to the display panel such that the display panel displays an image, and a timing controller for setting the data drivers and 3n (where n is a natural number) ports. The display device is configured to transmit an R transmission signal including R data bits, a G transmission signal including G data bits, and a B transmission signal including B data bits to the data drivers through the 3n ports. According to some aspects, a display device capable of securing a band width required for driving a three dimensional image without unnecessarily increasing ports and without increasing the transmission speed of the ports and a method of driving the same are disclosed.
摘要翻译：公开了一种显示装置。根据一些方面，显示装置包括用于显示图像的显示面板，用于向显示面板提供数据信号的数据驱动器，使得显示面板显示图像;以及定时控制器，用于设置数据驱动器和3n（其中n 是一个自然数）端口。显示装置被配置为通过3n个端口向数据驱动器发送包括R个数据位的R发送信号，包括G个数据位的G发送信号和包括B个数据位的B个发送信号。根据一些方面，公开了一种能够确保驱动三维图像所需的带宽而不必增加端口而不增加端口的传输速度的显示装置及其驱动方法。

2. 发明申请

US20120256972A1 DISPLAY DEVICE AND METHOD OF DRIVING THE SAME 有权
标题翻译：显示装置及其驱动方法
公开(公告)号：US20120256972A1
公开(公告)日：2012-10-11
申请号：US13252010
申请日：2011-10-03
申请人： Moon-Sang Hwang , Won-Jun Choe , Sang-Soo Kim
发明人： Moon-Sang Hwang , Won-Jun Choe , Sang-Soo Kim
IPC分类号： G09G5/10 , G09G5/00
CPC分类号： G09G5/003 , G09G3/2092 , G09G2370/08 , H04N13/341
摘要： A display device is disclosed. According to some aspects, the display device includes a display panel for displaying an image, data drivers for supplying data signals to the display panel such that the display panel displays an image, and a timing controller for setting the data drivers and 3n (where n is a natural number) ports. The display device is configured to transmit an R transmission signal including R data bits, a G transmission signal including G data bits, and a B transmission signal including B data bits to the data drivers through the 3n ports. According to some aspects, a display device capable of securing a band width required for driving a three dimensional image without unnecessarily increasing ports and without increasing the transmission speed of the ports and a method of driving the same are disclosed.
摘要翻译：公开了一种显示装置。根据一些方面，显示装置包括用于显示图像的显示面板，用于向显示面板提供数据信号的数据驱动器，使得显示面板显示图像;以及定时控制器，用于设置数据驱动器和3n（其中n 是一个自然数）端口。显示装置被配置为通过3n个端口向数据驱动器发送包括R个数据位的R发送信号，包括G个数据位的G发送信号和包括B个数据位的B个发送信号。根据一些方面，公开了一种能够确保驱动三维图像所需的带宽而不必增加端口而不增加端口的传输速度的显示装置及其驱动方法。

3. 发明申请

US20120206185A1 LEVEL-DOWN SHIFTER 有权
标题翻译：水平下降
公开(公告)号：US20120206185A1
公开(公告)日：2012-08-16
申请号：US13357654
申请日：2012-01-25
申请人： Moon-Sang Hwang , Won-Jun Choe , Hyun-Chang Kim , Deog-Kyoon Jeong
发明人： Moon-Sang Hwang , Won-Jun Choe , Hyun-Chang Kim , Deog-Kyoon Jeong
IPC分类号： H03L5/00
CPC分类号： H03K19/018528
摘要： A level-down shifter includes: a first load device between a first voltage and a first node; a second load device between the first voltage and a second node; a first input device between the first node and a third node, receiving a reference voltage signal, and adjusting a first node voltage of the first node based on the reference voltage signal; a second input device between the second node and the third node, receiving an input signal, and adjusting a second node voltage of the second node based on the input signal; and a current source between a second voltage and the third node, receiving the second node voltage of the second node, and adjusting a third node voltage of the third node and a bias current based on the second node voltage of the second node, wherein a level of the input signal is higher than the first voltage.
摘要翻译：电平降低移位器包括：第一电压和第一节点之间的第一负载装置; 在所述第一电压和第二节点之间的第二负载装置; 在所述第一节点和第三节点之间的第一输入装置，接收参考电压信号，以及基于所述参考电压信号调整所述第一节点的第一节点电压; 在所述第二节点和所述第三节点之间的第二输入设备，接收输入信号，以及基于所述输入信号调整所述第二节点的第二节点电压; 以及第二电压和第三节点之间的电流源，接收第二节点的第二节点电压，以及基于第二节点的第二节点电压调整第三节点的第三节点电压和偏置电流，其中，输入信号的电平高于第一电压。

4. 发明授权

US08729937B2 Coarse lock detector 有权
标题翻译：粗锁检测器
公开(公告)号：US08729937B2
公开(公告)日：2014-05-20
申请号：US13398532
申请日：2012-02-16
申请人： Moon-Sang Hwang , Won-Jun Choe , Han-Kyu Chi , Deog-Kyoon Jeong
发明人： Moon-Sang Hwang , Won-Jun Choe , Han-Kyu Chi , Deog-Kyoon Jeong
IPC分类号： H03L7/00
CPC分类号： H03L7/095 , H03L7/0812 , H03L7/101
摘要： A coarse lock detector for a delayed locked loop (DLL) is disclosed. The coarse lock detector includes multiple detection cells. Each detection cell receives a delayed clock phase and an output of a previous detection cell as inputs. To increase time for the output of the previous detection cell to propagate, the detection cells are arranged in groups such that the output from the previous detection cell is generated by a detection cell which is more than one detection cell previous.
摘要翻译：公开了一种用于延迟锁定环（DLL）的粗略锁定检测器。粗锁检测器包括多个检测单元。每个检测单元接收延迟时钟相位和先前检测单元的输出作为输入。为了增加先前检测单元的输出的时间传播，检测单元被分组排列，使得来自先前检测单元的输出是由多于一个先前检测单元的检测单元生成的。

5. 发明申请

US20120206176A1 COARSE LOCK DETECTOR AND DELAY-LOCKED LOOP INCLUDING THE SAME 有权
标题翻译：包括锁定锁定检测器和延迟锁定环路
公开(公告)号：US20120206176A1
公开(公告)日：2012-08-16
申请号：US13398245
申请日：2012-02-16
申请人： Moon-Sang Hwang , Won-Jun Choe , Han-Kyu Chi , Deog-Kyoon Jeong
发明人： Moon-Sang Hwang , Won-Jun Choe , Han-Kyu Chi , Deog-Kyoon Jeong
IPC分类号： H03L7/08
CPC分类号： H03L7/0812 , H03L7/095 , H03L7/101
摘要： A coarse lock detector is disclosed. The course lock detector uses an initial lock range to determine course lock, and once course lock is achieved, uses a modified lock range to determine course lock.
摘要翻译：公开了一种粗锁检测器。课程锁定检测器使用初始锁定范围来确定课程锁定，并且一旦达到课程锁定，则使用修改的锁定范围来确定课程锁定。

6. 发明授权

US08829969B2 Level-down shifter 有权
标题翻译：降档移位器
公开(公告)号：US08829969B2
公开(公告)日：2014-09-09
申请号：US13357654
申请日：2012-01-25
申请人： Moon-Sang Hwang , Won-Jun Choe , Hyun-Chang Kim , Deog-Kyoon Jeong
发明人： Moon-Sang Hwang , Won-Jun Choe , Hyun-Chang Kim , Deog-Kyoon Jeong
IPC分类号： H03L5/00
CPC分类号： H03K19/018528
摘要： A level-down shifter includes: a first load device between a first voltage and a first node; a second load device between the first voltage and a second node; a first input device between the first node and a third node, receiving a reference voltage signal, and adjusting a first node voltage of the first node based on the reference voltage signal; a second input device between the second node and the third node, receiving an input signal, and adjusting a second node voltage of the second node based on the input signal; and a current source between a second voltage and the third node, receiving the second node voltage of the second node, and adjusting a third node voltage of the third node and a bias current based on the second node voltage of the second node, wherein a level of the input signal is higher than the first voltage.
摘要翻译：电平降低移位器包括：第一电压和第一节点之间的第一负载装置; 在所述第一电压和第二节点之间的第二负载装置; 在所述第一节点和第三节点之间的第一输入装置，接收参考电压信号，以及基于所述参考电压信号调整所述第一节点的第一节点电压; 在所述第二节点和所述第三节点之间的第二输入设备，接收输入信号，以及基于所述输入信号调整所述第二节点的第二节点电压; 以及第二电压和第三节点之间的电流源，接收第二节点的第二节点电压，以及基于第二节点的第二节点电压调整第三节点的第三节点电压和偏置电流，其中，输入信号的电平高于第一电压。

7. 发明授权

US08587355B2 Coarse lock detector and delay-locked loop including the same 有权
标题翻译：粗锁检测器和延迟锁定回路包括相同的
公开(公告)号：US08587355B2
公开(公告)日：2013-11-19
申请号：US13398245
申请日：2012-02-16
申请人： Moon-Sang Hwang , Won-Jun Choe , Han-Kyu Chi , Deog-Kyoon Jeong
发明人： Moon-Sang Hwang , Won-Jun Choe , Han-Kyu Chi , Deog-Kyoon Jeong
IPC分类号： H03L7/06
CPC分类号： H03L7/0812 , H03L7/095 , H03L7/101
摘要： A coarse lock detector is disclosed. The course lock detector uses an initial lock range to determine course lock, and once course lock is achieved, uses a modified lock range to determine course lock.
摘要翻译：公开了一种粗锁检测器。课程锁定检测器使用初始锁定范围来确定课程锁定，并且一旦达到课程锁定，则使用修改的锁定范围来确定课程锁定。

8. 发明申请

US20120212264A1 COARSE LOCK DETECTOR 有权
标题翻译：听力锁定检测器
公开(公告)号：US20120212264A1
公开(公告)日：2012-08-23
申请号：US13398532
申请日：2012-02-16
申请人： Moon-Sang Hwang , Won-Jun Choe , Han-Kyu Chi , Deog-Kyoon Jeong
发明人： Moon-Sang Hwang , Won-Jun Choe , Han-Kyu Chi , Deog-Kyoon Jeong
IPC分类号： H03L7/00
CPC分类号： H03L7/095 , H03L7/0812 , H03L7/101
摘要： A coarse lock detector for a delayed locked loop (DLL) is disclosed. The coarse lock detector includes multiple detection cells. Each detection cell receives a delayed clock phase and an output of a previous detection cell as inputs. To increase time for the output of the previous detection cell to propagate, the detection cells are arranged in groups such that the output from the previous detection cell is generated by a detection cell which is more than one detection cell previous.
摘要翻译：公开了一种用于延迟锁定环（DLL）的粗略锁定检测器。粗锁检测器包括多个检测单元。每个检测单元接收延迟时钟相位和先前检测单元的输出作为输入。为了增加先前检测单元的输出的时间传播，检测单元被分组排列，使得来自先前检测单元的输出是由多于一个先前检测单元的检测单元生成的。

9. 发明申请

US20120212474A1 IMAGE DISPLAY DEVICE AND METHOD OF DRIVING THE SAME 审中-公开
标题翻译：图像显示装置及其驱动方法
公开(公告)号：US20120212474A1
公开(公告)日：2012-08-23
申请号：US13244414
申请日：2011-09-24
申请人： Moon-Sang Hwang , Won-Jun Choe , Dong-Yong Shin
发明人： Moon-Sang Hwang , Won-Jun Choe , Dong-Yong Shin
IPC分类号： G09G5/00
CPC分类号： G09G3/3648 , G09G3/2014 , G09G3/3666 , G09G2310/0251 , G09G2320/0223 , G09G2320/0285 , G09G2330/021
摘要： An image display device capable of reducing power consumption. The image display device includes: a position determining unit for determining positions of horizontal lines to which data input to a timing controller are to be supplied; a look-up table (LUT) for storing pre-emphasis voltage information corresponding to the positions of the horizontal lines; the timing controller for transmitting the data and the pre-emphasis voltage information to a data driver; a pre-emphasis voltage generator for generating a pre-emphasis voltage to correspond to the pre-emphasis voltage information from the data driver; and the data driver for supplying the pre-emphasis voltage to data lines in a partial period of a horizontal period and for supplying a data signal in a remaining period of the horizontal period.
摘要翻译：一种能够降低功耗的图像显示装置。图像显示装置包括：位置确定单元，用于确定要向其提供输入到定时控制器的数据的水平线的位置; 用于存储与水平行的位置对应的预加重电压信息的查找表（LUT）; 用于将数据和预加重电压信息发送到数据驱动器的定时控制器; 预加重电压发生器，用于产生对应于来自数据驱动器的预加重电压信息的预加重电压; 以及数据驱动器，用于在水平周期的局部周期中向数据线提供预加重电压，并且用于在水平周期的剩余周期中提供数据信号。

10. 发明授权

US08723851B2 Data drive circuit of flat panel display and driving method thereof 有权
标题翻译：平板显示器的数据驱动电路及其驱动方法
公开(公告)号：US08723851B2
公开(公告)日：2014-05-13
申请号：US12983811
申请日：2011-01-03
申请人： Won-Jun Choe
发明人： Won-Jun Choe
IPC分类号： G09G5/00
CPC分类号： G09G3/3685 , G09G3/3275 , G09G3/3614 , G09G2310/0291 , G09G2320/0204
摘要： The data driver of a flat panel display includes: an output driver configured to output a plurality of amplified data signals for a plurality of channels corresponding to a plurality of data lines, the plurality of channels including: a plurality of amplifiers configured to amplify a plurality of input data signals and to supply the amplified data signals to the data lines; and a plurality of chopping controllers, each of the chopping controllers being coupled connected to a plurality of input terminals of a corresponding amplifier of the amplifiers and configured to receive a first control signal or a second control signal to periodically change signals applied to positive and negative input terminals from among the input terminals of the amplifiers.
摘要翻译：平板显示器的数据驱动器包括：输出驱动器，被配置为输出与多个数据线相对应的多个通道的多个放大数据信号，所述多个通道包括：多个放大器，被配置为放大多个的输入数据信号，并将放大的数据信号提供给数据线; 以及多个斩波控制器，每个斩波控制器被耦合到所述放大器的相应放大器的多个输入端子，并被配置为接收第一控制信号或第二控制信号以周期性地改变施加到正和负的信号来自放大器的输入端之间的输入端子。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式