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1. 发明授权

US07682541B2 Manufacturing method of a microchemical chip made of a resin 有权
标题翻译：由树脂制成的微量化学芯片的制造方法
公开(公告)号：US07682541B2
公开(公告)日：2010-03-23
申请号：US11103497
申请日：2005-04-12
申请人： Mitsuru Saito , Yoshiyuki Ikegami , Kenji Obara
发明人： Mitsuru Saito , Yoshiyuki Ikegami , Kenji Obara
IPC分类号： B29C39/02 , B29C33/40
CPC分类号： B29C39/26 , B01L3/502707 , B29C33/306 , B29C33/3842 , B29C33/424 , B29C39/006 , B29C45/2673 , B29C45/372 , B29K2033/08 , B29K2083/00 , B29L2031/756 , B81B2201/051 , B81B2201/058 , B81C99/0085 , B81C99/009
摘要： A manufacturing method of a microchemical chip made of a resin and having a micro channel, which comprises forming a photoresist film over the surface of one side of a metal support substratum, stacking a photomask for the formation of a channel pattern over the photoresist film, forming a minute-structure photoresist pattern over the metal support substratum by a photofabrication technology as a flat-sheet mold, disposing the flat-sheet mold or unit mold obtained by separating the flat-sheet mold on the bottom of a contour forming frame for resin molding, pouring a resin into the contour forming frame for resin molding and curing the resin to form a resin structure having a micro channel formed by the mold, and attaching the resin structure having a micro channel to a flat sheet to be a lid of the micro channel; and microchemical chips manufactured by this method.
摘要翻译：一种由树脂制成并具有微通道的微化学芯片的制造方法，包括在金属支撑基底的一侧的表面上形成光致抗蚀剂膜，在光致抗蚀剂膜上堆叠用于形成沟道图案的光掩模，通过作为平板模具的光加工技术在金属支撑基底上形成微小结构光致抗蚀剂图案，将通过将平板模具分离而获得的平板模具或单元模具设置在用于树脂的轮廓形成框架的底部上将树脂浇注到轮廓成形框架中以进行树脂模制和固化树脂，以形成具有由模具形成的微通道的树脂结构，并将具有微通道的树脂结构附着到平板上，以成为微通道和通过该方法制造的微量化学芯片。

2. 发明申请

US20050230876A1 Manufacturing method of a microchemical chip made of a resin and a microchemical chip made of a resin by the method 有权
标题翻译：通过该方法由树脂制成的微化学芯片和由树脂制成的微化学芯片的制造方法
公开(公告)号：US20050230876A1
公开(公告)日：2005-10-20
申请号：US11103497
申请日：2005-04-12
申请人： Mitsuru Saito , Yoshiyuki Ikegami , Kenji Obara
发明人： Mitsuru Saito , Yoshiyuki Ikegami , Kenji Obara
IPC分类号： G01N37/00 , B29C33/00 , B29C33/38 , B29C33/42 , B29C39/02 , B29C41/02 , B29L31/00 , B81C1/00 , G03F7/00 , B29C33/40
CPC分类号： B29C39/26 , B01L3/502707 , B29C33/306 , B29C33/3842 , B29C33/424 , B29C39/006 , B29C45/2673 , B29C45/372 , B29K2033/08 , B29K2083/00 , B29L2031/756 , B81B2201/051 , B81B2201/058 , B81C99/0085 , B81C99/009
摘要： A manufacturing method of a microchemical chip made of a resin and having a micro channel, which comprises forming a photoresist film over the surface of one side of a metal support substratum, stacking a photomask for the formation of a channel pattern over the photoresist film, forming a minute-structure photoresist pattern over the metal support substratum by a photofabrication technology as a flat-sheet mold, disposing the flat-sheet mold or unit mold obtained by separating the flat-sheet mold on the bottom of a contour forming frame for resin molding, pouring a resin into the contour forming frame for resin molding and curing the resin to form a resin structure having a micro channel formed by the mold, and attaching the resin structure having a micro channel to a flat sheet to be a lid of the micro channel; and microchemical chips manufactured by this method.
摘要翻译：一种由树脂制成并具有微通道的微化学芯片的制造方法，包括在金属支撑基底的一侧的表面上形成光致抗蚀剂膜，在光致抗蚀剂膜上堆叠用于形成沟道图案的光掩模，通过作为平板模具的光加工技术在金属支撑基底上形成微小结构光致抗蚀剂图案，将通过将平板模具分离而获得的平板模具或单元模具设置在用于树脂的轮廓形成框架的底部上将树脂浇注到轮廓成形框架中以进行树脂模制和固化树脂，以形成具有由模具形成的微通道的树脂结构，并将具有微通道的树脂结构附着到平板上，以成为微通道和通过该方法制造的微量化学芯片。

3. 发明授权

US08355559B2 Method and apparatus for reviewing defects 有权
标题翻译：检查缺陷的方法和装置
公开(公告)号：US08355559B2
公开(公告)日：2013-01-15
申请号：US12428557
申请日：2009-04-23
申请人： Minoru Harada , Ryo Nakagaki , Kenji Obara , Atsushi Miyamoto
发明人： Minoru Harada , Ryo Nakagaki , Kenji Obara , Atsushi Miyamoto
IPC分类号： G06K9/00
CPC分类号： G06T7/004 , G01N21/9501 , G06T7/0004 , G06T7/001 , G06T7/70 , G06T2207/10061 , G06T2207/30148
摘要： Disclosed is a method for reviewing defects in a large number of samples within a short period of time through the use of a defect review apparatus. To collect defect images steadily and at high throughput, a defect detection method is selected before imaging and set up for each of review target defects in the samples in accordance with the external characteristics of the samples that are calculated from the design information about the samples. The defect images are collected after an imaging sequence is set up for the defect images and reference images in such a manner as to reduce the time required for stage movement in accordance with the defect coordinates of the samples and the selected defect detection method.
摘要翻译：公开了一种通过使用缺陷检查装置在短时间内检查大量样品中的缺陷的方法。为了稳定和高吞吐量收集缺陷图像，在成像之前选择缺陷检测方法，并根据从样本的设计信息计算出的样本的外部特征，为样本中的每个评估目标缺陷设置缺陷检测方法。在针对缺陷图像和参考图像设置成像序列之后收集缺陷图像，以便根据样本的缺陷坐标和所选择的缺陷检测方法来减少阶段移动所需的时间。

4. 发明授权

US08121393B2 Pattern defect analysis equipment, pattern defect analysis method and pattern defect analysis program 有权
公开(公告)号：US08121393B2
公开(公告)日：2012-02-21
申请号：US12350783
申请日：2009-01-08
申请人： Norio Satou , Susumu Koyama , Masashi Sakamoto , Kenji Obara
发明人： Norio Satou , Susumu Koyama , Masashi Sakamoto , Kenji Obara
IPC分类号： G06K9/00
CPC分类号： G06T7/001 , G06T2207/10061 , G06T2207/30148
摘要： A data processing unit acquires a review image including a pattern defect on a substrate, compares the review image with a reference image thereby to extract a defect image, the reference image including no pattern defect, and performs an alignment between the review image and a self-layer design pattern image which is generated from design data belonging to the identical layer in a region corresponding to the review image. The data processing unit, then, based on result of the alignment, generates an another-layer design pattern image which is generated from design data belonging to another layer in the region corresponding to the review image, and, based on a synthesized image of the defect image and the another-layer design pattern image, determines the relative position relationship between the pattern defect and a pattern belonging to another layer, and judges the criticality based on the relative position relationship.

5. 发明申请

US20110299760A1 DEFECT OBSERVATION METHOD AND DEFECT OBSERVATION APPARATUS 有权
标题翻译：缺陷观察方法和缺陷观察装置
公开(公告)号：US20110299760A1
公开(公告)日：2011-12-08
申请号：US13146032
申请日：2009-12-21
申请人： Minoru Harada , Ryo Nakagaki , Kenji Obara
发明人： Minoru Harada , Ryo Nakagaki , Kenji Obara
IPC分类号： G06K9/00
CPC分类号： G01N21/95607 , G01N23/2251 , H01L22/12
摘要： Provided is a defect observation apparatus capable of analyzing a structure such as an arrangement and a vertical relationship of a circuit pattern formed by using design information of a sample, creating a non-defective product image from a defect image based on the analysis results, and detecting a defect by comparative inspection. The defect observation apparatus is provided with a computing unit 120 which receives an input regarding design information of a sample 106 to be observed from a storage unit 114, receives an input regarding observable layer information previously set to the sample to be observed from the storage unit 114 based on the design information including one or more layers, receives an input regarding defect coordinates on the sample detected by another inspection apparatus from the storage unit 114, analyzes, for a defect on the sample 106 to be observed based on the defect coordinates, a circuit pattern structure in a peripheral area of the defect coordinates based on the design information and the layer information, estimates a non-defective product image based on the analysis result of the circuit pattern structure, and detects a defect by a comparative inspection between the non-defective product image and image information from an image obtaining unit.
摘要翻译：提供了一种缺陷观察装置，其能够分析通过使用样本的设计信息形成的电路图案的布置和垂直关系的结构，基于分析结果从缺陷图像创建无缺陷产品图像，以及通过比较检查检测缺陷。缺陷观察装置设置有从存储单元114接收关于要观察的样本106的设计信息的输入的计算单元120，从存储单元接收关于预先设置到要观察的样本的可观察层信息的输入基于包括一层或多层的设计信息，从存储单元114接收关于由另一检查装置检测到的样本上的缺陷坐标的输入，针对基于缺陷坐标观察的样本106的缺陷，基于设计信息和层信息的缺陷坐标的周边区域中的电路图案结构，基于电路图案结构的分析结果来估计无缺陷的产品图像，并且通过比较检查来检测缺陷来自图像获取单元的无缺陷产品图像和图像信息。

6. 发明授权

US07925367B2 Defect review and classification system 有权
标题翻译：缺陷审查和分类制度
公开(公告)号：US07925367B2
公开(公告)日：2011-04-12
申请号：US12573463
申请日：2009-10-05
申请人： Takehiro Hirai , Kazuo Aoki , Kenji Obara
发明人： Takehiro Hirai , Kazuo Aoki , Kenji Obara
IPC分类号： G06F19/00
CPC分类号： G05B19/41875 , G05B2219/32218 , Y02P90/22
摘要： The invention proposes a system that interrupts a processing associated with an ADC having low priority when an ADC processing cannot catch up with ADR by an ADC alone that is not under execution but uses an ADC for an ADR having high priority. To preferentially execute ADR/ADC having high priority, the invention employs an algorithm for serially selecting ADR/ADC in the order of higher processing capacity (in the order of greater numerical values in the expression by a DPH unit) from among ADR/ADCs that have the lowest priority, no matter whether the ADR/DC is now under execution or not.
摘要翻译：本发明提出了一种系统，当ADC处理不能通过一个ADC不能跟踪ADR而不能执行但对具有高优先级的ADR使用ADC时，中断与具有低优先级的ADC相关联的处理的系统。为了优先执行具有高优先级的ADR / ADC，本发明采用一种用于从ADR / ADC中的处理能力较高（按DPH单元的表达式中的较大数值的数量级）的顺序选择ADR / ADC的算法，优先级最低，无论ADR / DC是否在执行中。

7. 发明授权

US07834651B2 Power supply circuit 失效
标题翻译：电源电路
公开(公告)号：US07834651B2
公开(公告)日：2010-11-16
申请号：US12058767
申请日：2008-03-31
申请人： Kenji Obara
发明人： Kenji Obara
IPC分类号： G01R31/26 , G01R31/36 , H02M3/335
CPC分类号： G01R31/2851
摘要： Provided is a power supply circuit that supplies an electronic device with a supply power, including a voltage control section that outputs a control voltage that tracks an input voltage with a prescribed frequency characteristic and applies a voltage corresponding to the control voltage to the electronic device, a voltage adjusting section that detects the voltage applied to the electronic device and adjusts the input voltage based on the detected voltage, a current adjusting section that detects a current applied to the electronic device and adjusts the input voltage when the detected current is outside of a prescribed limit range, and a frequency characteristic adjusting section that increases a speed at which the control voltage tracks the input voltage by adjusting the frequency characteristic of the voltage control section when the applied current is outside of the limit range.
摘要翻译：提供一种电源电路，其向电子设备供应电力，包括电压控制部分，其输出跟踪具有规定频率特性的输入电压的控制电压，并将与控制电压相对应的电压施加到电子设备，电压调整部，其检测施加到电子设备的电压并基于检测到的电压调节输入电压;电流调节部，其检测施加到电子设备的电流，并且当检测到的电流在检测电流之外时调节输入电压规定的限制范围，以及频率特性调整部，其通过在施加的电流超出限制范围时调整所述电压控制部的频率特性，来提高所述控制电压跟踪所述输入电压的速度。

8. 发明授权

US07593564B2 Method and apparatus for reviewing defect of subject to be inspected 有权
标题翻译：检查受检对象的缺陷的方法和装置
公开(公告)号：US07593564B2
公开(公告)日：2009-09-22
申请号：US11272897
申请日：2005-11-15
申请人： Kenji Obara , Kazuo Aoki
发明人： Kenji Obara , Kazuo Aoki
IPC分类号： G06K9/00
CPC分类号： G01N21/9501
摘要： Absolute coordinates designate position coordinates of a defect of a calibrating substrate, and inspection coordinates designate position coordinates of the defect of the calibrating substrate detected by an inspection apparatus. A deviation of the inspection coordinates with respect to the absolute coordinates is an error included in the inspection coordinates. When “nonrandom errors” are removed from the inspection coordinates, a “random error” is left in the inspection coordinates. The view size for defect search in a defect reviewing apparatus is set based on the random error. Further, a defect for fine alignment is selected based on the tendency of a detected value of the defect size of the calibrating substrate detected by the inspection apparatus.
摘要翻译：绝对坐标表示校准基板的缺陷的位置坐标，检查坐标表示由检查装置检测出的校准基板的缺陷的位置坐标。检查坐标相对于绝对坐标的偏差是检查坐标中包含的误差。当从检查坐标中移除“非随机错误”时，检查坐标中会留下“随机误差”。基于随机误差设定缺陷检查装置中缺陷检索的视图尺寸。此外，基于由检查装置检测到的校准基板的缺陷尺寸的检测值的趋势，选择精细对准的缺陷。

9. 发明申请

US20090222753A1 DEFECT INSPECTION TOOL AND METHOD OF PARAMETER TUNING FOR DEFECT INSPECTION TOOL 有权
标题翻译：缺陷检查工具和缺陷检查工具参数调试方法
公开(公告)号：US20090222753A1
公开(公告)日：2009-09-03
申请号：US12370784
申请日：2009-02-13
申请人： Kohei YAMAGUCHI , Kenji Obara , Takehiro Hirai
发明人： Kohei YAMAGUCHI , Kenji Obara , Takehiro Hirai
IPC分类号： G06F3/048 , G06K9/00 , G06F19/00
CPC分类号： G06T7/0004 , G06T2207/10061 , G06T2207/30148
摘要： Setting of a parameter of a defect inspection tool is based on trial and error in which effects are confirmed one by one and set, and the setting requires a high technique and is significantly inefficient. The present invention is to provide an inspection method and an inspection tool capable of solving such a problem and of setting the parameter (hereinafter, referred to as an inspection parameter) required for detecting the defect easily.In order to solve the problem, a defect inspection tool according to the present invention is provided with image obtaining unit for obtaining an image by applying an electron beam to a specimen; an image processing unit for performing a calculation process by using each predetermined inspection parameter group based on the image obtained by the image obtaining unit; and a parameter tuning unit for performing a process to determine an effective inspection parameter group from calculation results by the calculation process and narrowing down an inspection parameter group range by repeating the process for a plurality of images obtained by the image obtaining unit, and is provided with a configuration to detect the defect by using the inspection parameter group narrowed down.
摘要翻译：缺陷检查工具的参数设置是基于一个一个确认效果并进行设置的试错法，设定要求较高的技术，效果显着。本发明提供一种能够解决这样的问题的检查方法和检查工具，并且容易地设定检测缺陷所需的参数（以下称为检查参数）。为了解决这个问题，根据本发明的缺陷检查工具设置有图像获取单元，用于通过向样本施加电子束来获得图像; 图像处理单元，用于基于由图像获取单元获得的图像，使用每个预定检查参数组来执行计算处理; 以及参数调整单元，用于通过计算处理执行从计算结果确定有效检查参数组的处理，并通过重复由图像获取单元获得的多个图像的处理来缩小检查参数组范围，并且提供通过使用缩小的检查参数组来检测缺陷。

10. 发明申请

US20090045335A1 INSPECTION METHOD FOR SEMICONDUCTOR WAFER FOR REVIEWING DEFECTS 有权
标题翻译：用于检查缺陷的半导体波形检测方法
公开(公告)号：US20090045335A1
公开(公告)日：2009-02-19
申请号：US11607906
申请日：2006-12-04
申请人： Kenji Obara , Takehiro Hirai
发明人： Kenji Obara , Takehiro Hirai
IPC分类号： G01N23/00
CPC分类号： G01N23/2251 , H01J37/222 , H01J37/244 , H01J37/26 , H01J37/28 , H01J2237/24475 , H01J2237/2448 , H01J2237/24592 , H01J2237/28 , H01J2237/2809 , H01J2237/2817
摘要： An object of the present invention is to provide a suitable method of observing a wafer edge by using an electron microscope. The electron microscope includes a column which can take an image in being tilted, and thus allows a wafer edge to be observed from an oblique direction.
摘要翻译：本发明的目的是提供一种使用电子显微镜观察晶片边缘的合适方法。电子显微镜包括可以使图像倾斜的列，从而允许从倾斜方向观察晶片边缘。

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