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1. 发明申请

US20070181223A1 High-strength thick steel plate excellent in low temperature toughness at heat affected zone resulting from large heat input welding 审中-公开
标题翻译：热输入焊接导致热影响区低温韧性优异的高强度厚钢板
公开(公告)号：US20070181223A1
公开(公告)日：2007-08-09
申请号：US10594660
申请日：2005-04-06
申请人： Minoru Ito , Akihiko Kojima , Masanori Minagawa , Yoichi Tanaka , Toshiei Hasegawa , Jun Otani
发明人： Minoru Ito , Akihiko Kojima , Masanori Minagawa , Yoichi Tanaka , Toshiei Hasegawa , Jun Otani
IPC分类号： C22C38/08 , C22C38/14
CPC分类号： C22C38/08
摘要： The present invention provides a high-strength thick steel plate having a plate thickness of 50 to 80 mm and a tensile strength of 490 to 570 MPa which is able to realize an excellent HAZ toughness even when welding with a heat input of 20 to 100 kJ/mm is conducted and is characterized by containing, by wt %, 0.03-0.14% of C, 0.30% or less of Si, 0.8-2.0% of Mn, 0.02% or less of P, 0.005% or less of S, 0.8-4.0% of Ni, 0.003-0.040% of Nb, 0.001-0.040% of Al, 0.0010-0.0100% of N, and 0.005-0.030% of Ti, where Ni and Mn satisfy equation [1], and the balance of iron and unavoidable impurities: Ni/Mn≧10×Ceq−3 (0.36
摘要翻译：本发明提供一种厚度为50〜80mm，拉伸强度为490〜570MPa的高强度厚钢板，即使在20〜100kJ的热输入下进行焊接，也能够实现优异的HAZ韧性 / mm，其特征在于，含有C：0.03-0.14％，0.30％以下的Si，0.8〜2.0％的Mn，0.02％以下的P，0.005％以下的S，0.8 -4.0％的Ni，0.003-0.040％的Nb，0.001-0.040％的Al，0.0010-0.0100％的N和0.005-0.030％的Ti，其中Ni和Mn满足等式[1]，其余的铁和不可避免的杂质：<？in-line-formula description =“In-line formula”end =“lead”？> Ni / Mn> = 10xCeq-3（0.36

2. 发明授权

US08720622B2 Internal motorized bicycle hub 有权
标题翻译：内部电动自行车轮毂
公开(公告)号：US08720622B2
公开(公告)日：2014-05-13
申请号：US13324145
申请日：2011-12-13
申请人： Minoru Ito
发明人： Minoru Ito
IPC分类号： B60K1/00
CPC分类号： H02K5/24 , B60L11/007 , B60L2200/12 , B60L2220/20 , B60L2220/44 , B60L2270/142 , B60L2270/145 , B62K2204/00 , B62M6/65 , H02K7/14 , H02K11/33 , Y02T10/641
摘要： An internal motorized bicycle hub includes a hub axle, a motor, a partitioning wall section and at least one soundproofing member. The motor includes a stator. The partitioning wall section has least one opening and the stator mounted thereon. The at least one soundproofing member is disposed adjacent the partitioning wall section and blocking the at least one opening.
摘要翻译：内部的电动自行车轮毂包括轮毂轴，马达，分隔壁部分和至少一个隔音构件。电机包括定子。分隔壁部分具有至少一个开口和安装在其上的定子。所述至少一个隔音构件邻近所述分隔壁部分设置并且阻挡所述至少一个开口。

3. 发明授权

US08114527B2 Highly corrosion-resistant, rust-prevention coating material, highly corrosion-resistant steel, and steel structure 有权
标题翻译：高度耐腐蚀，防锈涂料，高耐腐蚀钢和钢结构
公开(公告)号：US08114527B2
公开(公告)日：2012-02-14
申请号：US12311455
申请日：2007-09-26
申请人： Makoto Nagasawa , Minoru Ito , Michio Kaneko , Kenji Katoh , Shiro Imai , Masatoshi Kominami , Toshiro Terakawa , Takashi Kumai
发明人： Makoto Nagasawa , Minoru Ito , Michio Kaneko , Kenji Katoh , Shiro Imai , Masatoshi Kominami , Toshiro Terakawa , Takashi Kumai
IPC分类号： B32B5/06 , B32B15/16 , B32B15/18 , C22C18/00
CPC分类号： C09D5/106 , Y10T428/12028 , Y10T428/12792 , Y10T428/12799 , Y10T428/256 , Y10T428/265
摘要： A highly corrosion-resistant, rust-prevention coating material comprising: an inorganic binder; and Zn metal particles comprised of Zn and unavoidable impurities and dispersed in the binder at the rate of 30 mass % or greater based on a dry coating film, wherein (i) the Zn metal particles include (i-1) fine-grain Zn metal particles of 0.05 to 5 μm peak grain diameter whose grain-diameter distribution has a grain-diameter frequency distribution with a single peak and a tail on either side of the peak and (i-2) coarse-grain Zn metal particles of 6 to 100 μm peak grain diameter whose grain-diameter distribution has a grain-diameter frequency distribution with another single peak and a tail on either side of the peak, and wherein (ii) the percentage of all Zn metal particles accounted for by Zn metal particles of 0.05 to 5 μm grain diameter expressed in volume percentage is 5 to 99%.
摘要翻译：一种高度耐腐蚀的防锈涂料，包括：无机粘合剂; 和由Zn和不可避免的杂质构成的Zn金属粒子，以干质涂膜为30质量％以上的速度分散在粘合剂中，其中（i）Zn金属粒子包括（i-1）细晶粒Zn金属粒径分布具有峰值和（i-2）粗粒Zn金属粒子的单峰和尾部的粒径分布为0.05〜5μm的峰粒径的粒子为6〜100 μm峰值粒径，其粒径分布具有与峰的任一侧上的另一个单峰和尾部的粒径频率分布，并且其中（ii）Zn金属颗粒占所有Zn金属颗粒的百分比为0.05 至5μm的粒径以体积百分数表示，为5〜99％。

4. 发明授权

US08059997B2 Developer carrying member and developing apparatus 有权
标题翻译：显影剂承载构件和显影装置
公开(公告)号：US08059997B2
公开(公告)日：2011-11-15
申请号：US12763620
申请日：2010-04-20
申请人： Satoshi Otake , Masayoshi Shimamura , Yasutaka Akashi , Takuma Matsuda , Minoru Ito , Kazuhito Wakabayashi
发明人： Satoshi Otake , Masayoshi Shimamura , Yasutaka Akashi , Takuma Matsuda , Minoru Ito , Kazuhito Wakabayashi
IPC分类号： G03G15/06 , G03G15/09
CPC分类号： G03G15/0818
摘要： A developer carrying member is disclosed which can stably provide toners with triboelectric charges even in various environments. The developer carrying member has a substrate and a resin layer as a surface layer formed on the surface of the substrate, and the resin layer contains a thermosetting resin as a binder resin, an acrylic resin having two units having specific structures, and conductive particles.
摘要翻译：公开了即使在各种环境中也可稳定地提供调色剂摩擦电荷的显影剂承载构件。显影剂承载构件具有基材和形成在基材表面上的表面层的树脂层，树脂层含有作为粘合剂树脂的热固性树脂，具有两个具有特定结构的单元的丙烯酸树脂和导电颗粒。

5. 发明授权

US07908499B2 Semiconductor integrated circuit comprising master-slave flip-flop and combinational circuit with pseudo-power supply lines 有权
标题翻译：半导体集成电路包括主从触发器和具有伪电源线的组合电路
公开(公告)号：US07908499B2
公开(公告)日：2011-03-15
申请号：US11898699
申请日：2007-09-14
申请人： Minoru Ito
发明人： Minoru Ito
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3275 , Y02D10/14
摘要： In a semiconductor integrated circuit device using a ZSCCMOS circuit, a combinational circuit includes a plurality of logic gate circuits, and receives an output of a data holding circuit. The data holding circuit can continue to hold data during cut-off of power supply, and when receiving a predetermined value as a control signal, outputs a predetermined fixed value. A logic gate circuit which outputs “L” when the output of the data holding circuit has the predetermined fixed value has power supply ends connected to a pseudo-power supply line VDDV and a low potential power supply line VSS. A logic gate circuit which outputs “H” when the output of the data holding circuit has the predetermined fixed value has power supply ends connected to a high potential power supply line VDD and a pseudo-power supply line VSSV.
摘要翻译：在使用ZSCCMOS电路的半导体集成电路装置中，组合电路包括多个逻辑门电路，并且接收数据保持电路的输出。数据保持电路可以在电源截止期间继续保持数据，并且当接收到预定值作为控制信号时，输出预定的固定值。当数据保持电路的输出具有预定的固定值时输出“L”的逻辑门电路具有连接到伪电源线VDDV和低电位电源线VSS的电源端。当数据保持电路的输出具有预定的固定值时输出“H”的逻辑门电路具有连接到高电位电源线VDD和伪电源线VSSV的电源端。

6. 发明授权

US07781808B2 Semiconductor apparatus and complimentary MIS logic circuit 有权
标题翻译：半导体装置和互补的MIS逻辑电路
公开(公告)号：US07781808B2
公开(公告)日：2010-08-24
申请号：US12195204
申请日：2008-08-20
申请人： Minoru Ito
发明人： Minoru Ito
IPC分类号： H01L23/62
CPC分类号： H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： A configuration is adopted comprising an NchMOS transistor 1 equipped with an insulating isolation layer 4 providing insulation and isolation using an SOI structure, and a capacitor formed using an insulating film, with a silicon substrate B being made thin and substrate capacitance being reduced. The NchMOS transistor 1 is equipped with insulating isolation regions 5a, 5b that are perfectly depleted or partially depleted in a manner close to being perfectly depleted. An electrode 6 connected to a gate electrode G of the NchMOS transistor 1 and an impurity diffusion layer 7 are connected via a capacitor 2. A source electrode S is connected to a power supply terminal 3a, a gate electrode G is connected to an internal signal line S1, and a drain electrode D is connected to an internal signal line S2. Substrate bias voltage is then controlled using capacitor coupling when the NchMOS transistor 1 is turned on/off.
摘要翻译：采用包括NchMOS晶体管1的配置，其配备有使用SOI结构提供绝缘和隔离的绝缘隔离层4，以及使用绝缘膜形成的电容器，使硅衬底B变薄并且衬底电容减小。 NchMOS晶体管1配备有完全耗尽或部分耗尽的绝缘隔离区域5a，5b，其接近完全耗尽。连接到NchMOS晶体管1的栅电极G和杂质扩散层7的电极6通过电容器2连接。源电极S连接到电源端子3a，栅电极G连接到内部信号线S1，漏电极D连接到内部信号线S2。当NchMOS晶体管1导通/截止时，使用电容耦合来控制衬底偏置电压。

7. 发明申请

US20080178020A1 Semiconductor integrated circuit device and electronic device 有权
标题翻译：半导体集成电路器件和电子器件
公开(公告)号：US20080178020A1
公开(公告)日：2008-07-24
申请号：US11898699
申请日：2007-09-14
申请人： Minoru Ito
发明人： Minoru Ito
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3275 , Y02D10/14
摘要： In a semiconductor integrated circuit device using a ZSCCMOS circuit, a combinational circuit includes a plurality of logic gate circuits, and receives an output of a data holding circuit. The data holding circuit can continue to hold data during cut-off of power supply, and when receiving a predetermined value as a control signal, outputs a predetermined fixed value. A logic gate circuit which outputs “L” when the output of the data holding circuit has the predetermined fixed value has power supply ends connected to a pseudo-power supply line VDDV and a low potential power supply line VSS. A logic gate circuit which outputs “H” when the output of the data holding circuit has the predetermined fixed value has power supply ends connected to a high potential power supply line VDD and a pseudo-power supply line VSSV.
摘要翻译：在使用ZSCCMOS电路的半导体集成电路装置中，组合电路包括多个逻辑门电路，并且接收数据保持电路的输出。数据保持电路可以在电源截止期间继续保持数据，并且当接收到预定值作为控制信号时，输出预定的固定值。当数据保持电路的输出具有预定的固定值时输出“L”的逻辑门电路具有连接到伪电源线V DDV和低电位电源线 SS SS。当数据保持电路的输出具有预定的固定值时，输出“H”的逻辑门电路将电源端连接到高电位电源线V DD和伪电源线 V SSV 。

8. 发明授权

US07353841B2 Relative pressure control system and relative flow control system 有权
标题翻译：相对压力控制系统和相对流量控制系统
公开(公告)号：US07353841B2
公开(公告)日：2008-04-08
申请号：US11295649
申请日：2005-12-07
申请人： Tetsujiro Kono , Hiroki Doi , Minoru Ito , Hideki Nagaoka , Keiki Ito , Hiroki Endo , Tsuyoshi Shimazu , Jun Hirose , Osamu Katsumata , Kazuyuki Miura , Takashi Kitazawa
发明人： Tetsujiro Kono , Hiroki Doi , Minoru Ito , Hideki Nagaoka , Keiki Ito , Hiroki Endo , Tsuyoshi Shimazu , Jun Hirose , Osamu Katsumata , Kazuyuki Miura , Takashi Kitazawa
IPC分类号： G05D11/13 , G05D16/20
CPC分类号： G05D16/206 , Y10T137/0396 , Y10T137/7761 , Y10T137/87877
摘要： Provided is a relative pressure control system has a simple configuration, but enables accurate regulation of a division ratio of an operation gas, and concurrently makes it possible to securely drain the operation gas from an operation gas pipeline in case of emergency. The system includes a plurality of air operated valves of a normally open type that are connected to an operation gas pipeline supplied with an operation gas; pressure sensors that are series connected to the respective air operated valves and that detect output pressures of the respective air operated valves; a controller that controls operation pressures of the respective air operated valves in accordance with the pressures detected by the pressure sensors; and a hard interlock solenoid valve that correlates the plurality of air operated valves to one another so that at least one of the plurality of air operated valves is normally opened. In the configuration, an opening of a specified one of the plurality of air operated valves is regulated, the operation gas is output at a predetermined division ratio.
摘要翻译：提供一种相对压力控制系统具有简单的结构，但是能够精确地调节操作气体的分配比，并且在紧急情况下同时可以从操作气体管道可靠地排出操作气体。该系统包括多个常开型气动阀，其连接到供给操作气体的操作气体管道; 压力传感器串联连接到相应的气动阀并且检测各个气动阀的输出压力; 控制器，其根据压力传感器检测到的压力来控制各个气动阀的操作压力; 以及将所述多个气动阀彼此关联使得所述多个气动阀中的至少一个通常打开的硬联锁电磁阀。在这种构造中，调节多个气动阀中的指定的一个的开度，以预定的分配比率输出操作气体。

9. 发明授权

US07256298B2 Pyrazole derivatives and process for the production thereof 有权
标题翻译：吡唑衍生物及其制备方法
公开(公告)号：US07256298B2
公开(公告)日：2007-08-14
申请号：US10521593
申请日：2003-07-31
申请人： Masao Nakatani , Minoru Ito , Masahiro Miyazaki
发明人： Masao Nakatani , Minoru Ito , Masahiro Miyazaki
IPC分类号： C07D231/18
CPC分类号： C07D231/20 , C07D231/22
摘要： The present invention provides pyrazole derivatives useful as production intermediates for isoxazoline derivatives having an excellent herbicidal effect and selectivity between crops and weeds as well as processes for producing the same.The pyrazole derivatives or pharmaceutically acceptable salts thereof which are inventive compounds are represented by the general formula [I] or a salt thereof: wherein R1 represents a C1 to C6 alkyl group, R2 represents a C1 to C3 haloalkyl group, R3 represents a hydrogen atom, a C1 to C3 alkyl group which may be substituted with one or more substituents selected from the following substituent group α, or a formyl group, R4 represents a hydrogen atom or a C1 to C3 haloalkyl group, provided that R4 represents a C1 to C3 haloalkyl group in the case that R3 is a hydrogen or a formyl group, and R4 is a hydrogen group or a C1 to C3 haloalkyl group in the case that R3 is a C1 to C3 alkyl group which may be substituted with one or more substituents selected from the following substituent group α.
摘要翻译：本发明提供了可用作具有优异的除草效果和作物和杂草之间的选择性的异恶唑啉衍生物的生产中间体的吡唑衍生物及其制备方法。作为本发明化合物的吡唑衍生物或其药学上可接受的盐由通式[I]或其盐表示：其中R 1表示C 1至C 6烷基，R 2， / SUP>表示C1至C3卤代烷基，R 3表示氢原子，可被一个或多个选自以下取代基组α的取代基取代的C1至C3烷基，或甲酰基，R 4表示氢原子或C 1至C 3卤代烷基，条件是R 4表示C 1至C 3卤代烷基， 3是氢或甲酰基，R 4是氢或C1至C3卤代烷基，在R 3是C1的情况下可以被一个或多个选自以下取代基组α的取代基取代的C 3烷基。

10. 发明申请

US20060186472A1 Semiconductor apparatus and complimentary MIS logic circuit 失效
标题翻译：半导体装置和互补的MIS逻辑电路
公开(公告)号：US20060186472A1
公开(公告)日：2006-08-24
申请号：US11353075
申请日：2006-02-14
申请人： Minoru Ito
发明人： Minoru Ito
IPC分类号： H01L27/12
CPC分类号： H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： A configuration is adopted comprising an NchMOS transistor 1 equipped with an insulating isolation layer 4 providing insulation and isolation using an SOI structure, and a capacitor formed using an insulating film, with a silicon substrate B being made thin and substrate capacitance being reduced. The NchMOS transistor 1 is equipped with insulating isolation regions 5a, 5b that are perfectly depleted or partially depleted in a manner close to being perfectly depleted. An electrode 6 connected to a gate electrode G of the NchMOS transistor 1 and an impurity diffusion layer 7 are connected via a capacitor 2. A source electrode S is connected to a power supply terminal 3a, a gate electrode G is connected to an internal signal line S1, and a drain electrode D is connected to an internal signal line S2. Substrate bias voltage is then controlled using capacitor coupling when the NchMOS transistor 1 is turned on/off.
摘要翻译：采用包括NchMOS晶体管1的配置，其配备有使用SOI结构提供绝缘和隔离的绝缘隔离层4，以及使用绝缘膜形成的电容器，使硅衬底B变薄并且衬底电容减小。 NchMOS晶体管1配备有完全耗尽或部分耗尽的绝缘隔离区域5a，5b以接近完全耗尽的方式。连接到NchMOS晶体管1的栅电极G和杂质扩散层7的电极6通过电容器2连接。源电极S连接到电源端子3a，栅电极G连接到内部信号线S 1，漏电极D连接到内部信号线S 2.然后，当NchMOS晶体管1导通/截止时，使用电容器耦合来控制衬底偏置电压。

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