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    • 1. 发明申请
    • ACTIVE DEVICE ARRAY SUBSTRATE
    • 主动设备阵列基板
    • US20120033114A1
    • 2012-02-09
    • US12955923
    • 2010-11-30
    • Min-Hsiang HungMing-Yung HuangChun-Jen ChiuYu-Zhi WuYuan-Nan ChiuChin-An TsengYen-Heng Huang
    • Min-Hsiang HungMing-Yung HuangChun-Jen ChiuYu-Zhi WuYuan-Nan ChiuChin-An TsengYen-Heng Huang
    • H04N5/335
    • G02F1/136209G02F1/136213G02F2001/13606
    • An active device array substrate including a substrate, multiple scan lines, multiple data lines, multiple of pixels are provided. The scan lines and the data lines are disposed on the substrate. Each pixel includes multiple sub-pixels including at least a transistor, a pixel electrode, and a color filter. The transistor is disposed on the substrate and electrically connected to the scan line and the data line correspondingly. A portion of the color filter is disposed between the pixel electrode and the corresponding scan line. The pixel electrode is coupled with the corresponding scan line to form a first capacitor. The drain of the transistor is coupled with the corresponding scan line to form a second capacitor. In a single pixel, the coupling areas of the pixel electrodes corresponding to various color filters with the corresponding scan lines are different, so that capacitance of the first capacitors are substantially the same.
    • 提供了包括衬底,多条扫描线,多条数据线,多个像素的有源器件阵列衬底。 扫描线和数据线设置在基板上。 每个像素包括至少包括晶体管,像素电极和滤色器的多个子像素。 晶体管设置在基板上并相应地电连接到扫描线和数据线。 滤色器的一部分设置在像素电极和相应的扫描线之间。 像素电极与相应的扫描线耦合以形成第一电容器。 晶体管的漏极与相应的扫描线耦合以形成第二电容器。 在单个像素中,对应于具有相应扫描线的各种滤色器的像素电极的耦合区域是不同的,使得第一电容器的电容基本上相同。
    • 7. 发明申请
    • PIXEL STRUCTURE
    • 像素结构
    • US20120050657A1
    • 2012-03-01
    • US12975356
    • 2010-12-22
    • Sung-Hui LinHsiao-Wei ChengMing-Yung HuangPin-Miao Liu
    • Sung-Hui LinHsiao-Wei ChengMing-Yung HuangPin-Miao Liu
    • G02F1/1343
    • H01L27/124G02F1/136286G02F2001/13629
    • A pixel structure includes a substrate, a scan line on the substrate, a data line set, an active device, and a pixel electrode. The substrate has a display region and a peripheral region around the display region. The display region includes at least one sub-pixel region. The data line set is disposed on the substrate, located at one side of the sub-pixel region, and intersected with the scan line to form at least one first intersecting region. The data line set includes a first and a second data lines that are intersected to form at least one second intersecting region. The first and the second data lines are electrically insulated. The active device electrically connects the scan line and to the first data line or the second data line in the data line set. The pixel electrode is located in the sub-pixel region and electrically connects the active device.
    • 像素结构包括衬底,衬底上的扫描线,数据线组,有源器件和像素电极。 衬底具有显示区域和围绕显示区域的周边区域。 显示区域包括至少一个子像素区域。 数据线组设置在基板上,位于子像素区域的一侧,并与扫描线相交以形成至少一个第一相交区域。 数据线组包括相交的第一和第二数据线以形成至少一个第二相交区域。 第一和第二数据线是电绝缘的。 有源器件将扫描线与数据线组中的第一数据线或第二数据线电连接。 像素电极位于子像素区域中并且电连接有源器件。
    • 8. 发明申请
    • PIXEL STRUCTURE
    • 像素结构
    • US20120092605A1
    • 2012-04-19
    • US13025178
    • 2011-02-11
    • Hsiao-Wei ChengSung-Hui LinMing-Yung HuangPin-Miao LiuWen-Shin WuChun-Yao HuangWei-Sheng Yu
    • Hsiao-Wei ChengSung-Hui LinMing-Yung HuangPin-Miao LiuWen-Shin WuChun-Yao HuangWei-Sheng Yu
    • G02F1/1343
    • G02F1/136213
    • A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.
    • 提供了包括扫描线,数据线,有源器件,像素电极,电容器电极线,半导体图案层和至少一个电介质层的像素结构。 有源器件电连接到扫描线和数据线。 像素电极电连接到有源器件。 电容器电极线位于像素电极下方。 在电容器电极线和像素电极之间形成第一存储电容器。 半导体图案层设置在电容器电极线和像素电极之间,像素电极电连接到半导体图案层。 在半导体图案层和电容器电极线之间形成第二存储电容器。 电介质层配置在电容电极线与像素电极之间,位于半导电图案层与电容电极线之间。