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1. 发明申请

US20090021509A1 FLAT PANEL CRYSTAL DISPLAY EMPLOYING SIMULTANEOUS CHARGING OF MAIN AND SUBSIDIARY PIXEL ELECTRODES 有权
标题翻译：平板显示器采用主要和附属像素电极的同时充电
公开(公告)号：US20090021509A1
公开(公告)日：2009-01-22
申请号：US12175961
申请日：2008-07-18
申请人： Min-Cheol Lee , Seung-Hwan Moon
发明人： Min-Cheol Lee , Seung-Hwan Moon
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0443 , G09G2300/0447 , G09G2310/0205
摘要： A display system includes a display panel having a plurality of pixel units, each of the pixel units having first and second divided pixel parts; a first driver for applying a first gate signal to the first divided pixel part; and a second driver for applying a second gate signal to the second divided pixel part, wherein the first and second drivers are integrally formed in the display panel and apply the first and second gate signals to be at least partially time-overlapped through independent driving.
摘要翻译：显示系统包括具有多个像素单元的显示面板，每个像素单元具有第一和第二分割像素部分; 用于将第一栅极信号施加到第一分割像素部分的第一驱动器; 以及第二驱动器，用于将第二栅极信号施加到第二分割像素部分，其中第一和第二驱动器一体地形成在显示面板中，并且通过独立驱动将第一和第二栅极信号施加至少部分时间重叠。

2. 发明授权

US07936332B2 Gate driving circuit having reduced ripple effect and display apparatus having the same 有权
标题翻译：具有减小的纹波效应的栅极驱动电路和具有该纹波效应的显示装置
公开(公告)号：US07936332B2
公开(公告)日：2011-05-03
申请号：US11763144
申请日：2007-06-14
申请人： Min-Cheol Lee , Seung-Hwan Moon
发明人： Min-Cheol Lee , Seung-Hwan Moon
IPC分类号： G09G3/36
CPC分类号： G11C19/184 , G09G3/3677 , G09G2310/0286
摘要： In a gate driving circuit and a display apparatus, the gate driving circuit comprises a plurality of stages. At least one of the stages comprises a pull-up section responsive to a first node signal; a pull-down section responsive to a second input signal; a discharging section discharging the first node signal in response to the second input signal; a first holding section responsive to the first clock signal, maintaining the first node signal at the off-voltage; and a second holding section responsive to the second clock signal, maintaining the first node signal at the off-voltage. The second holding section has a greater transistor width-to-length ratio than the first holding section. Therefore, an abnormal gate-on signal is less likely to occur, reducing driving defects of the display apparatus.
摘要翻译：在栅极驱动电路和显示装置中，栅极驱动电路包括多个级。至少一个级包括响应于第一节点信号的上拉部分; 响应于第二输入信号的下拉部分; 放电部分，响应于所述第二输入信号而放电所述第一节点信号; 响应于所述第一时钟信号的第一保持部分，将所述第一节点信号保持在所述截止电压; 以及响应于第二时钟信号的第二保持部分，将第一节点信号保持在截止电压。第二保持部具有比第一保持部更大的晶体管宽度比。因此，不太可能发生异常的接通信号，减少了显示装置的驱动缺陷。

3. 发明申请

US20080136809A1 Liquid crystal displays 审中-公开
标题翻译：液晶显示器
公开(公告)号：US20080136809A1
公开(公告)日：2008-06-12
申请号：US11974035
申请日：2007-10-10
申请人： Chang-Soo Lee , Young-Soon Lee , Min-Cheol Lee , Jang-Hyun Yeo , Seung-Hwan Moon
发明人： Chang-Soo Lee , Young-Soon Lee , Min-Cheol Lee , Jang-Hyun Yeo , Seung-Hwan Moon
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G2310/0248 , G09G2310/0289 , G09G2320/0204
摘要： An LCD corrects deviations in pixel kickback voltages caused by delays in gate driving signals. The LCD includes a timing controller generating first and second output enable signals, first and second level shifters respectively generating first and second gate clock pulses and inverted clock pulses, and first and second gate drivers respectively generating first and second gate driving signals. A precharge time of the first gate driving signals is controlled by the pulse width of the first output enable signal and a precharge time of the second gate driving signals is controlled by the pulse width of the second output enable signal.
摘要翻译： LCD校正由栅极驱动信号延迟引起的像素反冲电压的偏差。 LCD包括产生第一和第二输出使能信号的定时控制器，分别产生第一和第二栅极时钟脉冲和反相时钟脉冲的第一和第二电平移位器以及分别产生第一和第二栅极驱动信号的第一和第二栅极驱动器。第一栅极驱动信号的预充电时间由第一输出使能信号的脉冲宽度控制，第二栅极驱动信号的预充电时间由第二输出使能信号的脉冲宽度控制。

4. 发明授权

US08400390B2 Gate driving device and liquid crystal display having the same 有权
标题翻译：栅极驱动装置和具有其的液晶显示器
公开(公告)号：US08400390B2
公开(公告)日：2013-03-19
申请号：US12645902
申请日：2009-12-23
申请人： Min-Cheol Lee , Seung-Hwan Moon
发明人： Min-Cheol Lee , Seung-Hwan Moon
IPC分类号： G09G3/36 , G06F3/038 , G09G5/00
CPC分类号： G09G3/3677 , G09G2300/0426 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A gate driving device includes a plurality of stages, a first dummy stage connected to the plurality of stages and a second dummy stage connected to the first dummy stage. Stages of the plurality of stages are cascaded. The first dummy stage includes a first charge unit which receives a first input signal from a previous stage of the plurality of stages and is thereby charged, and a first pull-up transistor which outputs a clock signal when the first charge unit reaches a first charge level. The second dummy stage includes a second charge unit which receives a second input signal from the first dummy stage and is thereby charged, and a second pull-up transistor which outputs the clock signal when the second charge unit reaches a second charge level higher than the first charge level.
摘要翻译：栅极驱动装置包括多个级，连接到多个级的第一虚拟级和连接到第一虚拟级的第二虚拟级。多级的阶段是级联的。第一虚拟级包括第一充电单元，其接收来自多级的前一级的第一输入信号并由此充电;以及第一上拉晶体管，其在第一充电单元达到第一充电时输出时钟信号水平。第二虚拟级包括第二充电单元，其从第一虚拟级接收第二输入信号并由此被充电;以及第二上拉晶体管，当第二充电单元达到比第二充电电平高的第二充电电平时，输出时钟信号第一充电水平。

5. 发明申请

US20070296662A1 GATE DRIVING CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME 有权
标题翻译：闸门驱动电路和显示装置
公开(公告)号：US20070296662A1
公开(公告)日：2007-12-27
申请号：US11763144
申请日：2007-06-14
申请人： Min-Cheol Lee , Seung-Hwan Moon
发明人： Min-Cheol Lee , Seung-Hwan Moon
IPC分类号： G09G3/36
CPC分类号： G11C19/184 , G09G3/3677 , G09G2310/0286
摘要： In a gate driving circuit and a display apparatus, the gate driving circuit comprises a plurality of stages. At least one of the stages comprises a pull-up section responsive to a first node signal; a pull-down section responsive to a second input signal; a discharging section discharging the first node signal in response to the second input signal; a first holding section responsive to the first clock signal, maintaining the first node signal at the off-voltage; and a second holding section responsive to the second clock signal, maintaining the first node signal at the off-voltage. The second holding section has a greater transistor width-to-length ratio than the first holding section. Therefore, an abnormal gate-on signal is less likely to occur, reducing driving defects of the display apparatus.
摘要翻译：在栅极驱动电路和显示装置中，栅极驱动电路包括多个级。至少一个级包括响应于第一节点信号的上拉部分; 响应于第二输入信号的下拉部分; 放电部分，响应于所述第二输入信号而放电所述第一节点信号; 响应于所述第一时钟信号的第一保持部分，将所述第一节点信号保持在所述截止电压; 以及响应于第二时钟信号的第二保持部分，将第一节点信号保持在截止电压。第二保持部具有比第一保持部更大的晶体管宽度比。因此，不太可能发生异常的接通信号，减少了显示装置的驱动缺陷。

6. 发明授权

US09406272B2 Gate driving circuit having forward and reverse scan directions and display apparatus implementing the gate driving circuit 有权
标题翻译：具有正向和反向扫描方向的栅极驱动电路和实现栅极驱动电路的显示装置
公开(公告)号：US09406272B2
公开(公告)日：2016-08-02
申请号：US13301637
申请日：2011-11-21
申请人： Jae-Hoon Lee , Bon-Yong Koo , Seung-Hwan Moon , Won-Hee Lee
发明人： Jae-Hoon Lee , Bon-Yong Koo , Seung-Hwan Moon , Won-Hee Lee
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0283 , G09G2310/0286
摘要： A gate driving circuit includes a shift register and a vertical start line. The shift register includes first to N-th circuit stages sequentially providing first to N-th gate-on signals to first to N-th gate lines, respectively, at least one reverse dummy stage adjacent to the first circuit stage and at least one forward dummy stage adjacent to the N-th circuit stage (N is a natural number). The vertical start line is electrically connected to the first circuit stage or the N-th circuit stage according to a scan direction and transfers a vertical start signal to the first or N-th circuit stage.
摘要翻译：栅极驱动电路包括移位寄存器和垂直起始线。移位寄存器包括分别向第一至第N条栅极线分别提供第一至第N栅极导通信号的第一至第N电路级，与第一电路级相邻的至少一个反虚拟级和至少一个向前与第N个电路级相邻的虚拟级（N为自然数）。垂直起始线根据扫描方向电连接到第一电路级或第N电路级，并将垂直启动信号传送到第一或第N电路级。

7. 发明授权

US09361845B2 Display device compensating clock signal with temperature 有权
标题翻译：显示设备用温度补偿时钟信号
公开(公告)号：US09361845B2
公开(公告)日：2016-06-07
申请号：US11060797
申请日：2005-02-18
申请人： Seoung-Bum Pyoun , Seung-Hwan Moon
发明人： Seoung-Bum Pyoun , Seung-Hwan Moon
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2310/02 , G09G2310/0202 , G09G2310/0278 , G09G2320/0204 , G09G2320/041
摘要： A display device for improving display quality includes a pulse compensator, a gate driver, a source driver and a display panel. The pulse compensator generates a clock signal of which amplitude decreases when peripheral temperature increases and increases when peripheral temperature decreases. The gate driver outputs a gate driving signal to the display panel based on the clock signal, wherein an amplitude of the gate driving signal decreases when the peripheral temperature increases and the amplitude of the gate driving signal increases when the peripheral temperature decreases. The source driver provides a gray-scale voltage based on gray-scale data, and the display panel displays an image corresponding to the gray-scale voltage in response to the gate driving signal. Therefore, the deterioration in the drive capability of the gate driver depending on the peripheral temperature may be prevented and display quality of the display device may be improved.
摘要翻译：用于提高显示质量的显示装置包括脉冲补偿器，栅极驱动器，源极驱动器和显示面板。当周围温度升高时，脉冲补偿器产生振幅降低的时钟信号，当周围温度降低时，脉冲补偿器增加。栅极驱动器基于时钟信号向显示面板输出栅极驱动信号，其中当外围温度升高时，栅极驱动信号的幅度降低，并且当周边温度降低时栅极驱动信号的幅度增加。源极驱动器基于灰度数据提供灰度电压，并且显示面板响应于栅极驱动信号而显示对应于灰度电压的图像。因此，可以防止栅极驱动器根据周围温度的驱动能力的劣化，并且可以提高显示装置的显示质量。

8. 发明授权

US08542180B2 Method of driving display panel and display apparatus for performing the same 有权
标题翻译：驱动显示面板的方法和执行该显示面板的显示装置
公开(公告)号：US08542180B2
公开(公告)日：2013-09-24
申请号：US13217037
申请日：2011-08-24
申请人： Hye-Kwang Park , Sang-Heon Park , Seung-Hwan Moon
发明人： Hye-Kwang Park , Sang-Heon Park , Seung-Hwan Moon
IPC分类号： G09G3/36
CPC分类号： G09G3/3696 , G09G3/3648 , G09G2310/067 , G09G2330/027
摘要： A method of driving a display panel includes generating a gate on voltage, a first gate off voltage and a second gate off voltage. A clock signal is generated based upon the gate on voltage and the second gate off voltage. A first panel gate off voltage substantially the same as the first gate off voltage and a second panel gate off voltage substantially the same as the second gate off voltage are generated in a first operating mode. A first panel gate off voltage greater than the first gate off voltage and a second panel gate off voltage greater than the second gate off voltage are generated in a second operating mode. A gate signal is generated based upon the clock signal and the first and second panel gate off voltages to a gate line of the display panel.
摘要翻译：驱动显示面板的方法包括产生栅极导通电压，第一栅极截止电压和第二栅极截止电压。基于栅极导通电压和第二栅极截止电压产生时钟信号。在第一操作模式中产生与第一栅极截止电压基本相同的第一面板栅极截止电压和基本上与第二栅极截止电压基本相同的第二面板栅极截止电压。在第二操作模式中产生大于第一栅极截止电压的第一面板栅极截止电压和大于第二栅极截止电压的第二面板栅极截止电压。基于时钟信号和对显示面板的栅极线的第一和第二面板栅极截止电压产生栅极信号。

9. 发明申请

US20120293467A1 GATE DRIVING CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME 有权
标题翻译：闸门驱动电路和显示装置
公开(公告)号：US20120293467A1
公开(公告)日：2012-11-22
申请号：US13301637
申请日：2011-11-21
申请人： Jae-Hoon Lee , Bon-Yong Koo , Seung-Hwan Moon , Won-Hee Lee
发明人： Jae-Hoon Lee , Bon-Yong Koo , Seung-Hwan Moon , Won-Hee Lee
IPC分类号： G09G5/00 , G11C19/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0283 , G09G2310/0286
摘要： A gate driving circuit includes a shift register and a vertical start line. The shift register includes first to N-th circuit stages sequentially providing first to N-th gate-on signals to first to N-th gate lines, respectively, at least one reverse dummy stage adjacent to the first circuit stage and at least one forward dummy stage adjacent to the N-th circuit stage (N is a natural number). The vertical start line is electrically connected to the first circuit stage or the N-th circuit stage according to a scan direction and transfers a vertical start signal to the first or N-th circuit stage.
摘要翻译：栅极驱动电路包括移位寄存器和垂直起始线。移位寄存器包括分别向第一至第N条栅极线分别提供第一至第N栅极导通信号的第一至第N电路级，与第一电路级相邻的至少一个反虚拟级和至少一个向前与第N个电路级相邻的虚拟级（N为自然数）。垂直起始线根据扫描方向电连接到第一电路级或第N电路级，并将垂直启动信号传送到第一或第N电路级。

10. 发明授权

US08274460B2 Display driving device and method and liquid crystal display apparatus having the same 有权
标题翻译：显示驱动装置和方法以及具有该驱动装置和方法的液晶显示装置
公开(公告)号：US08274460B2
公开(公告)日：2012-09-25
申请号：US12115937
申请日：2008-05-06
申请人： Seung-Hwan Moon
发明人： Seung-Hwan Moon
IPC分类号： G09G3/36
CPC分类号： G09G3/3696 , G02F1/136286 , G09G3/3614 , G09G3/3648 , G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2300/0426 , G09G2300/08 , G09G2310/0205 , G09G2310/0251 , G09G2310/0281 , G09G2310/0297
摘要： A liquid crystal display apparatus includes a liquid crystal panel assembly having pixels arranged in a matrix form, which have a first group of pixels and a second group of pixels, gate lines having a first group of gate lines and a second group of gate lines that are connected with the first group of pixels and the second group of pixels, respectively, and data lines each of which is connected with one of the first group of pixels and one of the second group of pixels in every row of the matrix form. The liquid crystal display apparatus also includes a signal controller that receives input image signals and generates two groups of image data, a data driver that receives the two groups of image data and provides data voltages corresponding to the image data to the data lines, and a gate driving unit including a first gate driver that provides first gate-on signals to the first group of gate lines and a second gate driver that provides second gate-on signals to the second group of gate lines.
摘要翻译：液晶显示装置包括具有以矩阵形式布置的像素的液晶面板组件，其具有第一组像素和第二组像素，具有第一组栅极线的栅极线和第二组栅极线，分别与第一组像素和第二组像素连接，并且每个数据线与矩阵形式的每行中的第一组像素和第二组像素中的一个连接。液晶显示装置还包括接收输入图像信号并生成两组图像数据的信号控制器，接收两组图像数据并将对应于图像数据的数据电压提供给数据线的数据驱动器，以及门驱动单元，包括向第一组栅极线提供第一栅极导通信号的第一栅极驱动器和向第二组栅极线提供第二栅极导通信号的第二栅极驱动器。

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