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1. 发明申请

US20100029210A1 Method, apparatus and computer program for estimating spectrum using a folding ADC 审中-公开
标题翻译：使用折叠ADC估计频谱的方法，装置和计算机程序
公开(公告)号：US20100029210A1
公开(公告)日：2010-02-04
申请号：US12148859
申请日：2008-04-22
申请人： Mikko Kaltiokallio , Saska Lindfors , Jussi Ryynanen
发明人： Mikko Kaltiokallio , Saska Lindfors , Jussi Ryynanen
IPC分类号： H04B17/00 , G05B23/00
CPC分类号： H03J1/0091
摘要： To find frequency slots over which a cognitive radio can send an opportunistic transmission, a wideband spectrum is searched with a lower resolution to identify bandwidth slices having low or no signal levels. The identified bandwidth slices are searched with a higher resolution candidate frequency slices are selected as those bandwidth slices having least signal levels after the higher resolution searching, and ranked from lowest signal level to highest. A spectrum detection algorithm is executed on the selected candidate frequency slices in the order of the rank until it is decided that one of them has sufficiently free spectrum. A transmission is then opportunistically sent on the decided candidate frequency slice. Ongoing to the searching, intermittent signals are detected and a band about them is searched with the lower resolution to determine if the band about the detected intermittent signal is an identified bandwidth slice. Various techniques are shown for how the fine search is conducted.
摘要翻译：为了找到认知无线电可以在其上发送机会性传输的频率时隙，以较低的分辨率搜索宽带频谱以识别具有低信号级别或没有信号级别的带宽片段。用更高分辨率的候选频率片段搜索所识别的带宽片，作为在更高分辨率搜索之后具有最小信号电平的那些带宽片，并且从最低信号电平到最高排列。在所选择的候选频率片上以等级的顺序执行频谱检测算法，直到确定其中的一个具有足够的自由频谱。然后在所确定的候选频率片上机会地发送传输。进行搜索时，检测到间歇信号，并以较低的分辨率搜索关于它们的频带，以确定关于检测到的间歇信号的频带是否是识别的带宽片。显示了如何进行精细搜索的各种技术。

2. 发明授权

US08862088B2 Adjustable circuit architecture 有权
标题翻译：可调电路架构
公开(公告)号：US08862088B2
公开(公告)日：2014-10-14
申请号：US13497485
申请日：2009-09-22
申请人： Mikko Kaltiokallio , Jussi Ryynanen
发明人： Mikko Kaltiokallio , Jussi Ryynanen
IPC分类号： H04B1/10 , H03F1/32 , H03F3/19 , H03F3/45 , H03F1/34 , H03F3/191
CPC分类号： H03F1/34 , H03F1/3211 , H03F1/3241 , H03F3/19 , H03F3/191 , H03F3/45179 , H03F3/45183 , H03F2200/165 , H03F2200/168 , H03F2200/171 , H03F2200/294 , H03F2200/411 , H03F2203/45511 , H03F2203/45512 , H03F2203/45522 , H03F2203/45528 , H03F2203/45544 , H03F2203/45631 , H03F2203/45638 , H03F2203/45702
摘要： An amplifier circuitry having adjustable parameters is presented. The present amplifier circuitry includes a feed-back loop, wherein the feedback loop converts (26) a signal to another frequency, filters (20) the signal in the other frequency, and restores (24) the filtered signal back to the original frequency for inputting the signal to an input of the amplifier (22). The feed-back loop implements a band-stop filter (20) having an adjustable stopband causing the amplifier circuitry to have an adjustable band-pass response. A passband of the amplifier circuitry is changed from one operating frequency to another operating frequency by changing frequency conversion parameters of the feedback loop.
摘要翻译：提出了具有可调参数的放大器电路。本放大器电路包括反馈回路，其中反馈回路将信号转换（26）到另一个频率，对另一频率的信号进行滤波（20），并将滤波后的信号恢复（24）到原始频率将信号输入到放大器（22）的输入端。反馈回路实现具有可调节阻带的带阻滤波器（20），使得放大器电路具有可调节的带通响应。通过改变反馈回路的变频参数，将放大器电路的通带从一个工作频率改变到另一个工作频率。

3. 发明申请

US20120178391A1 ADJUSTABLE CIRCUIT ARCHITECTURE 有权
标题翻译：可调节电路架构
公开(公告)号：US20120178391A1
公开(公告)日：2012-07-12
申请号：US13497485
申请日：2009-09-22
申请人： Mikko Kaltiokallio , Jussi Ryynanen
发明人： Mikko Kaltiokallio , Jussi Ryynanen
IPC分类号： H04B7/00
CPC分类号： H03F1/34 , H03F1/3211 , H03F1/3241 , H03F3/19 , H03F3/191 , H03F3/45179 , H03F3/45183 , H03F2200/165 , H03F2200/168 , H03F2200/171 , H03F2200/294 , H03F2200/411 , H03F2203/45511 , H03F2203/45512 , H03F2203/45522 , H03F2203/45528 , H03F2203/45544 , H03F2203/45631 , H03F2203/45638 , H03F2203/45702
摘要： An amplifier circuitry having adjustable parameters is presented. The present amplifier circuitry includes a feed-back loop, wherein the feedback loop converts (26) a signal to another frequency, filters (20) the signal in the other frequency, and restores (24) the filtered signal back to the original frequency for inputting the signal to an input of the amplifier (22). The feed-back loop implements a band-stop filter (20) having an adjustable stopband causing the amplifier circuitry to have an adjustable band-pass response. A passband of the amplifier circuitry is changed from one operating frequency to another operating frequency by changing frequency conversion parameters of the feedback loop.
摘要翻译：提出了具有可调参数的放大器电路。本放大器电路包括反馈回路，其中反馈回路将信号转换（26）到另一个频率，对另一频率的信号进行滤波（20），并将滤波后的信号恢复（24）到原始频率将信号输入到放大器（22）的输入端。反馈回路实现具有可调节阻带的带阻滤波器（20），使得放大器电路具有可调节的带通响应。通过改变反馈回路的变频参数，将放大器电路的通带从一个工作频率改变到另一个工作频率。

4. 发明申请

US20060097787A1 Gain adjusting and circuit arrangement 有权
标题翻译：增益调节和电路布置
公开(公告)号：US20060097787A1
公开(公告)日：2006-05-11
申请号：US11314998
申请日：2005-12-23
申请人： Jussi Ryynanen , Jarkko Jussila
发明人： Jussi Ryynanen , Jarkko Jussila
IPC分类号： H03F3/45
CPC分类号： H03F3/45089 , H03F3/45085 , H03F2200/372 , H03F2203/45364 , H03F2203/45396 , H03F2203/45464 , H03F2203/45704 , H03G1/0023 , H03G1/0088
摘要： The present invention relates to a method and circuit arrangement for adjusting a gain, wherein said circuit arrangement comprises at least a first output branch connected to a first load and a second output branch connected to a second load. The gain control function is realized based on a current splitting, wherein a non-operated output branch is used as a kind of dummy branch for receiving a part of the output current. Thus, only as many output branches as there are outputs are required to implement a gain control based on splitting. Thereby, a complexity of the layout design is reduced and control and biasing of dummy branches is not required.
摘要翻译：本发明涉及一种用于调整增益的方法和电路装置，其中所述电路装置至少包括连接到第一负载的第一输出支路和连接到第二负载的第二输出支路。增益控制功能基于电流分配实现，其中非操作输出分支用作接收一部分输出电流的一种虚拟分支。因此，只需要有与输出一样多的输出分支来实现基于分割的增益控制。因此，布局设计的复杂性降低，并且不需要虚拟分支的控制和偏置。

5. 发明申请

US20100097140A1 AMPLIFICATION APPARATUS 有权
标题翻译：放大装置
公开(公告)号：US20100097140A1
公开(公告)日：2010-04-22
申请号：US12520015
申请日：2006-12-22
申请人： Jouni Kaukovuori , Jussi Ryynanen
发明人： Jouni Kaukovuori , Jussi Ryynanen
IPC分类号： H03F3/45
CPC分类号： H03F1/42 , H03F3/189
摘要： An amplification apparatus comprising first amplification circuitry having first shunt-peak circuitry and second amplification circuitry having second shunt-peak circuitry, wherein the amplification apparatus is arranged to provide an operational bandwidth over which the first and second amplification circuitry amplify signals, and wherein the second shunt-peak circuitry is arranged to use at least part of the first shunt-peak circuitry.
摘要翻译：一种放大装置，包括具有第一分流峰值电路的第一放大电路和具有第二分流峰值电路的第二放大电路，其中放大装置被设置成提供第一和第二放大电路放大信号的工作带宽，分流峰值电路布置成使用第一分流峰值电路的至少一部分。

6. 发明授权

US08063669B2 Frequency synthesizer having a plurality of independent output tones 有权
标题翻译：具有多个独立输出音调的频率合成器
公开(公告)号：US08063669B2
公开(公告)日：2011-11-22
申请号：US12291255
申请日：2008-11-06
申请人： Saska Lindfors , Kari Stadius , Liangge Xu , Tapio Rapinoja , Jussi Ryynanen , Risto H. S. Kaunisto , Aarno Parssinen
发明人： Saska Lindfors , Kari Stadius , Liangge Xu , Tapio Rapinoja , Jussi Ryynanen , Risto H. S. Kaunisto , Aarno Parssinen
IPC分类号： H03B21/00
CPC分类号： G06F1/022
摘要： Described is an apparatus that includes a frequency source and a plurality of time domain direct digital synthesizers each having an input connected to an output of the frequency source and an output providing an output frequency signal. A particular time domain direct digital synthesizer includes a sigma-delta modulator that functions as a second order multi-stage noise shaping sigma-delta modulator. In one exemplary embodiment sigma-delta modulator outputs provide a unitary-weighted word used to switch certain unit capacitors that comprise part of a delay modulator to produce a time-varying delay having a time-averaged value that directly corresponds to a binary value appearing on a plurality of phase accumulator outputs.
摘要翻译：描述了一种装置，其包括频率源和多个时域直接数字合成器，每个时域直接数字合成器具有连接到频率源的输出的输入端和提供输出频率信号的输出。特定的时域直接数字合成器包括用作二阶多级噪声整形Σ-Δ调制器的Σ-Δ调制器。在一个示例性实施例中，Σ-Δ调制器输出提供用于切换包括延迟调制器的一部分的某些单位电容器的单位加权字，以产生时变延迟，该时变延迟具有直接对应于出现在多个相位累加器输出。

7. 发明申请

US20100109714A1 Frequency synthesizer having a plurality of independent output tones 有权
标题翻译：具有多个独立输出音调的频率合成器
公开(公告)号：US20100109714A1
公开(公告)日：2010-05-06
申请号：US12291255
申请日：2008-11-06
申请人： Saska Lindfors , Kari Stadius , Liangge Xu , Tapio Rapinoja , Jussi Ryynanen , Risto H.S. Kaunisto , Aarno Parssinen
发明人： Saska Lindfors , Kari Stadius , Liangge Xu , Tapio Rapinoja , Jussi Ryynanen , Risto H.S. Kaunisto , Aarno Parssinen
IPC分类号： H03B21/00
CPC分类号： G06F1/022
摘要： Described is an apparatus that includes a frequency source and a plurality of time domain direct digital synthesizers each having an input connected to an output of the frequency source and an output providing an output frequency signal. A particular time domain direct digital synthesizer includes a sigma-delta modulator that functions as a second order multi-stage noise shaping sigma-delta modulator. In one exemplary embodiment sigma-delta modulator outputs provide a unitary-weighted word used to switch certain unit capacitors that comprise part of a delay modulator to produce a time-varying delay having a time-averaged value that directly corresponds to a binary value appearing on a plurality of phase accumulator outputs.
摘要翻译：描述了一种装置，其包括频率源和多个时域直接数字合成器，每个时域直接数字合成器具有连接到频率源的输出的输入端和提供输出频率信号的输出。特定的时域直接数字合成器包括用作二阶多级噪声整形Σ-Δ调制器的Σ-Δ调制器。在一个示例性实施例中，Σ-Δ调制器输出提供用于切换包括延迟调制器的一部分的某些单位电容器的单位加权字，以产生时变延迟，该时变延迟具有直接对应于出现在多个相位累加器输出。

8. 发明申请

US20080001673A1 Semiconductor Device 有权
标题翻译：半导体器件
公开(公告)号：US20080001673A1
公开(公告)日：2008-01-03
申请号：US11427867
申请日：2006-06-30
申请人： Jussi Ryynanen , Jouni Kaukovuori
发明人： Jussi Ryynanen , Jouni Kaukovuori
IPC分类号： H03F1/14
CPC分类号： H01L24/05 , H01L23/5222 , H01L2224/05553 , H01L2224/05556 , H01L2224/05599 , H01L2224/85399 , H01L2924/00014 , H01L2924/01015 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H03F1/26 , H03F1/52 , H03F3/195 , H03F2200/294 , H03F2200/444 , H03F2200/492 , H03H7/38 , H01L2224/45099 , H01L2924/00
摘要： An inductively degenerated low noise amplifier arrangement is shown having a transistor and a bonding pad connected to the input terminal of the transistor, wherein the bonding pad has parasitic capacitance, and wherein the bonding pad includes a metal layer connected to a second terminal of the transistor. In case of a field-effect transistor the second terminal may be the source and in case of a bipolar transistor the second terminal may be the emitter. The metal layer may be the ground plane of the bonding pad or an additional, intermediate layer.
摘要翻译：示出了具有连接到晶体管的输入端子的晶体管和接合焊盘的感应退化低噪声放大器布置，其中所述接合焊盘具有寄生电容，并且其中所述接合焊盘包括连接到所述晶体管的第二端子的金属层。在场效应晶体管的情况下，第二端子可以是源极，在双极晶体管的情况下，第二端子可以是发射极。金属层可以是接合焊盘的接地平面或附加的中间层。

9. 发明授权

US08085096B2 Apparatus and method for improved amplifier shunt-peak loading 有权
标题翻译：改善放大器并联峰值负载的装置和方法
公开(公告)号：US08085096B2
公开(公告)日：2011-12-27
申请号：US12520015
申请日：2006-12-22
申请人： Jouni Kaukovuori , Jussi Ryynanen
发明人： Jouni Kaukovuori , Jussi Ryynanen
IPC分类号： H03F3/191 , H03F3/68 , H03F3/45
CPC分类号： H03F1/42 , H03F3/189
摘要： An amplification apparatus comprising first amplification circuitry having first shunt-peak circuitry and second amplification circuitry having second shunt-peak circuitry, wherein the amplification apparatus is arranged to provide an operational bandwidth over which the first and second amplification circuitry amplify signals, and wherein the second shunt-peak circuitry is arranged to use at least part of the first shunt-peak circuitry.
摘要翻译：一种放大装置，包括具有第一分流峰值电路的第一放大电路和具有第二分流峰值电路的第二放大电路，其中放大装置被设置成提供第一和第二放大电路放大信号的工作带宽，分流峰值电路布置成使用第一分流峰值电路的至少一部分。

10. 发明申请

US20070132511A1 Gain adjusting and circuit arrangement 有权
标题翻译：增益调节和电路布置
公开(公告)号：US20070132511A1
公开(公告)日：2007-06-14
申请号：US11657773
申请日：2007-01-24
申请人： Jussi Ryynanen , Jarkko Jussila
发明人： Jussi Ryynanen , Jarkko Jussila
IPC分类号： H03F3/45
CPC分类号： H03F3/45089 , H03F3/45085 , H03F2200/372 , H03F2203/45364 , H03F2203/45396 , H03F2203/45464 , H03F2203/45704 , H03G1/0023 , H03G1/0088
摘要： The present invention relates to a method and circuit arrangement for adjusting a gain, wherein said circuit arrangement comprises at least a first output branch connected to a first load and a second output branch connected to a second load. The gain control function is realized based on a current splitting, wherein a non-operated output branch is used as a kind of dummy branch for receiving a part of the output current. Thus, only as many output branches as there are outputs are required to implement a gain control based on splitting. Thereby, a complexity of the layout design is reduced and control and biasing of dummy branches is not required.
摘要翻译：本发明涉及一种用于调整增益的方法和电路装置，其中所述电路装置至少包括连接到第一负载的第一输出支路和连接到第二负载的第二输出支路。增益控制功能基于电流分配实现，其中非操作输出分支用作接收一部分输出电流的一种虚拟分支。因此，只需要有与输出一样多的输出分支来实现基于分割的增益控制。因此，布局设计的复杂性降低，并且不需要虚拟分支的控制和偏置。

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