专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20140153335A1 ASYNCHRONOUS/SYNCHRONOUS INTERFACE 有权
标题翻译：异步/同步接口
公开(公告)号：US20140153335A1
公开(公告)日：2014-06-05
申请号：US14063773
申请日：2013-10-25
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C16/10
CPC分类号： G11C7/1072 , G06F13/1694 , G11C7/10 , G11C7/1045 , G11C7/22 , G11C14/0009 , G11C16/10 , Y02D10/14
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.
摘要翻译：本公开包括用于操作存储器件的方法和电路。用于操作存储器件的一个方法实施例包括通过至少部分地响应于第一接口触点上的写入使能信号向存储器件写入数据来控制通过异步模式的存储器接口的数据传输，以及从存储器件读取数据至少部分地响应于第二接口触点上的读使能信号。该方法还包括通过至少部分地响应于第一接口触点上的时钟信号传送数据，并且在不在异步模式下使用的接口触点上提供双向数据选通信号，来以同步模式控制数据传输。

2. 发明申请

US20180366166A1 ASYNCHRONOUS/SYNCHRONOUS INTERFACE 审中-公开
公开(公告)号：US20180366166A1
公开(公告)日：2018-12-20
申请号：US16110294
申请日：2018-08-23
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C7/10 , G11C14/00 , G11C7/22 , G11C16/10 , G06F13/16
CPC分类号： G11C7/1072 , G06F13/1694 , G11C7/10 , G11C7/1045 , G11C7/22 , G11C14/0009 , G11C16/10 , Y02D10/14
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.

3. 发明授权

US10083725B2 Asynchronous/synchronous interface 有权
公开(公告)号：US10083725B2
公开(公告)日：2018-09-25
申请号：US15674586
申请日：2017-08-11
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C7/10 , G06F13/16 , G11C7/22 , G11C16/10 , G11C14/00
CPC分类号： G11C7/1072 , G06F13/1694 , G11C7/10 , G11C7/1045 , G11C7/22 , G11C14/0009 , G11C16/10 , Y02D10/14
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.

4. 发明申请

US20200126601A1 ASYNCHRONOUS/SYNCHRONOUS INTERFACE 审中-公开
公开(公告)号：US20200126601A1
公开(公告)日：2020-04-23
申请号：US16663958
申请日：2019-10-25
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C7/10 , G11C14/00 , G11C16/10 , G11C7/22 , G06F13/16
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.

5. 发明申请

US20170345468A1 ASYNCHRONOUS/SYNCHRONOUS INTERFACE 审中-公开
公开(公告)号：US20170345468A1
公开(公告)日：2017-11-30
申请号：US15674586
申请日：2017-08-11
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C7/10 , G06F13/16 , G11C14/00 , G11C7/22 , G11C16/10
CPC分类号： G11C7/1072 , G06F13/1694 , G11C7/10 , G11C7/1045 , G11C7/22 , G11C14/0009 , G11C16/10 , Y02D10/14
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.

6. 发明申请

US20160064048A1 ASYNCHRONOUS/SYNCHRONOUS INTERFACE 有权
公开(公告)号：US20160064048A1
公开(公告)日：2016-03-03
申请号：US14938193
申请日：2015-11-11
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C7/10 , G11C14/00
CPC分类号： G11C7/1072 , G06F13/1694 , G11C7/10 , G11C7/1045 , G11C7/22 , G11C14/0009 , G11C16/10 , Y02D10/14
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.

7. 发明授权

US10861509B2 Asynchronous/synchronous interface 有权
公开(公告)号：US10861509B2
公开(公告)日：2020-12-08
申请号：US16663958
申请日：2019-10-25
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C7/10 , G06F13/16 , G11C7/22 , G11C16/10 , G11C14/00
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.

8. 发明授权

US10460775B2 Asynchronous/synchronous interface 有权
公开(公告)号：US10460775B2
公开(公告)日：2019-10-29
申请号：US16110294
申请日：2018-08-23
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C7/10 , G06F13/16 , G11C7/22 , G11C16/10 , G11C14/00
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.

9. 发明授权

US09754643B2 Asynchronous/synchronous interface 有权
公开(公告)号：US09754643B2
公开(公告)日：2017-09-05
申请号：US14938193
申请日：2015-11-11
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C7/00 , G11C7/10 , G06F13/16 , G11C7/22 , G11C16/10 , G11C14/00
CPC分类号： G11C7/1072 , G06F13/1694 , G11C7/10 , G11C7/1045 , G11C7/22 , G11C14/0009 , G11C16/10 , Y02D10/14
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.

10. 发明授权

US09190153B2 Asynchronous/synchronous interface 有权
标题翻译：异步/同步接口
公开(公告)号：US09190153B2
公开(公告)日：2015-11-17
申请号：US14063773
申请日：2013-10-25
申请人： Micron Technology, Inc.
发明人： Dean K. Nobunaga , June Lee , Chih Liang Chen
IPC分类号： G11C11/34 , G11C16/10 , G06F13/16 , G11C7/10 , G11C7/22
CPC分类号： G11C7/1072 , G06F13/1694 , G11C7/10 , G11C7/1045 , G11C7/22 , G11C14/0009 , G11C16/10 , Y02D10/14
摘要： The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.
摘要翻译：本公开包括用于操作存储器件的方法和电路。用于操作存储器件的一个方法实施例包括通过至少部分地响应于第一接口触点上的写入使能信号向存储器件写入数据来控制通过异步模式的存储器接口的数据传输，以及从存储器件读取数据至少部分地响应于第二接口触点上的读使能信号。该方法还包括通过至少部分地响应于第一接口触点上的时钟信号传送数据，并且在不在异步模式下使用的接口触点上提供双向数据选通信号，来以同步模式控制数据传输。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式