专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08360675B2 Adjustable tab folder 失效
标题翻译：可调节选项卡文件夹
公开(公告)号：US08360675B2
公开(公告)日：2013-01-29
申请号：US12563519
申请日：2009-09-21
申请人： Michael Kent , Chad Kendall , Kara Brunetta , Patrick Conway , Irene Wong
发明人： Michael Kent , Chad Kendall , Kara Brunetta , Patrick Conway , Irene Wong
IPC分类号： B41J3/407
CPC分类号： B42F7/02 , B42F21/06 , B42F21/10
摘要： Embodiments described herein relate to dividers and folders with tabs adjustable along at least two edges thereof. One embodiment is directed to a folder comprising a first panel, a second panel coupled to the first panel, at least one tab mating feature associated with the second panel, and a tab configured to mate with the at least one tab mating feature. The at least one tab mating feature is configured such that the tab is positionable in at least two positions along a first axis adjacent a first edge of the second panel and in at least two positions along a second axis adjacent a second edge of the second panel, wherein the first axis is transverse to the second axis.
摘要翻译：本文描述的实施例涉及具有可沿其至少两个边缘调节的突出部的分隔器和文件夹。一个实施例涉及一种包括第一面板，联接到第一面板的第二面板，与第二面板相关联的至少一个凸片配合特征以及配置成与该至少一个舌片配合特征配合的凸片的夹具。所述至少一个舌片配合特征被配置成使得所述舌片可位于沿着与所述第二面板的第一边缘相邻的第一轴线的至少两个位置，并且沿着邻近所述第二面板的第二边缘的第二轴线的至少两个位置，其中所述第一轴线横向于所述第二轴线。

2. 发明申请

US20100116872A1 ADJUSTABLE TAB FOLDER 失效
标题翻译：可调TAB文件夹
公开(公告)号：US20100116872A1
公开(公告)日：2010-05-13
申请号：US12563519
申请日：2009-09-21
申请人： Michael Kent , Chad Kendall , Kara Brunetta , Patrick Conway , Irene Wong
发明人： Michael Kent , Chad Kendall , Kara Brunetta , Patrick Conway , Irene Wong
IPC分类号： B65D27/00
CPC分类号： B42F7/02 , B42F21/06 , B42F21/10
摘要： Embodiments described herein relate to dividers and folders with tabs adjustable along at least two edges thereof. One embodiment is directed to a folder comprising a first panel, a second panel coupled to the first panel, at least one tab mating feature associated with the second panel, and a tab configured to mate with the at least one tab mating feature. The at least one tab mating feature is configured such that the tab is positionable in at least two positions along a first axis adjacent a first edge of the second panel and in at least two positions along a second axis adjacent a second edge of the second panel, wherein the first axis is transverse to the second axis.
摘要翻译：本文描述的实施例涉及具有可沿其至少两个边缘调节的突出部的分隔器和文件夹。一个实施例涉及一种包括第一面板，联接到第一面板的第二面板，与第二面板相关联的至少一个凸片配合特征以及配置成与该至少一个舌片配合特征配合的凸片的夹具。所述至少一个舌片配合特征被配置成使得所述舌片可位于沿着与所述第二面板的第一边缘相邻的第一轴线的至少两个位置，并且沿着邻近所述第二面板的第二边缘的第二轴线的至少两个位置，其中所述第一轴线横向于所述第二轴线。

3. 发明申请

US20120079205A1 METHOD AND APPARATUS FOR REDUCING PROCESSOR CACHE POLLUTION CAUSED BY AGGRESSIVE PREFETCHING 有权
标题翻译：减少处理器缓存引起的缓存引起的污染的方法和装置
公开(公告)号：US20120079205A1
公开(公告)日：2012-03-29
申请号：US12891027
申请日：2010-09-27
申请人： Patrick Conway
发明人： Patrick Conway
IPC分类号： G06F12/12
CPC分类号： G06F12/128 , G06F12/0862 , G06F12/0888 , G06F12/0897 , G06F2212/1021
摘要： A method and apparatus for controlling a first and second cache is provided. A cache entry is received in the first cache, and the entry is identified as having an untouched status. Thereafter, the status of the cache entry is updated to accessed in response to receiving a request for at least a portion of the cache entry, and the cache entry is subsequently cast out according to a preselected cache line replacement algorithm. The cast out cache entry is stored in the second cache according to the status of the cast out cache entry.
摘要翻译：提供了一种用于控制第一和第二高速缓存的方法和装置。在第一高速缓存中接收高速缓存条目，并且该条目被识别为具有未触动状态。此后，响应于接收到对高速缓存条目的至少一部分的请求，更新缓存条目的状态以被访问，并且高速缓存条目随后根据预先选择的高速缓存行替换算法被丢弃。根据丢弃缓存条目的状态，将丢弃的高速缓存条目存储在第二个缓存中。

4. 发明授权

US07930485B2 Speculative memory prefetch 有权
标题翻译：推测内存预取
公开(公告)号：US07930485B2
公开(公告)日：2011-04-19
申请号：US11780283
申请日：2007-07-19
申请人： Michael K Fertig , Patrick Conway , Kevin Michael Lepak , Cissy Xumin Yuan
发明人： Michael K Fertig , Patrick Conway , Kevin Michael Lepak , Cissy Xumin Yuan
IPC分类号： G06F13/00
CPC分类号： G06F9/383 , G06F9/3844 , G06F12/0862
摘要： A system and method for pre-fetching data from system memory. A multi-core processor accesses a cache hit predictor concurrently with sending a memory request to a cache subsystem. The predictor has two tables. The first table is indexed by a portion of a memory address and provides a hit prediction based on a first counter value. The second table is indexed by a core number and provides a hit prediction based on a second counter value. If neither table predicts a hit, a pre-fetch request is sent to memory. In response to detecting said hit prediction is incorrect, the pre-fetch is cancelled.
摘要翻译：一种用于从系统内存预取数据的系统和方法。多核处理器同时向缓存子系统发送存储器请求来访问高速缓存命中预测器。预测器有两个表。第一个表由存储器地址的一部分索引，并且基于第一计数器值提供命中预测。第二个表由一个核心编号索引，并提供一个基于第二个计数器值的命中预测。如果两个表都没有预测命中，则会将预取请求发送到内存。响应于检测到所述命中预测是不正确的，取消预取。

5. 发明申请

US20090327616A1 SNOOP FILTERING MECHANISM 有权
标题翻译： SNOOP过滤机制
公开(公告)号：US20090327616A1
公开(公告)日：2009-12-31
申请号：US12164871
申请日：2008-06-30
申请人： Patrick Conway , Kevin Michael Lepak
发明人： Patrick Conway , Kevin Michael Lepak
IPC分类号： G06F12/08
CPC分类号： G06F12/082 , G06F2212/2515 , Y02D10/13
摘要： A system and method for selectively transmitting probe commands and reducing network traffic. Directory entries are maintained to filter probe command and response traffic for certain coherent transactions. Rather than storing directory entries in a dedicated directory storage, directory entries may be stored in designated locations of a shared cache memory subsystem, such as an L3 cache. Directory entries are stored within the shared cache memory subsystem to provide indications of lines (or blocks) that may be cached in exclusive-modified, owned, shared, shared-one, or invalid coherency states. The absence of a directory entry for a particular line may imply that the line is not cached anywhere in a computing system.
摘要翻译：用于选择性地发送探测命令并减少网络流量的系统和方法。维护目录条目以过滤某些连贯事务的探测命令和响应流量。目录条目不是将目录条目存储在专用目录存储器中，而是可以存储在共享高速缓冲存储器子系统的指定位置，例如L3高速缓存。目录条目存储在共享高速缓冲存储器子系统内，以提供可以被排除在修改的，拥有的，共享的，共享的或无效的一致性状态中被缓存的行（或块）的指示。没有特定行的目录条目可能意味着该行不会在计算系统的任何位置缓存。

6. 外观设计

USD581246S1 Biometric door lock assembly 有权
标题翻译：生物识别门锁组件
公开(公告)号：USD581246S1
公开(公告)日：2008-11-25
申请号：US29279995
申请日：2007-05-14
申请人： Patrick Conway
设计人： Patrick Conway

7. 发明授权

US07334102B1 Apparatus and method for balanced spinlock support in NUMA systems 有权
标题翻译： NUMA系统平衡自旋锁支架的装置和方法
公开(公告)号：US07334102B1
公开(公告)日：2008-02-19
申请号：US10434692
申请日：2003-05-09
申请人： Patrick Conway
发明人： Patrick Conway
IPC分类号： G06F12/00
CPC分类号： G06F9/526
摘要： A data processor (300) is adapted for use in a non uniform memory access (NUMA) data processing system (10) having a local memory (320) and a remote memory. The data processor (300) includes a central processing unit (302) and a communication link controller (310). The central processing unit (302) executes a plurality of instructions including an atomic instruction on a lock variable, and generates an access request that includes a lock acquire attribute in response to executing the atomic instruction on the lock variable. The communication link controller (310) is coupled to the central processing unit (302) and has an output adapted to be coupled to the remote memory, and selectively provides the access request with the lock acquire attribute to the remote memory if an address of the access request corresponds to the remote memory.
摘要翻译：数据处理器（300）适于在具有本地存储器（320）和远程存储器的非均匀存储器访问（NUMA）数据处理系统（10）中使用。数据处理器（300）包括中央处理单元（302）和通信链路控制器（310）。中央处理单元（302）执行包含锁定变量的原子指令的多个指令，并且响应于对锁定变量执行原子指令，生成包括锁定获取属性的访问请求。通信链路控制器（310）耦合到中央处理单元（302）并且具有适于耦合到远程存储器的输出端，并且如果存储器的地址为访问请求对应于远程内存。

8. 发明授权

US08185695B2 Snoop filtering mechanism 有权
标题翻译：监听过滤机制
公开(公告)号：US08185695B2
公开(公告)日：2012-05-22
申请号：US12164871
申请日：2008-06-30
申请人： Patrick Conway , Kevin Michael Lepak
发明人： Patrick Conway , Kevin Michael Lepak
IPC分类号： G06F12/08 , G06F13/00
CPC分类号： G06F12/082 , G06F2212/2515 , Y02D10/13
摘要： A system and method for selectively transmitting probe commands and reducing network traffic. Directory entries are maintained to filter probe command and response traffic for certain coherent transactions. Rather than storing directory entries in a dedicated directory storage, directory entries may be stored in designated locations of a shared cache memory subsystem, such as an L3 cache. Directory entries are stored within the shared cache memory subsystem to provide indications of lines (or blocks) that may be cached in exclusive-modified, owned, shared, shared-one, or invalid coherency states. The absence of a directory entry for a particular line may imply that the line is not cached anywhere in a computing system.
摘要翻译：用于选择性地发送探测命令并减少网络流量的系统和方法。维护目录条目以过滤某些连贯事务的探测命令和响应流量。目录条目不是将目录条目存储在专用目录存储器中，而是可以存储在共享高速缓冲存储器子系统的指定位置，例如L3高速缓存。目录条目存储在共享高速缓冲存储器子系统中，以提供可以被排除在修改的，拥有的，共享的，共享的或无效的一致性状态中被缓存的行（或块）的指示。没有特定行的目录条目可能意味着该行不会在计算系统的任何位置缓存。

9. 发明申请

US20090024835A1 SPECULATIVE MEMORY PREFETCH 有权
标题翻译：分析性记忆预言
公开(公告)号：US20090024835A1
公开(公告)日：2009-01-22
申请号：US11780283
申请日：2007-07-19
申请人： Michael K. Fertig , Patrick Conway , Kevin Michael Lepak , Cissy Xumin Yuan
发明人： Michael K. Fertig , Patrick Conway , Kevin Michael Lepak , Cissy Xumin Yuan
IPC分类号： G06F9/40
CPC分类号： G06F9/383 , G06F9/3844 , G06F12/0862
摘要： A system and method for pre-fetching data from system memory. A multi-core processor accesses a cache hit predictor concurrently with sending a memory request to a cache subsystem. The predictor has two tables. The first table is indexed by a portion of a memory address and provides a hit prediction based on a first counter value. The second table is indexed by a core number and provides a hit prediction based on a second counter value. If neither table predicts a hit, a pre-fetch request is sent to memory. In response to detecting said hit prediction is incorrect, the pre-fetch is cancelled.
摘要翻译：一种用于从系统内存预取数据的系统和方法。多核处理器同时向缓存子系统发送存储器请求来访问高速缓存命中预测器。预测器有两个表。第一个表由存储器地址的一部分索引，并且基于第一计数器值提供命中预测。第二个表由核心编号索引，并且基于第二计数器值提供命中预测。如果两个表都没有预测命中，则会将预取请求发送到内存。响应于检测到所述命中预测是不正确的，取消预取。

10. 发明授权

US06868485B1 Computer system with integrated directory and processor cache 失效
标题翻译：具有集成目录和处理器缓存的计算机系统
公开(公告)号：US06868485B1
公开(公告)日：2005-03-15
申请号：US10256318
申请日：2002-09-27
申请人： Patrick Conway
发明人： Patrick Conway
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/082 , G06F2212/2515 , Y02D10/13
摘要： A computer system with an integrated directory and processor cache. Directory entries are maintained to filter probe command and response traffic for certain coherent transactions. Rather than storing directory entries in a dedicated directory storage, directory entries may be stored in designated locations of cache memory subsystem, such as an L2 cache, associated with a processor core. In one particular implementation, directory entries are stored within the cache memory subsystem to provide indications of lines (or blocks) that may be cached in modified, exclusive, or owned coherency states. The absence of a directory entry for a particular line may imply that the line is cached in either shared or invalid states.
摘要翻译：具有集成目录和处理器缓存的计算机系统。维护目录条目以过滤某些连贯事务的探测命令和响应流量。目录条目可以存储在与处理器核心相关联的高速缓冲存储器子系统（例如L2高速缓存）的指定位置中，而不是将目录条目存储在专用目录存储器中。在一个特定实现中，目录条目存储在高速缓冲存储器子系统内以提供可以被修改，排他或拥有的一致性状态缓存的行（或块）的指示。没有特定行的目录条目可能意味着该行被缓存在共享状态或无效状态。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式