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    • 6. 发明申请
    • SEMICONDUCTOR STRUCTURES AND METHODS FOR STABILIZING SILICON-COMPRISING STRUCTURES ON A SILICON OXIDE LAYER OF A SEMICONDUCTOR SUBSTRATE
    • 用于稳定半导体衬底的氧化硅层上的含硅结构的半导体结构和方法
    • US20100308440A1
    • 2010-12-09
    • US12480286
    • 2009-06-08
    • Frank S. JOHNSONAndreas KNORR
    • Frank S. JOHNSONAndreas KNORR
    • H01L21/302H01L29/06
    • H01L29/66795
    • Methods are provided for substantially preventing and filling overetched regions in a silicon oxide layer of a semiconductor substrate. The overetched regions may be formed as a result of overetching of the silicon oxide layer during etching of an overlying silicon-comprising material layer to form a silicon-comprising structure. An etch resistant spacer may be formed after the initial or subsequent overetches. The etch resistant spacer may be formed by depositing an etch resistant material into the overetched region and etching the deposited etch resistant material to leave residual etch resistant material forming the etch resistant spacer. The etch resistant spacer may also be formed by exposing the silicon oxide layer in the overetched region to a nitrogen-supplying material to form a silicon oxynitride etch resistant spacer.
    • 提供了用于基本上防止和填充半导体衬底的氧化硅层中的过蚀刻区域的方法。 在蚀刻覆盖的含硅材料层以形成含硅结构的过程中,可以形成过蚀刻区域作为氧化硅层的过蚀刻的结果。 可以在初始或随后的过程之后形成耐蚀刻间隔物。 耐蚀刻间隔物可以通过将抗蚀刻材料沉积到过蚀刻区域中并蚀刻沉积的耐蚀刻材料以形成形成耐蚀刻间隔物的残留耐蚀刻材料来形成。 也可以通过将过蚀区域中的氧化硅层暴露于氮供给材料以形成氮氧化硅耐腐蚀间隔物来形成耐蚀刻间隔物。
    • 8. 发明申请
    • SEMICONDUCTOR STRUCTURES AND METHODS FOR FORMING ISOLATION BETWEEN FIN STRUCTURES OF FINFET DEVICES
    • 半导体结构和在FINFET器件的FIN结构之间形成隔离的方法
    • US20110068431A1
    • 2011-03-24
    • US12562849
    • 2009-09-18
    • Andreas KNORRFrank Scott JOHNSON
    • Andreas KNORRFrank Scott JOHNSON
    • H01L29/06H01L21/762
    • H01L21/76229H01L29/66795H01L29/7851
    • Semiconductor structures and methods for forming isolation between fin structures formed from a bulk silicon wafer are provided. A bulk silicon wafer is provided having one or more fin structures formed therefrom. Forming of the fin structures defines isolation trenches between the one or more fin structures. Each of the fin structures has vertical sidewalls. An oxide layer is deposited in the isolation trenches and on the vertical sidewalls using HPDCVD in about a 4:1 ratio or greater. The oxide layer is isotropically etched to remove the oxide layer from the vertical sidewalls and a portion of the oxide layer from the bottom of the isolation trenches. A substantially uniformly thick isolating oxide layer is formed on the bottom of the isolation trench to isolate the one or more fin structures and substantially reduce fin height variability.
    • 提供了用于形成由体硅晶片形成的翅片结构之间的隔离的半导体结构和方法。 提供具有由其形成的一个或多个翅片结构的体硅晶片。 翅片结构的形成限定了一个或多个翅片结构之间的隔离沟槽。 每个翅片结构都具有垂直侧壁。 使用HPDCVD以大约4:1的比例或更大的比例在隔离沟槽和垂直侧壁上沉积氧化物层。 氧化层被各向同性蚀刻以从隔离沟底部的垂直侧壁和氧化物层的一部分去除氧化物层。 在隔离沟槽的底部上形成基本上均匀的厚的隔离氧化物层,以隔离一个或多个翅片结构,并显着降低翅片高度的可变性。
    • 9. 发明申请
    • METHODS FOR FABRICATING BULK FINFET DEVICES HAVING DEEP TRENCH ISOLATION
    • 用于制造具有深度分离隔离的块状FINFET器件的方法
    • US20110045648A1
    • 2011-02-24
    • US12544931
    • 2009-08-20
    • Andreas KNORRFrank Scott JOHNSON
    • Andreas KNORRFrank Scott JOHNSON
    • H01L21/336H01L21/762
    • H01L21/76232H01L29/66795H01L29/7851
    • Methods are provided for fabricating Bulk FinFET devices having deep trench isolation. One or more deep isolation trenches are formed in a bulk silicon wafer. Mandrel-forming material is deposited overlying the bulk silicon wafer and dielectric pad layer thereon and simultaneously into the trench(es) as filler material. Mandrels are formed, overetching thereof creating a recess at the trench upper end. A conformal sidewall spacer material from which sidewall spacers are fabricated is deposited overlying the mandrels and into the recess forming a spacer overlying the filler material in the trench(es). Mandrels are removed using the spacer as an etch stop. Fin structures are formed from the bulk silicon wafer using the sidewall spacers as an etch mask. The mandrel-forming material is amorphous and/or polycrystalline silicon.
    • 提供了用于制造具有深沟槽隔离的块状FinFET器件的方法。 在体硅晶片中形成一个或多个深隔离沟槽。 在其上的沉积硅晶片和介质垫层上沉积形成心轴的材料,同时沉积到作为填充材料的沟槽中。 形成心轴,其过蚀刻在沟槽上端形成凹部。 制造侧壁间隔件的共形侧壁间隔材料沉积在芯轴上并且形成凹槽,形成覆盖沟槽中的填充材料的间隔物。 使用间隔物去除心轴作为蚀刻停止。 使用侧壁间隔物作为蚀刻掩模,从体硅晶片形成翅片结构。 心轴形成材料是非晶和/或多晶硅。
    • 10. 发明申请
    • SEMICONDUCTOR STRUCTURES AND METHODS FOR REDUCING SILICON OXIDE UNDERCUTS IN A SEMICONDUCTOR SUBSTRATE
    • 用于减少半导体衬底中的氧化硅衬底的半导体结构和方法
    • US20100308382A1
    • 2010-12-09
    • US12480279
    • 2009-06-08
    • Frank S. JOHNSONAndreas KNORR
    • Frank S. JOHNSONAndreas KNORR
    • H01L29/78H01L21/302H01L21/28
    • H01L29/66795H01L21/3065
    • Methods are provided for fabricating semiconductor structures with an etch resistant layer that reduces undercuts in a silicon oxide layer of a semiconductor substrate. The semiconductor substrate is provided having the silicon oxide layer. The etch resistant layer is formed which uses at least a portion of the silicon oxide layer. A silicon-comprising material layer is formed overlying the etch resistant layer. The silicon-comprising material layer has an etch rate greater than an etch rate of the etch resistant layer when subjected to an etchant. The silicon-comprising material layer is etched with an etchant to form a fin structure on the silicon oxide layer. The etch resistant layer may be formed by ion implantation, diffusing nitrogen-supplying species into the silicon oxide layer, or forming an insulator material layer overlying the silicon oxide layer.
    • 提供了用于制造具有减少半导体衬底的氧化硅层中的底切的耐蚀刻层的半导体结构的方法。 提供具有氧化硅层的半导体衬底。 形成耐蚀层,其使用氧化硅层的至少一部分。 形成覆盖耐蚀刻层的含硅材料层。 当经受蚀刻剂时,含硅材料层的蚀刻速率大于耐蚀刻层的蚀刻速率。 用蚀刻剂蚀刻含硅材料层,以在氧化硅层上形成翅片结构。 耐蚀刻层可以通过离子注入形成,将氮供应物质扩散到氧化硅层中,或者形成覆盖氧化硅层的绝缘体材料层。