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1. 发明授权

US5491105A LDMOS transistor with self-aligned source/backgate and photo-aligned gate 失效
标题翻译： LDMOS晶体管具有自对准源/背栅和光对准栅极
公开(公告)号：US5491105A
公开(公告)日：1996-02-13
申请号：US303792
申请日：1994-09-09
申请人： Michael C. Smayling , Manuel L. Torreno, Jr., deceased , Georges Falessi
发明人： Michael C. Smayling , Manuel L. Torreno, Jr., deceased , Georges Falessi
IPC分类号： H01L21/324 , H01L21/336 , H01L21/8234 , H01L21/8247 , H01L27/06 , H01L27/088 , H01L27/115 , H01L29/06 , H01L29/08 , H01L29/735 , H01L29/78 , H01L21/822
CPC分类号： H01L29/7816 , H01L21/823456 , H01L29/66689 , H01L29/66712 , H01L29/735 , H01L29/7801 , H01L29/7809 , H01L29/0692 , H01L29/0696 , H01L29/0847 , H01L29/086 , H01L29/0878 , H01L29/1095 , H01L29/42368 , Y10S148/151
摘要： An embodiment of the present invention is a method of fabricating power and non-power devices on a semiconductor substrate, the method comprising: forming alignment marks in the substrate (100); introducing a dopant of a first conductivity type into the substrate to form high-voltage tank regions (103); annealing the dopants (105); introducing dopants of the first conductivity type and a second conductivity type in a region in the high-voltage tank region (109); annealing the dopants of the first and the second conductivity type to form a second region within a third region, both within the high-voltage tank region, due to the different rates of diffusion of the dopants (110); and forming gate structures after the annealing of the dopants of the first and second conductivity types (122).
摘要翻译：本发明的实施例是一种在半导体衬底上制造功率和非功率器件的方法，所述方法包括：在衬底（100）中形成对准标记; 将第一导电类型的掺杂剂引入所述衬底中以形成高压罐区域（103）; 退火掺杂剂（105）; 在高压罐区域（109）的区域中引入第一导电类型和第二导电类型的掺杂剂; 由于掺杂剂（110）的扩散速率不同，在第一区域和第二导电类型的掺杂剂中退火，以在第三区域内形成第二区域。以及在第一和第二导电类型（122）的掺杂剂退火之后形成栅极结构。

2. 发明授权

US5811850A LDMOS transistors, systems and methods 失效
标题翻译： LDMOS晶体管，系统和方法
公开(公告)号：US5811850A
公开(公告)日：1998-09-22
申请号：US617431
申请日：1996-03-13
申请人： Michael C. Smayling , Manuel L. Torreno, Jr., deceased
发明人： Michael C. Smayling , Manuel L. Torreno, Jr., deceased
IPC分类号： H01L21/336 , H01L21/8234 , H01L27/088 , H01L29/06 , H01L29/08 , H01L29/78
CPC分类号： H01L29/66659 , H01L27/088 , H01L29/1095 , H01L29/66674 , H01L29/7816 , H01L29/0696 , H01L29/086 , H01L29/0878 , H01L29/42368
摘要： A process for the fabrication of an improved LDMOS transistor, and such an improved LDMOS transistor are provided. The improved LDMOS transistor is in a semiconductor layer of a first conductivity type. The transistor has a source and drain of a second conductivity type (opposite the first conductivity type) and a channel of the first conductivity type with a conductive gate insulatively disposed over the channel. A low-voltage tank of the second conductivity type is used to contain the drain drift region and because of its lower sheet resistance provides a lower R.sub.DS (on). This tank of the second conductivity type extends from the field oxide at the exterior perimeter of the drain region, joins with the channel region and extends below the gate oxide and field oxide associated therewith. Optionally, a high-voltage tank of the second conductivity type is used to contain the entire area of the device, including the first tank of the second conductivity type, and isolate it from the substrate to provide a high breakdown voltage. The transistor without the optional high-voltage tank is particularly appropriate for use as the low-side driver (LSD) portion of an H-bridge. For the high-side driver (HSD) portion of an H-bridge the device with the optional high-voltage tank of the second conductivity type is used. The LSD and HSD devices of the present invention may also be used as separate stand-alone devices.
摘要翻译：提供了一种用于制造改进的LDMOS晶体管的工艺，以及这种改进的LDMOS晶体管。改进的LDMOS晶体管处于第一导电类型的半导体层。晶体管具有第二导电类型（与第一导电类型相反）的源极和漏极以及绝缘地设置在沟道上的第一导电类型的沟道。使用第二导电类型的低压罐来容纳漏极漂移区域，并且由于其较低的薄层电阻提供较低的RDS（on）。该第二导电类型的槽从漏区的外周边的场氧化物延伸，与沟道区连接并且延伸到与之相关的栅极氧化物和场氧化物的下面。可选地，使用第二导电类型的高压罐来容纳包括第二导电类型的第一罐的装置的整个区域，并将其与衬底隔离以提供高的击穿电压。没有可选高压槽的晶体管特别适用于H桥的低侧驱动器（LSD）部分。对于H桥的高侧驱动器（HSD）部分，使用具有第二导电类型的可选高压罐的装置。本发明的LSD和HSD装置也可以用作单独的独立装置。

3. 发明授权

US5767551A Intergrated circuit combining high frequency bipolar and high power CMOS transistors 失效
公开(公告)号：US5767551A
公开(公告)日：1998-06-16
申请号：US811384
申请日：1997-03-04
申请人： Michael C. Smayling , Ronald N. Parker , Manuel L. Torreno, Jr., deceased
发明人： Michael C. Smayling , Ronald N. Parker , Manuel L. Torreno, Jr., deceased
IPC分类号： H01L21/8247 , H01L21/331 , H01L21/8234 , H01L21/8249 , H01L27/06 , H01L27/088 , H01L27/115 , H01L29/73 , H01L29/732 , H01L29/788 , H01L29/792 , H01L29/12
CPC分类号： H01L21/823456 , H01L27/0623 , H01L27/088
摘要： A process flow which can be used to fabricate a high frequency bipolar transistor 147, a power transistor 146, and non-power MOS devices on a single substrate while maintaining superior performance. The process flow forms an initial high-voltage tank 170 in substrate 150. A thin epitaxial layer 156 is formed on the substrate which overlies the initial high voltage tank and Diffusion Under Film, DUF, region 154. The high voltage tank is extended through the epitaxial layer and power transistor 146 is formed in the high voltage tank and high frequency bipolar transistor 147 is formed in the epitaxial layer using the DUF region as a deep collector. Other types of low voltage devices 139 and 140 and mid voltage devices 141-145 and 148-149 are formed unaffected by the presence of epitaxial layer 156. A single chip transmitter 400 and a single chip receiver 410 is fabricated with high frequency transistors and power devices. A single chip disk controller 460 is fabricated with high frequency transistors and power devices.

4. 发明授权

US5917222A Intergrated circuit combining high frequency bipolar and high power CMOS transistors 失效
标题翻译：集成了高频双极和高功率CMOS晶体管的集成电路
公开(公告)号：US5917222A
公开(公告)日：1999-06-29
申请号：US27160
申请日：1998-02-20
申请人： Michael C. Smayling , Ronald N. Parker , Manuel L. Torreno, Jr., deceased
发明人： Michael C. Smayling , Ronald N. Parker , Manuel L. Torreno, Jr., deceased
IPC分类号： H01L21/8247 , H01L21/331 , H01L21/8234 , H01L21/8249 , H01L27/06 , H01L27/088 , H01L27/115 , H01L29/73 , H01L29/732 , H01L29/788 , H01L29/792 , H01L29/12
CPC分类号： H01L21/823456 , H01L27/0623 , H01L27/088
摘要： A process flow which can be used to fabricate a high frequency bipolar transistor 147, a power transistor 146, and non-power MOS devices on a single substrate while maintaining superior performance. The process flow forms an initial high-voltage tank 170 in substrate 150. A thin epitaxial layer 156 is formed on the substrate which overlies the initial high voltage tank and Diffusion Under Film, DUF, region 154. The high voltage tank is extended through the epitaxial layer and power transistor 146 is formed in the high voltage tank and high frequency bipolar transistor 147 is formed in the epitaxial layer using the DUF region as a deep collector. Other types of low voltage devices 139 and 140 and mid voltage devices 141-145 and 148-149 are formed unaffected by the presence of epitaxial layer 156. A single chip transmitter 400 and a single chip receiver 410 is fabricated with high frequency transistors and power devices. A single chip disk controller 460 is fabricated with high frequency transistors and power devices.
摘要翻译：一种工艺流程，其可以用于在单个衬底上制造高频双极晶体管147，功率晶体管146和非功率MOS器件，同时保持优异的性能。工艺流程在衬底150中形成初始高压罐170.在衬底上形成薄的外延层156，其覆盖在初始高压罐和扩散底膜DUF区域154上。高压罐延伸通过外延层和功率晶体管146形成在高电压槽中，并且使用DUF区作为深集电体在外延层中形成高频双极晶体管147。形成其他类型的低电压器件139和140以及中间电压器件141-145和148-149，其不受外延层156的存在的影响。单芯片发射器400和单芯片接收器410由高频晶体管和功率设备。单芯片盘控制器460由高频晶体管和功率器件制成。

5. 发明授权

US5911104A Integrated circuit combining high frequency bipolar and high power CMOS transistors 失效
标题翻译：集成电路组合高频双极和大功率CMOS晶体管
公开(公告)号：US5911104A
公开(公告)日：1999-06-08
申请号：US27369
申请日：1998-02-20
申请人： Michael C. Smayling , Ronald N. Parker , Manuel L. Torreno, Jr., deceased
发明人： Michael C. Smayling , Ronald N. Parker , Manuel L. Torreno, Jr., deceased
IPC分类号： H01L21/8247 , H01L27/105 , H01L29/12
CPC分类号： H01L27/11526 , H01L27/105 , H01L27/11531
摘要： A process flow which can be used to fabricate a high frequency bipolar transistor 147, a power transistor 146, and non-power MOS devices on a single substrate while maintaining superior performance. The process flow forms an initial high-voltage tank 170 in substrate 150. A thin epitaxial layer 156 is formed on the substrate which overlies the initial high voltage tank and Diffusion Under Film, DUF, region 154. The high voltage tank is extended through the epitaxial layer and power transistor 146 is formed in the high voltage tank and high frequency bipolar transistor 147 is formed in the epitaxial layer using the DUF region as a deep collector. Other types of low voltage devices 139 and 140 and mid voltage devices 141-145 and 148-149 are formed unaffected by the presence of epitaxial layer 156. A single chip transmitter 400 and a single chip receiver 410 is fabricated with high frequency transistors and power devices. A single chip disk controller 460 is fabricated with high frequency transistors and power devices.
摘要翻译：一种工艺流程，其可以用于在单个衬底上制造高频双极晶体管147，功率晶体管146和非功率MOS器件，同时保持优异的性能。工艺流程在衬底150中形成初始高压罐170.在衬底上形成薄的外延层156，其覆盖在初始高压罐和扩散底膜DUF区域154上。高压罐延伸通过外延层和功率晶体管146形成在高电压槽中，并且使用DUF区作为深集电体在外延层中形成高频双极晶体管147。形成其他类型的低电压器件139和140以及中间电压器件141-145和148-149，其不受外延层156的存在的影响。单芯片发射器400和单芯片接收器410由高频晶体管和功率设备。单芯片盘控制器460由高频晶体管和功率器件制成。

6. 发明授权

US5585294A Method of fabricating lateral double diffused MOS (LDMOS) transistors 失效
标题翻译：制造横向双扩散MOS（LDMOS）晶体管的方法
公开(公告)号：US5585294A
公开(公告)日：1996-12-17
申请号：US324057
申请日：1994-10-14
申请人： Michael C. Smayling , Manuel L. Torreno, Jr., deceased
发明人： Michael C. Smayling , Manuel L. Torreno, Jr., deceased
IPC分类号： H01L21/336 , H01L21/8234 , H01L27/088 , H01L29/06 , H01L29/08 , H01L29/78 , H01L21/265
CPC分类号： H01L29/66659 , H01L27/088 , H01L29/1095 , H01L29/66674 , H01L29/7816 , H01L29/0696 , H01L29/086 , H01L29/0878 , H01L29/42368
摘要： A process for the fabrication of an improved LDMOS transistor, and such an improved LDMOS transistor are provided. The improved LDMOS transistor is in a semiconductor layer of a first conductivity type. The transistor has a source and drain of a second conductivity type (opposite the first conductivity type) and a channel of the first conductivity type with a conductive gate insulatively disposed over the channel. A low-voltage tank of the second conductivity type is used to contain the drain drift region and because of its lower sheet resistance provides a lower R.sub.DS (on). This tank of the second conductivity type extends from the field oxide at the exterior perimeter of the drain region, joins with the channel region and extends below the gate oxide and field oxide associated therewith. Optionally, a high-voltage tank of the second conductivity type is used to contain the entire area of the device, including the first tank of the second conductivity type, and isolate it from the substrate to provide a high breakdown voltage. The transistor without the optional high-voltage tank is particularly appropriate for use as the low-side driver (LSD) portion of an H-bridge. For the high-side driver (HSD) portion of an H-bridge the device with the optional high-voltage tank of the second conductivity type is used. The LSD and HSD devices of the present invention may also be used as separate stand-alone devices.
摘要翻译：提供了一种用于制造改进的LDMOS晶体管的工艺，以及这种改进的LDMOS晶体管。改进的LDMOS晶体管处于第一导电类型的半导体层。晶体管具有第二导电类型（与第一导电类型相反）的源极和漏极以及绝缘地设置在沟道上的第一导电类型的沟道。使用第二导电类型的低压罐来容纳漏极漂移区域，并且由于其较低的薄层电阻提供较低的RDS（on）。该第二导电类型的槽从漏区的外周边的场氧化物延伸，与沟道区连接并且延伸到与之相关的栅极氧化物和场氧化物的下面。可选地，使用第二导电类型的高压罐来容纳包括第二导电类型的第一罐的装置的整个区域，并将其与衬底隔离以提供高的击穿电压。没有可选高压槽的晶体管特别适用于H桥的低侧驱动器（LSD）部分。对于H桥的高侧驱动器（HSD）部分，使用具有第二导电类型的可选高压罐的装置。本发明的LSD和HSD装置也可以用作单独的独立装置。

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