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1. 发明授权

US5379392A Method of and apparatus for rapidly loading addressing registers 失效
标题翻译：快速加载寻址寄存器的方法和装置
公开(公告)号：US5379392A
公开(公告)日：1995-01-03
申请号：US809386
申请日：1991-12-17
申请人： Merwin H. Alferness , John Z. Nguyen
发明人： Merwin H. Alferness , John Z. Nguyen
IPC分类号： G06F12/02 , G06F12/06 , G06F9/35
CPC分类号： G06F12/0284
摘要： An apparatus for and method of loading the user addressing base register of a large scale multiprogrammed instruction processor. The base register is normally loaded to permit a user application program to access a different data segment. Providing a base register addressing environment for user application programs permits the software to be developed using virtual addressing. The addressing environment is specified by a stack of base registers. These are loaded from a data store specifying a virtual address for each data segment. During the loading process, an absolute address corresponding to the virtual address is loaded into each base register. To load a base register, a determination is made whether the future value differs from the previous value by a differential offset. If yes, the base register is loaded with an absolute address corresponding to the sum of the previous bank descriptor and the new offset. If no, the new base register value is computed by accessing a bank description table.
摘要翻译：一种用于加载大规模多编程指令处理器的用户寻址基址寄存器的装置和方法。基本寄存器通常被加载以允许用户应用程序访问不同的数据段。为用户应用程序提供基址寄存器寻址环境允许使用虚拟寻址来开发软件。寻址环境由一组基址寄存器指定。这些从数据存储器加载，指定每个数据段的虚拟地址。在加载过程中，将与虚拟地址对应的绝对地址加载到每个基址寄存器中。要加载基址寄存器，确定未来值是否与先前值差异偏移。如果是，基址寄存器将加载与前一个存储区描述符和新偏移量之和相对应的绝对地址。如果否，则通过访问存储区描述表来计算新的基址寄存器值。

2. 发明授权

US5611065A Address prediction for relative-to-absolute addressing 失效
标题翻译：相对绝对寻址的地址预测
公开(公告)号：US5611065A
公开(公告)日：1997-03-11
申请号：US306085
申请日：1994-09-14
申请人： Merwin H. Alferness , Joseph P. Kerzman , John Z. Nguyen
发明人： Merwin H. Alferness , Joseph P. Kerzman , John Z. Nguyen
IPC分类号： G06F9/355 , G06F9/38 , G06F12/00 , G06F9/26 , G06F9/34 , G06F12/02
CPC分类号： G06F9/342 , G06F9/383 , G06F9/3832
摘要： A base address prediction system for predicting one of a plurality of base addresses to be added to a known relative address in order to generate an absolute address. An actual base address determined from the relative address is also generated. The actual base address determination takes longer to generate than the predicted base address determination, and therefore the predicted base address is used to select a base address as long as the prediction is correct. Circuitry exists to compare the predicted base address with the actual base address, and if not equal, the predicted base address will be nullified, and the actual base address will be used. Prediction modes are dependent on whether the relative address indicates an instruction fetch or an operand fetch. Where the relative address indicates an instruction fetch, the prediction will be based on the last base address used, on the assumption that instructions will be contiguous in a single block of memory. Where the relative address indicates an operand fetch, the prediction will only change upon the occurrence of two consecutive incorrect predictions, and the actual base address will be used during incorrect prediction periods. Staged latching circuitry and comparison circuitry provides a method of determining whether two consecutive predictions were incorrect.
摘要翻译：一种基地址预测系统，用于预测要添加到已知相对地址的多个基地址之一以产生绝对地址。也会生成从相对地址确定的实际基址。实际的基地址确定比预测的基地址确定需要更长的时间，因此只要预测是正确的，就使用预测的基地址来选择基地址。存在电路以将预测的基地址与实际基地址进行比较，如果不相等，则预测的基地址将被取消，并且将使用实际的基地址。预测模式取决于相对地址是指示提取还是操作数提取。在相对地址指示取指的地方，预测将基于所使用的最后基地址，假设指令在单个存储器块中是连续的。在相对地址指示操作数提取的情况下，预测将仅在两次连续不正确预测的发生时发生变化，并且在不正确的预测期间将使用实际基地址。分段闭锁电路和比较电路提供了一种确定两个连续预测是否不正确的方法。

3. 发明授权

US5414821A Method of and apparatus for rapidly loading addressing environment by checking and loading multiple registers using a specialized instruction 失效
标题翻译：通过使用专门的指令检查和加载多个寄存器来快速加载寻址环境的方法和装置
公开(公告)号：US5414821A
公开(公告)日：1995-05-09
申请号：US809389
申请日：1991-12-17
申请人： John Z. Nguyen , Merwin H. Alferness
发明人： John Z. Nguyen , Merwin H. Alferness
IPC分类号： G06F9/312 , G06F12/02 , G06F9/00
CPC分类号： G06F9/30043 , G06F12/0292
摘要： An apparatus for and method of loading the addressing environment of a large scale multiprogrammed instruction processor. The addressing environment is normally loaded upon initiation of an application program. Providing a separate addressing environment for each application program permits the software to be developed using virtual addressing. The addressing environment is loaded to permit the instruction processor to convert the virtual addresses to absolute addresses. The addressing environment is specified by a stack of base registers. These are loaded sequentially from a data store containing the virtual address of the initial location of each data bank to be accessed. The virtual addresses are converted to absolute addresses for loading into the base registers. During the loading process, each virtual address is evaluated to determine if it defines a valid data bank. If it does, the corresponding base register is loaded. If the virtual address is not valid, the effort to load the corresponding base register is saved and the next valid virtual address is loaded.
摘要翻译：一种用于加载大规模多编程指令处理器的寻址环境的装置和方法。寻址环境通常在启动应用程序时加载。为每个应用程序提供单独的寻址环境允许使用虚拟寻址来开发软件。加载寻址环境以允许指令处理器将虚拟地址转换为绝对地址。寻址环境由一组基址寄存器指定。这些从包含要访问的每个数据库的初始位置的虚拟地址的数据存储顺序地加载。虚拟地址转换为绝对地址，以加载到基地址寄存器中。在加载过程中，对每个虚拟地址进行评估，以确定它是否定义了有效的数据库。如果是，则加载相应的基址寄存器。如果虚拟地址无效，则加载相应的基址寄存器的工作将被保存，并加载下一个有效的虚拟地址。

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