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1. 发明授权

US10554219B2 Analog-to-digital converter 有权
公开(公告)号：US10554219B2
公开(公告)日：2020-02-04
申请号：US16378794
申请日：2019-04-09
申请人： MELEXIS TECHNOLOGIES SA
发明人： Johan Raman , Pieter Rombouts
IPC分类号： H03M3/00
摘要： An analog-to-digital converter comprises a first quantizer arranged for yielding a first digital signal; an error signal generation block arranged for generating an error signal representative of a difference between an analog input signal and the first digital signal; an analog loop filter arranged for receiving the error signal; a second quantizer arranged for receiving an output signal of the analog loop filter and for outputting a second digital signal; a digital loop filter arranged for receiving the second digital signal and for providing an input signal to the first quantizer; and a recombiner block comprising a first recombination and a second recombination filter, and an adder circuit for adding outputs of the first and second recombination filters. The first and second recombination filters are selected to obtain an analog-to-digital converted output signal being less dependent on quantization noise caused by the first quantizer than a first digital signal.

2. 发明授权

US11428549B2 Position sensing device 有权
公开(公告)号：US11428549B2
公开(公告)日：2022-08-30
申请号：US16256146
申请日：2019-01-24
申请人： Melexis Technologies SA
发明人： Johan Raman , Gael Close , Pieter Rombouts
IPC分类号： G01D5/244 , G01D18/00 , G01D5/243 , G01D5/14
摘要： A position sensing device for measuring a position, comprises a position sensing device for measuring a position; a plurality of sensors arranged to produce sense signals each being a function of an input phase representative of a position to be measured; a combiner circuit arranged to generate an error signal by combining the sense signals according to an array of weight factors; a processing block including a loop filter to filter the error signal and arranged to output a phase value representative of the position; and a feedback loop comprising a feedback signal unit arranged for receiving the output phase value and for adjusting based on the received output phase value of the array of weight factors.

3. 发明授权

US10491236B2 Offset compensation circuit for a tracking loop 有权
公开(公告)号：US10491236B2
公开(公告)日：2019-11-26
申请号：US16277549
申请日：2019-02-15
申请人： Melexis Technologies SA
发明人： Johan Raman , Pieter Rombouts
IPC分类号： H03M3/00 , H03M1/06
CPC分类号： H03M3/356 , H03M1/0607 , H03M3/34 , H03M3/464
摘要： An offset compensation circuit comprises an error signal generation block arranged for receiving an input phase and an output phase, and for generating an error signal indicative of an error between the input phase and the output phase. Means are provided for combining the error signal with an offset compensation signal, yielding an offset compensated signal. A loop filter is arranged for receiving the offset compensated signal and for outputting the output phase. An offset compensation block is arranged for receiving the output phase and for determining the offset compensation signal. The offset compensation signal comprises at least a contribution proportional to a periodic function of the output phase.

4. 发明授权

US10148237B2 Low noise amplifier circuit 有权
公开(公告)号：US10148237B2
公开(公告)日：2018-12-04
申请号：US15402502
申请日：2017-01-10
申请人： Melexis Technologies SA
发明人： Johan Raman , Pieter Rombouts
IPC分类号： H03F3/387 , H03F3/45 , H03F3/00 , H03F3/393 , G01C17/28 , G01D5/14 , G01R33/07
摘要： A semiconductor circuit comprising an input block having a first chopper providing a chopped voltage signal, a first transconductance converting said chopped voltage signal into a chopped current signal, a second chopper providing a demodulated current signal, a current integrator having an integrating capacitor providing a continuous-time signal, a first feedback path comprising: a sample-and-hold block and a first feedback block, the first feedback path providing a proportional feedback signal upstream of the current integrator. The amplification factor is at least 2. Charge stored on the integrating capacitor at the beginning of a sample period is linearly removed during one single sampling period. Each chopper operates at a chopping frequency. The sample-and-hold-block operates at a sampling frequency equal to an integer times the chopping frequency.

5. 发明授权

US11604234B2 Bridge sensor biasing and readout system 有权
公开(公告)号：US11604234B2
公开(公告)日：2023-03-14
申请号：US17523189
申请日：2021-11-10
申请人： Melexis Technologies SA
发明人： Johan Raman , Pieter Rombouts
IPC分类号： G01R33/09 , G01D5/16 , G01R15/20 , H03F3/45
摘要： A sensor system for measuring a physical quantity includes: a bridge sensor having at least two terminal pairs, a current source for applying a bias current between the bias terminal pair, resulting in a differential sensor signal on a readout terminal pair, wherein the differential sensor signal is indicative for the physical quantity, and an amplifier comprising a first input node and a second input node for receiving the differential signal and at least one output node, wherein the amplifier is configured for amplifying the differential sensor signal and putting the resulting signal on the at least one output node, wherein the sensor system is configured such that, in operation, the amplifier is powered by at least part of the bias current.

6. 发明授权

US11255696B2 Bridge sensor biasing and readout 有权
公开(公告)号：US11255696B2
公开(公告)日：2022-02-22
申请号：US15962266
申请日：2018-04-25
申请人： Melexis Technologies SA
发明人： Johan Raman , Pieter Rombouts
IPC分类号： G01R33/07 , G01D3/02
摘要： A circuit for biasing and reading out a bridge sensor structure comprises at least two pairs of connection terminals. The circuit comprises an excitation signal generator for generating an excitation signal for biasing and/or exciting the bridge, in which the excitation signal is provided as a non-constant periodic continuous function of time, and a detection circuit for obtaining the sensor signal from the bridge sensor structure by electrically connecting the detection circuit to any pair of connection terminals while applying the excitation signal to another pair. The circuit comprises a switch unit for switching the electrical excitation signal and for switching the detection circuit. A controller controls the switch unit to switch the first pair from being connected to the excitation signal generator at a time when the generated excitation signal is in a predetermined signal range where the excitation signal value is substantially equal to zero.

7. 发明授权

US10739418B2 Randomized spinning of hall plates 有权
公开(公告)号：US10739418B2
公开(公告)日：2020-08-11
申请号：US16503803
申请日：2019-07-05
申请人： Melexis Technologies SA
发明人： Johan Raman , Pieter Rombouts
IPC分类号： G01R33/07 , G01R33/00
摘要： A method of reading out a Hall plate which comprises at least 4 contacts. The method comprises: reading out two of the contacts while biasing two other contacts of the at least 4 contacts thereby obtaining a readout signal; switching biasing and readout contacts according to a random or pseudo-random sequence of phases, each phase corresponding with a different permutation of biasing and readout contacts selected from the at least 4 contacts of the Hall plate wherein the biasing and readout contacts are selected such that the readout signal is a measure for the magnetic field; processing of the readout signal to obtain a readout of the Hall plate representative for the magnetic field.

8. 发明授权

US10892723B2 Integration-based low noise amplifiers for sensors 有权
公开(公告)号：US10892723B2
公开(公告)日：2021-01-12
申请号：US16176242
申请日：2018-10-31
申请人： Melexis Technologies SA
发明人： Johan Raman , Pieter Rombouts
IPC分类号： H03F3/45 , H03F3/387
摘要： A semiconductor amplifier circuit comprising an input block adapted for receiving a voltage signal to be amplified, an integrator circuit having an integrating capacitor providing a continuous-time signal representative for the integral of the voltage signal, a first feedback path comprising: a sample-and-hold block and a first feedback block, the first feedback path providing a proportional feedback signal upstream of the current integrator. The amplification factor is larger than 1 for a predefined frequency range. Charge stored on the integrating capacitor at the beginning of a sample period is linearly removed during one single sampling period in such a way that the absolute value of the charge is smaller at the end of the sampling period than at the beginning of the sample period when the voltage signal to be amplified is equal to zero.

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