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1. 发明申请

US20100158407A1 SYSTEM FOR NON-UNIFORMITY CORRECTION FOR IMAGE PROCESSING 有权
标题翻译：用于图像处理的非均匀校正系统
公开(公告)号：US20100158407A1
公开(公告)日：2010-06-24
申请号：US12340123
申请日：2008-12-19
申请人： Matthew R. Standfield , Jim D. Allen , Michael O'Neal Fox , Deepak Prasanna , Matthew P. DeLaquil
发明人： Matthew R. Standfield , Jim D. Allen , Michael O'Neal Fox , Deepak Prasanna , Matthew P. DeLaquil
IPC分类号： G06K9/03
CPC分类号： G06T5/009 , G06T2207/10016
摘要： A system for correcting image characteristic data from a plurality of pixels comprises at least one field programmable gate array (FPGA), a lookup table, and a correction module. The FPGA may include a plurality of configurable logic elements and a plurality of configurable storage elements. The lookup table may be accessible by the FPGA and may store a plurality of correction components associated with each pixel, including a gain value, an offset value, and a bad pixel value. The correction module may be formed from the configurable logic elements and configurable storage elements and may receive the characteristic data and the correction components. The correction module may generate corrected data for each characteristic data by utilizing the gain value, the offset value, and the bad pixel value.
摘要翻译：用于从多个像素校正图像特征数据的系统包括至少一个现场可编程门阵列（FPGA），查找表和校正模块。 FPGA可以包括多个可配置逻辑元件和多个可配置存储元件。查找表可以由FPGA访问，并且可以存储与每个像素相关联的多个校正分量，包括增益值，偏移值和不良像素值。校正模块可以由可配置逻辑元件和可配置存储元件形成，并且可以接收特征数据和校正组件。校正模块可以通过利用增益值，偏移值和不良像素值来生成每个特征数据的校正数据。

2. 发明授权

US08751990B2 System for determining median values of video data 失效
标题翻译：用于确定视频数据的中值的系统
公开(公告)号：US08751990B2
公开(公告)日：2014-06-10
申请号：US12340166
申请日：2008-12-19
申请人： Matthew R. Standfield , Jim D. Allen , Juan Esteban Flores , Michael O'Neal Fox , Deepak Prasanna , Matthew P. DeLaquil
发明人： Matthew R. Standfield , Jim D. Allen , Juan Esteban Flores , Michael O'Neal Fox , Deepak Prasanna , Matthew P. DeLaquil
IPC分类号： G06F17/50
CPC分类号： G06F7/22
摘要： A system for determining the median of a plurality of data values comprises a plurality of field programmable gate arrays (FPGA), a plurality of inter FPGA links, an input router, a plurality of median modules, and a plurality of output transfer modules. Each FPGA includes a plurality of configurable logic elements and configurable storage elements from which the other components are formed. The inter FPGA link allows communication from one FPGA to another. The input router receives the plurality of data values and creates a plurality of data streams. The median module receives at least one data stream, increments a plurality of counters corresponding to a single data value within the range of data values, and determines the median by accumulating the contents of each counter. The output transfer module transfers the median to an external destination along with performance statistics of the determination of the median.
摘要翻译：用于确定多个数据值的中值的系统包括多个现场可编程门阵列（FPGA），多个FPGA间链路，输入路由器，多个中间模块和多个输出传输模块。每个FPGA包括多个可配置逻辑元件和可配置的存储元件，其中形成其它组件。 FPGA间链路允许从一个FPGA到另一个FPGA的通信。输入路由器接收多个数据值并创建多个数据流。中值模块接收至少一个数据流，在数据值的范围内增加对应于单个数据值的多个计数器，并通过累加每个计数器的内容来确定中值。输出传输模块将中值转移到外部目的地以及中位数确定的性能统计。

3. 发明申请

US20100161695A1 SYSTEM FOR DETERMINING MEDIAN VALUES OF VIDEO DATA 失效
标题翻译：用于确定视频数据中值的系统
公开(公告)号：US20100161695A1
公开(公告)日：2010-06-24
申请号：US12340166
申请日：2008-12-19
申请人： Matthew R. Standfield , Jim D. Allen , Juan Esteban Flores , Michael O'Neal Fox , Deepak Prasanna , Matthew P. DeLaquil
发明人： Matthew R. Standfield , Jim D. Allen , Juan Esteban Flores , Michael O'Neal Fox , Deepak Prasanna , Matthew P. DeLaquil
IPC分类号： G06F7/00 , G06F7/50 , G06F7/52
CPC分类号： G06F7/22
摘要： A system for determining the median of a plurality of data values comprises a plurality of field programmable gate arrays (FPGA), a plurality of inter FPGA links, an input router, a plurality of median modules, and a plurality of output transfer modules. Each FPGA includes a plurality of configurable logic elements and configurable storage elements from which the other components are formed. The inter FPGA link allows communication from one FPGA to another. The input router receives the plurality of data values and creates a plurality of data streams. The median module receives at least one data stream, increments a plurality of counters corresponding to a single data value within the range of data values, and determines the median by accumulating the contents of each counter. The output transfer module transfers the median to an external destination along with performance statistics of the determination of the median.
摘要翻译：用于确定多个数据值的中值的系统包括多个现场可编程门阵列（FPGA），多个FPGA间链路，输入路由器，多个中间模块和多个输出传输模块。每个FPGA包括多个可配置逻辑元件和可配置的存储元件，其中形成其它组件。 FPGA间链路允许从一个FPGA到另一个FPGA的通信。输入路由器接收多个数据值并创建多个数据流。中值模块接收至少一个数据流，在数据值的范围内增加对应于单个数据值的多个计数器，并通过累加每个计数器的内容来确定中值。输出传输模块将中值转移到外部目的地以及中位数确定的性能统计。

4. 发明授权

US08139864B2 System for non-uniformity correction for image processing 有权
标题翻译：图像处理不均匀校正系统
公开(公告)号：US08139864B2
公开(公告)日：2012-03-20
申请号：US12340123
申请日：2008-12-19
申请人： Matthew R. Standfield , Jim D. Allen , Michael O'Neal Fox , Deepak Prasanna , Matthew P. DeLaquil
发明人： Matthew R. Standfield , Jim D. Allen , Michael O'Neal Fox , Deepak Prasanna , Matthew P. DeLaquil
IPC分类号： G06K9/46
CPC分类号： G06T5/009 , G06T2207/10016
摘要： A system for correcting image characteristic data from a plurality of pixels comprises at least one field programmable gate array (FPGA), a lookup table, and a correction module. The FPGA may include a plurality of configurable logic elements and a plurality of configurable storage elements. The lookup table may be accessible by the FPGA and may store a plurality of correction components associated with each pixel, including a gain value, an offset value, and a bad pixel value. The correction module may be formed from the configurable logic elements and configurable storage elements and may receive the characteristic data and the correction components. The correction module may generate corrected data for each characteristic data by utilizing the gain value, the offset value, and the bad pixel value.
摘要翻译：用于从多个像素校正图像特征数据的系统包括至少一个现场可编程门阵列（FPGA），查找表和校正模块。 FPGA可以包括多个可配置逻辑元件和多个可配置存储元件。查找表可以由FPGA访问，并且可以存储与每个像素相关联的多个校正分量，包括增益值，偏移值和不良像素值。校正模块可以由可配置逻辑元件和可配置存储元件形成，并且可以接收特征数据和校正组件。校正模块可以通过利用增益值，偏移值和不良像素值来生成每个特征数据的校正数据。

5. 发明申请

US20110010509A1 SYSTEM AND METHOD OF SORTING AND CALCULATING STATISTICS ON LARGE DATA SETS WITH A KNOWN VALUE RANGE 审中-公开
标题翻译：使用已知值范围对大数据集进行统计和计算统计的系统和方法
公开(公告)号：US20110010509A1
公开(公告)日：2011-01-13
申请号：US12498824
申请日：2009-07-07
申请人： Juan Esteban Flores , Michael O'Neal Fox , Jim D. Allen
发明人： Juan Esteban Flores , Michael O'Neal Fox , Jim D. Allen
IPC分类号： G06F12/00
CPC分类号： G06F7/24
摘要： A system for sorting data and calculating statistics on large data sets with a known value range includes a memory element and a processing element configured to execute steps of the methods. Methods for sorting data include establishing an array of counters such that each counter corresponds to a value in the data set, reading the numbers and incrementing the counter corresponding to the value of each number, and listing the values in sequential order wherein each value occurs in the list according to the count of the corresponding counter. Methods for calculating statistics utilize the count stored in each counter from the sorted data and the value that corresponds thereto.
摘要翻译：用于对具有已知值范围的大数据集进行数据排序和计算统计的系统包括存储元件和被配置为执行所述方法的步骤的处理元件。用于分类数据的方法包括建立一个计数器阵列，使得每个计数器对应于数据集中的值，读取数字并递增对应于每个数字的值的计数器，并且按顺序列出其中每个值出现在该列表根据相应计数器的计数。计算统计量的方法利用从排序数据和与其对应的值存储在每个计数器中的计数。

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