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    • 1. 发明授权
    • Signalling circuit, processing device and safety critical system
    • 信号电路,处理装置和安全关键系统
    • US08957702B2
    • 2015-02-17
    • US14232479
    • 2011-08-01
    • Mathieu LesbatsHubert BodeRafael Pena Bello
    • Mathieu LesbatsHubert BodeRafael Pena Bello
    • H03K19/0175H04L25/02H03K19/003
    • H04L25/02H03K19/00361H03K19/017509
    • A signalling circuit for a signal channel of a communication network comprises a communication network terminal connectable to the signal channel and to a voltage supply; an input terminal connectable to receive a transmit signal; a driver device comprising a first driver terminal connected to the communication network terminal, a second driver terminal connected to ground, and a driver control terminal connected to the input terminal; wherein the driver device is arranged to connect the communication network terminal to ground in response to a transition from a low to a high voltage driver control signal state of a driver control signal received at the driver control terminal. And the signalling circuit comprises a feedback circuit connected to the first driver terminal and the driver control terminal and comprising a capacitive device; and a pull-down device arranged to connect the driver control terminal to ground after a predefined delay after a transition of the transmit signal from a low to a high voltage transmit signal state.
    • 用于通信网络的信号信道的信令电路包括可连接到信号信道和电压源的通信网络终端; 可接收发送信号的输入端子; 驱动器装置,包括连接到通信网络终端的第一驱动器端子,连接到地的第二驱动器端子和连接到输入端子的驱动器控制端子; 其中所述驱动器装置被布置成响应于从所述驾驶员控制终端处接收到的驾驶员控制信号的低电压到高电压驱动器控制信号状态的转变而将所述通信网络终端连接到地。 并且信令电路包括连接到第一驱动器端子和驱动器控制端子并包括电容性装置的反馈电路; 以及下拉装置,其被布置成在所述发射信号从低电压到高电压发射信号状态的转变之后在预定义的延迟之后将所述驱动器控制端子接地。
    • 2. 发明申请
    • SIGNALLING CIRCUIT, PROCESSING DEVICE AND SAFETY CRITICAL SYSTEM
    • 信号电路,处理装置和安全关键系统
    • US20140169495A1
    • 2014-06-19
    • US14232479
    • 2011-08-01
    • Mathieu LesbatsHubert BodeRafael Pena Bello
    • Mathieu LesbatsHubert BodeRafael Pena Bello
    • H04L25/02
    • H04L25/02H03K19/00361H03K19/017509
    • A signalling circuit for a signal channel of a communication network comprises a communication network terminal connectable to the signal channel and to a voltage supply; an input terminal connectable to receive a transmit signal; a driver device comprising a first driver terminal connected to the communication network terminal, a second driver terminal connected to ground, and a driver control terminal connected to the input terminal; wherein the driver device is arranged to connect the communication network terminal to ground in response to a transition from a low to a high voltage driver control signal state of a driver control signal received at the driver control terminal. And the signalling circuit comprises a feedback circuit connected to the first driver terminal and the driver control terminal and comprising a capacitive device; and a pull-down device arranged to connect the driver control terminal to ground after a predefined delay after a transition of the transmit signal from a low to a high voltage transmit signal state.
    • 用于通信网络的信号信道的信令电路包括可连接到信号信道和电压源的通信网络终端; 可接收发送信号的输入端子; 驱动器装置,包括连接到通信网络终端的第一驱动器端子,连接到地的第二驱动器端子和连接到输入端子的驱动器控制端子; 其中所述驱动器装置被布置成响应于从所述驾驶员控制终端处接收到的驾驶员控制信号的低电压到高电压驱动器控制信号状态的转变而将所述通信网络终端连接到地。 并且信令电路包括连接到第一驱动器端子和驱动器控制端子并包括电容性装置的反馈电路; 以及下拉装置,其被布置成在所述发射信号从低电压到高电压发射信号状态的转变之后在预定义的延迟之后将所述驱动器控制端子接地。
    • 3. 发明授权
    • Oscillator circuit, a semiconductor device and an apparatus
    • 振荡器电路,半导体器件和装置
    • US09300302B2
    • 2016-03-29
    • US14395522
    • 2012-04-20
    • Hubert BodeMathieu Lesbats
    • Hubert BodeMathieu Lesbats
    • H03K3/0231H03K4/50H03L7/06
    • H03L7/06H03K3/0231H03K4/50
    • An oscillator circuit for providing an output clock signal is described. The oscillator circuit comprising a voltage reference, a first current source, first capacitor, first capacitor switch, second current source, second capacitor, second capacitor switch, first comparator, second comparator and flip-flop. The first comparator comprises a first chopper-stabilized comparator switchable between a compare phase and a zeroing phase in dependence on the output clock signal and arranged to operate in the compare phase in a first half-phase of the output clock signal to provide a first comparator output from comparing the first capacitor voltage to the reference voltage and in the zeroing phase in the second half-phase. The second comparator comprises a second chopper-stabilized comparator switchable between a respective compare phase and a respective zeroing phase in dependence on the output clock signal and arranged to operate in its compare phase in the second half-phase to obtain a second comparator output from comparing the second capacitor voltage to the reference voltage and in its zeroing phase in the first half-phase.
    • 描述用于提供输出时钟信号的振荡器电路。 所述振荡器电路包括电压基准,第一电流源,第一电容器,第一电容器开关,第二电流源,第二电容器,第二电容器开关,第一比较器,第二比较器和触发器。 第一比较器包括第一斩波稳定比较器,其可以根据输出时钟信号在比较相位和归零相位之间切换,并且被布置为在输出时钟信号的第一半相位中的比较相位中工作,以提供第一比较器 将第一电容器电压与参考电压进行比较,并在第二半相的归零阶段输出。 第二比较器包括第二斩波稳定比较器,其可以根据输出时钟信号在相应的比较相位和相应的归零相位之间切换,并被布置成在第二半相的其比较相位中工作以从比较获得第二比较器输出 第二电容器电压为参考电压,并且在第一半相中处于其归零阶段。
    • 4. 发明申请
    • OSCILLATOR CIRCUIT, A SEMICONDUCTOR DEVICE AND AN APPARATUS
    • 振荡器电路,半导体器件和器件
    • US20150061780A1
    • 2015-03-05
    • US14395522
    • 2012-04-20
    • Hubert BodeMathieu Lesbats
    • Hubert BodeMathieu Lesbats
    • H03L7/06
    • H03L7/06H03K3/0231H03K4/50
    • An oscillator circuit for providing an output clock signal is described. The oscillator circuit comprising a voltage reference, a first current source, first capacitor, first capacitor switch, second current source, second capacitor, second capacitor switch, first comparator, second comparator and flip-flop. The first comparator comprises a first chopper-stabilized comparator switchable between a compare phase and a zeroing phase in dependence on the output clock signal and arranged to operate in the compare phase in a first half-phase of the output clock signal to provide a first comparator output from comparing the first capacitor voltage to the reference voltage and in the zeroing phase in the second half-phase. The second comparator comprises a second chopper-stabilized comparator switchable between a respective compare phase and a respective zeroing phase in dependence on the output clock signal and arranged to operate in its compare phase in the second half-phase to obtain a second comparator output from comparing the second capacitor voltage to the reference voltage and in its zeroing phase in the first half-phase.
    • 描述用于提供输出时钟信号的振荡器电路。 所述振荡器电路包括电压基准,第一电流源,第一电容器,第一电容器开关,第二电流源,第二电容器,第二电容器开关,第一比较器,第二比较器和触发器。 第一比较器包括第一斩波稳定比较器,其可以根据输出时钟信号在比较相位和归零相位之间切换,并被布置为在输出时钟信号的第一半相位中的比较相位中工作,以提供第一比较器 将第一电容器电压与参考电压进行比较,并在第二半相的归零阶段输出。 第二比较器包括第二斩波稳定比较器,其可以根据输出时钟信号在相应的比较相位和相应的归零相位之间切换,并被布置成在第二半相的其比较相位中工作以从比较获得第二比较器输出 第二电容器电压为参考电压,并且在第一半相中处于其归零阶段。