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    • 1. 发明授权
    • Wide range charge balancing capacitive-to-digital converter
    • 宽范围电荷平衡电容式数字转换器
    • US08410969B2
    • 2013-04-02
    • US13144046
    • 2010-01-12
    • Mathias KraussMaha JaafarKe WangEric Hoffman
    • Mathias KraussMaha JaafarKe WangEric Hoffman
    • H03M1/12
    • H03M1/60
    • A capacitive-to-digital converter is provided which includes: sensor, offset and reference capacitors, an integrator circuit and a demodulation circuit. The sensor capacitor is switched according to a first clock and the offset capacitor according to a second clock, which has a higher switching frequency. The reference capacitor is switched according to a return signal from the converter's output. The integrator circuit includes an integrator capacitor, and has first and second nodes, with the sensor, offset and reference capacitors each being switched to the first and second nodes based on the respective first clock, second clock or return signal. The demodulation circuit receives and converts output of the integrator circuit into a digital output. The higher frequency clocking of the offset capacitor allows for a reduction in capacitance of the offset, reference or integrator capacitor, and the multiclocking of the converter allows for use of a multireferencing to the sensor capacitor.
    • 提供了一种电容数字转换器,其包括:传感器,偏移和参考电容器,积分器电路和解调电路。 根据第一时钟传感器电容器和根据具有较高开关频率的第二时钟的偏移电容器来切换传感器电容器。 参考电容根据转换器输出的返回信号进行切换。 积分器电路包括积分电容器,并且具有第一和第二节点,传感器,偏移和参考电容器各自基于相应的第一时钟,第二时钟或返回信号切换到第一和第二节点。 解调电路将积分电路的输出接收并转换为数字输出。 偏移电容器的较高频率时钟允许偏移,参考或积分电容器的电容减小,并且转换器的多锁定器允许使用多传感器传感器电容器。
    • 2. 发明申请
    • WIDE RANGE CHARGE BALANCING CAPACITIVE-TO-DIGITAL CONVERTER
    • 宽范围充电平衡电容数字转换器
    • US20120112947A1
    • 2012-05-10
    • US13144046
    • 2010-01-12
    • Mathias KraussMaha JaafarKe WangEric Hoffman
    • Mathias KraussMaha JaafarKe WangEric Hoffman
    • H03M1/12
    • H03M1/60
    • A capacitive-to-digital converter is provided which includes: sensor, offset and reference capacitors, an integrator circuit and a demodulation circuit. The sensor capacitor is switched according to a first clock and the offset capacitor according to a second clock, which has a higher switching frequency. The reference capacitor is switched according to a return signal from the converter's output. The integrator circuit includes an integrator capacitor, and has first and second nodes, with the sensor, offset and reference capacitors each being switched to the first and second nodes based on the respective first clock, second clock or return signal. The demodulation circuit receives and converts output of the integrator circuit into a digital output. The higher frequency clocking of the offset capacitor allows for a reduction in capacitance of the offset, reference or integrator capacitor, and the multiclocking of the converter allows for use of a multireferencing to the sensor capacitor.
    • 提供了一种电容数字转换器,其包括:传感器,偏移和参考电容器,积分器电路和解调电路。 根据第一时钟传感器电容器和根据具有较高开关频率的第二时钟的偏移电容器来切换传感器电容器。 参考电容根据转换器输出的返回信号进行切换。 积分器电路包括积分电容器,并且具有第一和第二节点,传感器,偏移和参考电容器各自基于相应的第一时钟,第二时钟或返回信号切换到第一和第二节点。 解调电路将积分电路的输出接收并转换为数字输出。 偏移电容器的较高频率时钟允许偏移,参考或积分电容器的电容减小,并且转换器的多锁定器允许使用多传感器传感器电容器。