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1. 发明授权

US06724647B1 Variable logical circuit, semiconductor integrated circuit, and method for manufacturing semiconductor integrated circuit 失效
标题翻译：可变逻辑电路，半导体集成电路和半导体集成电路的制造方法
公开(公告)号：US06724647B1
公开(公告)日：2004-04-20
申请号：US10069453
申请日：2002-04-24
申请人： Masayuki Sato , Isao Shimizu , Hideaki Takahashi , Yoshikazu Saitoh
发明人： Masayuki Sato , Isao Shimizu , Hideaki Takahashi , Yoshikazu Saitoh
IPC分类号： G11C1100
CPC分类号： G11C29/024 , G11C8/10 , G11C11/41 , G11C29/02 , G11C2029/0403 , H02M3/073 , H02M2003/077
摘要： A semiconductor integrated circuit (FPLA) having a desired logical function achieved by arranging on a semiconductor chip variable logical circuits each having n×n (e.g., four) memory cells alternatively selected according to a combination of n (e.g., two) pairs of positive and negative phase signals and provided to output the positive and negative phase signals according to the data stored in the selected memory cell, variable wiring unit provided with signal lines for inter-connecting the variable logical circuits and switching elements for connecting/disconnecting signal lines inter-secting to each other, a wiring connection state storage memory circuit where the states of the switching elements are stored.
摘要翻译：具有期望的逻辑功能的半导体集成电路（FPLA）通过在半导体芯片上布置可变的逻辑电路而实现，每个逻辑电路具有根据n（例如，两个）正和负对的组合而交替选择的nxn（例如，四个）存储器单元并根据存储在所选存储单元中的数据输出正和负相位信号，可变布线单元设置有用于连接可变逻辑电路的信号线和用于连接/断开信号线的连接/断开彼此连接存储开关元件的状态的布线连接状态存储电路。

2. 发明授权

US06400173B1 Test system and manufacturing of semiconductor device 失效
标题翻译：半导体器件的测试系统和制造
公开(公告)号：US06400173B1
公开(公告)日：2002-06-04
申请号：US09692468
申请日：2000-10-20
申请人： Isao Shimizu , Masayuki Sato , Hiroshi Fukiage
发明人： Isao Shimizu , Masayuki Sato , Hiroshi Fukiage
IPC分类号： G01R3126
CPC分类号： H01L21/6835 , G01R31/2806 , G01R31/2831 , G01R31/2884 , G01R31/2886 , G01R31/31917 , H01L2224/16 , H01L2924/01019 , H01L2924/30105 , H01L2924/3011
摘要： A test circuit is provided on a probe card or a wafer on which semiconductor chips to be tested are formed. The test circuit and each of the semiconductor chips to be tested are electrically connected to each other to perform testing, whereby the test can be carried out without using a tester. Conducting a test in such a wafer stage within an aging device allows the simplification or omission of a test subsequent to packaging.
摘要翻译：测试电路设置在其上形成有待测试的半导体芯片的探针卡或晶片上。测试电路和要测试的每个半导体芯片彼此电连接以进行测试，从而可以在不使用测试器的情况下进行测试。在老化装置内的这种晶片台进行测试允许简化或省略包装后的测试。

3. 发明授权

US06727723B2 Test system and manufacturing of semiconductor device 失效
标题翻译：半导体器件的测试系统和制造
公开(公告)号：US06727723B2
公开(公告)日：2004-04-27
申请号：US10140043
申请日：2002-05-08
申请人： Isao Shimizu , Masayuki Sato , Hiroshi Fukiage
发明人： Isao Shimizu , Masayuki Sato , Hiroshi Fukiage
IPC分类号： G01R3126
CPC分类号： H01L21/6835 , G01R31/2806 , G01R31/2831 , G01R31/2884 , G01R31/2886 , G01R31/31917 , H01L2224/16 , H01L2924/01019 , H01L2924/30105 , H01L2924/3011
摘要： A test circuit is provided on a probe card or a wafer on which semiconductor chips to be tested are formed. The test circuit and each of the semiconductor chips to be tested are electrically connected to each other to perform testing, whereby the test can be carried out without using a tester. Conducting a test in such a wafer stage within an aging device allows the simplification or omission of a test subsequent to packaging.
摘要翻译：测试电路设置在其上形成有待测试的半导体芯片的探针卡或晶片上。测试电路和要测试的每个半导体芯片彼此电连接以进行测试，从而可以在不使用测试器的情况下进行测试。在老化装置内的这种晶片台进行测试允许简化或省略包装后的测试。

4. 发明授权

US09347559B2 Piston ring 有权
标题翻译：活塞环
公开(公告)号：US09347559B2
公开(公告)日：2016-05-24
申请号：US14129050
申请日：2012-06-21
申请人： Takuma Sekiya , Yuuichi Murayama , Masayuki Sato , Yuji Shima , Junya Takahashi , Masaki Moronuki
发明人： Takuma Sekiya , Yuuichi Murayama , Masayuki Sato , Yuji Shima , Junya Takahashi , Masaki Moronuki
IPC分类号： C23C14/06 , F16J9/26 , C23C14/32 , C23C28/04
CPC分类号： F16J9/26 , C23C14/0641 , C23C14/325 , C23C28/044 , C23C28/046
摘要： A high-thermal-conductivity piston ring having excellent scuffing resistance and wear resistance, which can be used in a high-heat-load environment in engines is provided. Also, to provide a piston ring with low friction for contributing to the improvement of fuel efficiency, a TiN coating as thick as 10-60 μm, in which the texture coefficient of a (111) plane is 1.2-1.65 in X-ray diffraction on the coating surface, with the texture coefficient of a (111) plane>the texture coefficient of a (220) plane>the texture coefficient of a (200) plane, is formed under the optimized ion plating conditions on a peripheral surface of the piston ring. Further, to obtain excellent sliding characteristics with low friction without losing excellent thermal conductivity of TiN, a hard amorphous carbon coating is formed on the TiN coating.
摘要翻译：提供了可用于发动机的高热负荷环境中的具有优异的耐擦伤性和耐磨性的高导热性活塞环。此外，为了提供具有低摩擦力的活塞环以有助于提高燃料效率，TiN涂层厚度为10-60μm，其中（111）面的织构系数在X射线衍射中为1.2-1.65 在涂层表面上，在优化的离子镀条件下，在（111）面的纹理系数>（220）面的织构系数>（200）面的织构系数上形成在活塞环。此外，为了在不损失TiN的优异导热性的情况下以低摩擦获得优异的滑动特性，在TiN涂层上形成硬的无定形碳涂层。

5. 发明申请

US20140137733A1 PISTON RING 有权
标题翻译：活塞环
公开(公告)号：US20140137733A1
公开(公告)日：2014-05-22
申请号：US14129022
申请日：2012-06-21
申请人： Takuma Sekiya , Yuuichi Murayama , Masayuki Sato , Yuji Shima , Junya Takahashi , Masaki Moronuki
发明人： Takuma Sekiya , Yuuichi Murayama , Masayuki Sato , Yuji Shima , Junya Takahashi , Masaki Moronuki
IPC分类号： F02F5/00
CPC分类号： F02F5/00 , C23C14/0641 , C23C14/325 , C23C28/044 , C23C28/046 , F16J9/26
摘要： To provide a high-thermal-conductivity piston ring having excellent scuffing resistance and wear resistance, which can be used in a high-heat-load environment in engines, a TiN coating as thick as 10-60 μm, in which the texture coefficient of a (220) plane is 1.1-1.8 in X-ray diffraction on the coating surface, larger than those of (111) and (200) planes, is formed under the optimized ion plating conditions on a peripheral surface of the piston ring. Also, to obtain excellent sliding characteristics with low friction without losing excellent thermal conductivity of TiN, a hard amorphous carbon coating is formed on the TiN coating.
摘要翻译：为了提供可用于发动机的高热负荷环境中的具有优异的抗划伤性和耐磨性的高导热性活塞环，厚度为10-60μm的TiN涂层，其中织构系数在优选的离子镀条件下，在活塞环的周面上形成涂层表面的X射线衍射中的（220）面为1.1〜1.8，大于（111）面和（200）面的X射线衍射面。另外，为了在不损失TiN的优异导热性的情况下以低摩擦力获得优异的滑动特性，在TiN涂层上形成硬质无定形碳涂层。

6. 发明授权

US08310812B2 Electric double layer capacitor having a first terminal having a first joint and a second terminal having a second joint 失效
标题翻译：双电层电容器，具有具有第一接头的第一端子和具有第二接头的第二端子
公开(公告)号：US08310812B2
公开(公告)日：2012-11-13
申请号：US12688954
申请日：2010-01-18
申请人： Masashige Ashizaki , Nario Niibo , Masayuki Sato , Yasuyuki Ito , Yukiyasu Sugihara
发明人： Masashige Ashizaki , Nario Niibo , Masayuki Sato , Yasuyuki Ito , Yukiyasu Sugihara
IPC分类号： H01G9/00 , H01G4/228 , H01G9/10 , H05K5/03
CPC分类号： H01G9/155 , H01G9/016 , H01G9/06 , H01G9/10 , H01G11/12 , H01G11/52 , H01G11/74 , H01G11/78 , H01G11/82 , H01G11/84 , Y02E60/13
摘要： An electric double layer capacitor has an element, a first terminal, a second terminal, a resin-made case, and a resin-made lid. A pair of electrodes are led out of the element. Each of the electrodes is connected to each of the first terminal and the second terminal. The element and an electrolyte are accommodated in the case having an opening top surface, and the lid is bonded to the top surface of the case. The joints of the first and second terminals are disposed at positions higher than the inner bottom of the case, and are exposed upward. The rims of the joints and intermediate conductive sections continuing from them are buried in the case, and the terminal sections continuing from the intermediate conductive sections are led from the side surface of the case to the outside.
摘要翻译：双电层电容器具有元件，第一端子，第二端子，树脂制壳体和树脂制盖子。一对电极从元件中引出。每个电极连接到第一端子和第二端子中的每一个。元件和电解质容纳在具有开口顶表面的壳体中，并且盖子结合到壳体的顶表面。第一端子和第二端子的接头设置在比壳体的内底高的位置，并向上露出。接合部的边缘和从它们继续的中间导电部分被掩埋在壳体中，并且从中间导电部分延伸的端子部分从壳体的侧表面引导到外部。

7. 发明申请

US20120274539A1 DISPLAY APPARATUS, METHOD FOR CONTROLLING DISPLAY APPARATUS, AND STORAGE MEDIUM 审中-公开
标题翻译：显示装置，控制显示装置的方法和存储介质
公开(公告)号：US20120274539A1
公开(公告)日：2012-11-01
申请号：US13394211
申请日：2011-11-22
申请人： Hirohiko Tashiro , Hiroshi Tanioka , Yoshitaka Oba , Masayuki Sato , Kenji Hara
发明人： Hirohiko Tashiro , Hiroshi Tanioka , Yoshitaka Oba , Masayuki Sato , Kenji Hara
IPC分类号： G09G5/00
CPC分类号： H04N1/00442 , G03G15/502 , G03G15/5087 , G03G2215/00109 , H04N2201/0094
摘要： It was necessary to prepare display data for the portrait and landscape display modes respectively, since the arrangement of the objects differs between the portrait and landscape display modes.
摘要翻译：由于在纵向和横向显示模式之间的对象的布置不同，因此需要分别准备用于纵向和横向显示模式的显示数据。

8. 发明申请

US20110039008A1 FAT-AND-OIL COMPOSITION, AND OIL-IN-WATER EMULSIFIED PRODUCT CONTAINING THE FAT-AND-OIL COMPOSITION 有权
标题翻译：脂肪和油组合物，以及含油脂组合物的水包油乳化产品
公开(公告)号：US20110039008A1
公开(公告)日：2011-02-17
申请号：US12911118
申请日：2010-10-25
申请人： Kiyomi OONISHI , Yoshiyuki Hatano , Hirofumi Haruna , Yuka Kikuchi , Akira Sato , Hiroki Kannari , Masayuki Sato
发明人： Kiyomi OONISHI , Yoshiyuki Hatano , Hirofumi Haruna , Yuka Kikuchi , Akira Sato , Hiroki Kannari , Masayuki Sato
IPC分类号： A23C13/12 , A23D7/00 , A23C13/14
CPC分类号： C11C3/10 , A23D7/003 , A23D7/0053 , A23L9/20 , A23P20/12
摘要： A fat-and-oil composition comprising fats-and-oils A and B, and C and/or E, all being derived from vegetable fats-and-oils, the composition satisfying conditions (a), (b) and (c): A: at least one of lauric fats-and-oils, and fractionated, extremely hardened or transesterified oils of lauric fats-and-oils, B: a liquid oil, C: a transesterified oil of D derived from vegetable fats-and-oils, D: a fat-and-oil wherein the contents of saturated fatty acids and unsaturated fatty acids having 16 or more carbon atoms in all the constitutive fatty acids being 20%≦ but
摘要翻译：包含脂肪和油的组合物A和B以及C和/或E全部来自植物油脂，所述组合物满足条件（a），（b）和（c）：A：至少一种月桂酸脂肪油，以及分解，非常硬化或酯交换的月桂酸脂肪油，B：液体油，C：衍生自植物油脂的D的酯交换油，油，D：脂肪和油，其中所有构成型脂肪酸中具有16个或更多个碳原子的饱和脂肪酸和不饱和脂肪酸的含量为20％＆amp; 但<75质量％，25％＆nlE; 但是分别为<70质量％，E为棕榈油和/或棕榈油的中熔分馏油，其中固体脂肪含量为50＆amp; 但在10℃下为<100％，20＆amp; 但在20℃下<90％，在35℃下<6％，所有来自植物油脂的脂肪和油成分中的A，B和C和/或E的含量为（a）60质量％以上，98质量％，（b）1〜25质量％，（c）为1〜38质量％。

9. 发明申请

US20100252314A1 COIN TYPE ELECTRIC DOUBLE-LAYERED CAPACITOR, AND CAPACITOR-PACKAGED ELEMENT 失效
标题翻译：硬币型双电层电容器和电容器封装元件
公开(公告)号：US20100252314A1
公开(公告)日：2010-10-07
申请号：US12746281
申请日：2008-12-16
申请人： Masashige Ashizaki , Masayuki Sato , Nario Niibo , Hiroaki Higashino
发明人： Masashige Ashizaki , Masayuki Sato , Nario Niibo , Hiroaki Higashino
IPC分类号： H05K1/16 , H01G9/00
CPC分类号： H01G9/016 , H01G9/08 , H01G9/155 , H01G11/74 , H01G11/82 , Y02E60/13
摘要： A coin-type electric double-layered capacitor of the present invention includes: a capacitor element; a lower cover for housing the capacitor element impregnated with an electrolyte; an upper cover for sealing an opening of the lower cover through an insulating ring-shaped packing; an upper terminal plate having one end portion connected to an outer surface of the upper cover; and a lower terminal plate having a first end portion connected to an outer surface of the lower cover and a second end portion provided with a through hole, the capacitor being configured such that at least part of the through hole is opened without being covered by an outer surface located on a bottom of the lower cover.
摘要翻译：本发明的硬币型双层电容器包括：电容器元件; 用于容纳浸有电解质的电容器元件的下盖; 用于通过绝缘环形填料密封下盖的开口的上盖; 上端子板，其一端部连接到上盖的外表面; 以及下端子板，其具有连接到所述下盖的外表面的第一端部和设置有通孔的第二端部，所述电容器被构造成使得所述通孔的至少一部分被打开而不被覆盖外表面位于下盖的底部。

10. 发明授权

US07581297B2 Method of fabricating piezoelectric vibrator and electronic apparatus and radio wave timepiece having piezoelectric vibrator 失效
标题翻译：制造压电振子的方法和具有压电振动器的电子装置和无线电波表
公开(公告)号：US07581297B2
公开(公告)日：2009-09-01
申请号：US11409653
申请日：2006-04-24
申请人： Masayuki Sato , Seigo Fukuchi , Atsushi Tomisaki
发明人： Masayuki Sato , Seigo Fukuchi , Atsushi Tomisaki
IPC分类号： H01G7/00
CPC分类号： H04R17/00 , Y10T29/42 , Y10T29/435 , Y10T29/49128 , Y10T29/4913 , Y10T29/49139 , Y10T29/49155
摘要： A piezoelectric vibrator has an airtight terminal comprised of a lead terminal and a piezoelectric member. The lead terminal has an inner lead portion and an outer lead portion. The piezoelectric member has an exciting electrode and a mount electrode disposed on a surface of the piezoelectric member. A plasma arc electrode is connected to a power supply for generating a plasma arc discharge. To bond together the inner lead portion of the lead terminal to the mount electrode of the piezoelectric member, the outer lead portion is connected to an output terminal of the power supply and the plasma arc electrode is positioned at a vicinity of a bonding portion for bonding together the inner lead portion and the mount electrode. A voltage is applied between the inner lead portion and the plasma arc electrode to generate a plasma arc discharge. The generated plasma arc is discharged to the bonding portion while subjecting at least the bonding portion to an argon gas atmosphere to thereby bond together with a solder the inner lead portion and the mount electrode.
摘要翻译：压电振子具有由引线端子和压电部件构成的气密端子。引线端子具有内部引线部分和外部引线部分。压电元件具有设置在压电元件表面上的激励电极和安装电极。等离子弧电极连接到用于产生等离子体电弧放电的电源。为了将引线端子的内部引线部分接合到压电部件的安装电极，外部引线部分连接到电源的输出端子，等离子弧电极位于用于接合的接合部分附近内引线部分和安装电极在一起。在内引线部分和等离子体电弧电极之间施加电压以产生等离子体电弧放电。所产生的等离子体电弧被放电到接合部分，同时至少将接合部分进行氩气气氛，从而与焊料一起与内引线部分和安装电极接合。

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