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1. 发明授权

US5901154A Method for producing test program for semiconductor device 失效
标题翻译：半导体器件测试程序的制作方法
公开(公告)号：US5901154A
公开(公告)日：1999-05-04
申请号：US873688
申请日：1997-06-12
申请人： Masayuki Motohama , Junichi Hirase , Akihiko Watanabe , Michio Maekawa
发明人： Masayuki Motohama , Junichi Hirase , Akihiko Watanabe , Michio Maekawa
IPC分类号： G01R31/26 , G01R31/28 , G01R31/3183 , G01R31/319 , G11C29/00 , G11C29/56 , H01L21/66 , G06F11/00
CPC分类号： G01R31/318307 , G01R31/319
摘要： The invention relates to a method for reducing the time required to test the functions of a semiconductor device. Test modules, each having a plurality of test statements, are created for testing predetermined functions of the device. Common test statements are extracted from the test modules. A test program is then produced by sequentially arranging the extracted statement(s) and the remaining statements from the test modules.
摘要翻译：本发明涉及一种减少测试半导体器件功能所需的时间的方法。创建测试模块，每个测试模块具有多个测试语句，用于测试设备的预定功能。从测试模块中提取常见的测试语句。然后通过依次安排提取的语句和来自测试模块的剩余语句来产生测试程序。

2. 发明授权

US5894424A Semiconductor testing apparatus 失效
标题翻译：半导体测试仪器
公开(公告)号：US5894424A
公开(公告)日：1999-04-13
申请号：US857095
申请日：1997-05-15
申请人： Masayuki Motohama , Junichi Hirase
发明人： Masayuki Motohama , Junichi Hirase
IPC分类号： G01R31/3183 , G01R31/319 , G11C29/00
CPC分类号： G01R31/31908 , G01R31/318307
摘要： The present invention offer a semiconductor testing apparatus which is able to test all functions of a semiconductor device in a short time. The semiconductor testing apparatus comprises a conditional imperative statement part storing therein all statements concerning conditional setting for the measuring means, a first comparison part for comparing statement received from the control means with the respective statements stored in the conditional imperative statement part, and a second comparison part for comparing the statements received from the control means with the respective statements stored in the memory means.
摘要翻译：本发明提供能够在短时间内测试半导体器件的所有功能的半导体测试装置。半导体测试装置包括条件命令声明部分，其中存储有关测量装置的条件设置的所有陈述，用于将从控制装置接收的语句与存储在条件命令声明部分中的各自语句进行比较的第一比较部分，以及第二比较用于将从控制装置接收的语句与存储在存储装置中的各自语句进行比较的部分。

3. 发明授权

US06351834B1 Apparatus for testing semiconductor device 有权
标题翻译：半导体器件测试装置
公开(公告)号：US06351834B1
公开(公告)日：2002-02-26
申请号：US09407898
申请日：1999-09-29
申请人： Michio Maekawa , Junichi Hirase
发明人： Michio Maekawa , Junichi Hirase
IPC分类号： G11C2900
CPC分类号： G11C29/56 , G01R31/31922 , G01R31/31926 , G01R31/31937
摘要： A plurality of testing units, each of which is applied to an input or output terminal of a device under test, are provided. An input pattern is supplied to a first testing unit that is applied to an input terminal, while expected patterns are supplied to second and third testing units that are applied to first and second output terminals, respectively. These testing units are operated in synchronism with a common clock signal. The second testing unit, which has received the expected pattern, communicates an evaluative result, indicating a point in time when the logical level of a voltage signal appearing at the first output terminal of the device under test matches with the expected pattern, to the third testing unit. And the third testing unit performs timing and functional tests on a signal appearing at the second output terminal with reference to this evaluative result.
摘要翻译：提供了多个测试单元，每个测试单元应用于被测设备的输入或输出端子。将输入图案提供给施加到输入端子的第一测试单元，同时将预期图案分别提供给施加到第一和第二输出端子的第二和第三测试单元。这些测试单元与公共时钟信号同步工作。已经接收到预期模式的第二测试单元传达评估结果，指示出现在被测设备的第一输出端子处的电压信号的逻辑电平与预期模式相匹配的时间点到第三测试单元测试单位。并且第三测试单元参考该评估结果对出现在第二输出端的信号执行定时和功能测试。

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