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    • 1. 发明授权
    • Field effect transistor
    • 场效应晶体管
    • US07956383B2
    • 2011-06-07
    • US12060505
    • 2008-04-01
    • Masayuki KurodaTetsuzo Ueda
    • Masayuki KurodaTetsuzo Ueda
    • H01L31/072
    • H01L29/7787H01L29/045H01L29/2003H01L29/4236H01L29/42376H01L29/452H01L29/518H01L29/66462
    • A field effect transistor includes: a first nitride semiconductor layer having a plane perpendicular to a (0001) plane or a plane tilted with respect to the (0001) plane as a main surface; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider bandgap than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer; and a source electrode and a drain electrode formed so as to contact at least a part of the second nitride semiconductor layer or the third nitride semiconductor layer. A recess that exposes a part of the second nitride semiconductor layer is formed between the source electrode and the drain electrode in the third nitride semiconductor layer. A gate electrode is formed in the recess and an insulating film is formed between the third nitride semiconductor layer and the gate electrode.
    • 场效应晶体管包括:具有垂直于(0001)面的平面或相对于(0001)面倾斜的平面作为主表面的第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更宽的带隙的第二氮化物半导体层; 形成在所述第二氮化物半导体层上的第三氮化物半导体层; 以及形成为与第二氮化物半导体层或第三氮化物半导体层的至少一部分接触的源电极和漏电极。 在第三氮化物半导体层中的源电极和漏电极之间形成露出第二氮化物半导体层的一部分的凹部。 在凹部中形成栅电极,在第三氮化物半导体层和栅电极之间形成绝缘膜。
    • 2. 发明授权
    • Nitride semiconductor device and manufacturing method thereof
    • 氮化物半导体器件及其制造方法
    • US07936049B2
    • 2011-05-03
    • US12823325
    • 2010-06-25
    • Masayuki KurodaTetsuzo Ueda
    • Masayuki KurodaTetsuzo Ueda
    • H01L21/338H01L29/812H01L29/778
    • H01L29/7787H01L29/045H01L29/2003H01L29/41766H01L29/66462
    • It is an object of the present invention to provide a nitride semiconductor device with low parasitic resistance by lowering barrier height to reduce contact resistance at an interface of semiconductor and metal. The nitride semiconductor device includes a GaN layer, a device isolation layer, an ohmic electrode, an n-type Al0.25Ga0.75N layer, a sapphire substrate, and a buffer layer. A main surface of the n-type Al0.25Ga0.75N layer is on (0 0 0 1) plane as a main surface, and concaves are arranged in a checkerboard pattern on the surface. The ohmic electrode contacts the sides of the concaves of the n-type Al0.25Ga0.75N layer, and the sides of the concaves are on non-polar surfaces such as (1 1 −2 0) plane or (1 −1 0 0) plane.
    • 本发明的目的是通过降低势垒高度来提供具有低寄生电阻的氮化物半导体器件,以降低半导体和金属界面处的接触电阻。 氮化物半导体器件包括GaN层,器件隔离层,欧姆电极,n型Al0.25Ga0.75N层,蓝宝石衬底和缓冲层。 n型Al0.25Ga0.75N层的主表面在(0 0 0 1)平面上作为主表面,并且凹面以表格形式布置在棋盘图案中。 欧姆电极接触n型Al0.25Ga0.75N层的凹面的侧面,凹面的两侧在非极性表面上,例如(11-2 -2)面或(1-1000) )飞机。
    • 3. 发明授权
    • Nitride semiconductor device and manufacturing method thereof
    • 氮化物半导体器件及其制造方法
    • US07777305B2
    • 2010-08-17
    • US12041825
    • 2008-03-04
    • Masayuki KurodaTetsuzo Ueda
    • Masayuki KurodaTetsuzo Ueda
    • H01L21/388H01L29/812H01L29/778
    • H01L29/7787H01L29/045H01L29/2003H01L29/41766H01L29/66462
    • It is an object of the present invention to provide a nitride semiconductor device with low parasitic resistance by lowering barrier height to reduce contact resistance at an interface of semiconductor and metal. The nitride semiconductor device includes a GaN layer, a device isolation layer, an ohmic electrode, an n-type Al0.25Ga0.75N layer, a sapphire substrate, and a buffer layer. A main surface of the n-type Al0.25Ga0.75N layer is on (0 0 0 1) plane as a main surface, and concaves are arranged in a checkerboard pattern on the surface. The ohmic electrode contacts the sides of the concaves of the n-type Al0.25Ga0.75N layer, and the sides of the concaves are on non-polar surfaces such as (1 1 −2 0) plane or (1 −1 0 0) plane.
    • 本发明的目的是通过降低势垒高度来提供具有低寄生电阻的氮化物半导体器件,以降低半导体和金属界面处的接触电阻。 氮化物半导体器件包括GaN层,器件隔离层,欧姆电极,n型Al0.25Ga0.75N层,蓝宝石衬底和缓冲层。 n型Al0.25Ga0.75N层的主表面在(0 0 0 1)平面上作为主表面,并且凹面以表格形式布置在棋盘图案中。 欧姆电极接触n型Al0.25Ga0.75N层的凹面的侧面,凹面的两侧在非极性表面上,例如(11-2 -2)面或(1-1000) )飞机。
    • 6. 发明申请
    • FIELD EFFECT TRANSISTOR
    • 场效应晶体管
    • US20080258243A1
    • 2008-10-23
    • US12060505
    • 2008-04-01
    • Masayuki KurodaTetsuzo Ueda
    • Masayuki KurodaTetsuzo Ueda
    • H01L49/00
    • H01L29/7787H01L29/045H01L29/2003H01L29/4236H01L29/42376H01L29/452H01L29/518H01L29/66462
    • A field effect transistor includes: a first nitride semiconductor layer having a plane perpendicular to a (0001) plane or a plane tilted with respect to the (0001) plane as a main surface; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider bandgap than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer; and a source electrode and a drain electrode formed so as to contact at least a part of the second nitride semiconductor layer or the third nitride semiconductor layer. A recess that exposes a part of the second nitride semiconductor layer is formed between the source electrode and the drain electrode in the third nitride semiconductor layer. A gate electrode is formed in the recess and an insulating film is formed between the third nitride semiconductor layer and the gate electrode.
    • 场效应晶体管包括:具有垂直于(0001)面的平面或相对于(0001)面倾斜的平面作为主表面的第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更宽的带隙的第二氮化物半导体层; 形成在所述第二氮化物半导体层上的第三氮化物半导体层; 以及形成为与第二氮化物半导体层或第三氮化物半导体层的至少一部分接触的源电极和漏电极。 在第三氮化物半导体层中的源电极和漏电极之间形成露出第二氮化物半导体层的一部分的凹部。 在凹部中形成栅电极,在第三氮化物半导体层和栅电极之间形成绝缘膜。
    • 7. 发明授权
    • Field effect transistor with main surface including C-axis
    • 场效应晶体管主表面包括C轴
    • US08089096B2
    • 2012-01-03
    • US11470316
    • 2006-09-06
    • Hidetoshi IshidaMasayuki KurodaTetsuzo Ueda
    • Hidetoshi IshidaMasayuki KurodaTetsuzo Ueda
    • H01L29/778H01L29/04
    • H01L29/7787H01L29/2003
    • A normally-off type field effect transistor includes: a first semiconductor layer which is made of a first hexagonal crystal with 6 mm symmetry and has a main surface including a C-axis of the first hexagonal crystal; a second semiconductor layer which is formed on the main surface of the first semiconductor layer and is made of a second hexagonal crystal with 6 mm symmetry having a band gap different from a band gap of the first hexagonal crystal; and a gate electrode, a source electrode and a drain electrode that are formed on the second semiconductor layer. Here, the film thickness of the first nitride semiconductor layer is 1.5 μm or less and the second semiconductor layer is doped with impurities at a dose of 1×1013 cm−2 or more.
    • 常关型场效应晶体管包括:第一半导体层,其由具有6mm对称性的第一六边形晶体制成并且具有包括第一六边形晶体的C轴的主表面; 第二半导体层,其形成在所述第一半导体层的主表面上,并且由具有与所述第一六边形晶体的带隙不同的带隙的6mm对称的第二六边形晶体制成; 以及形成在第二半导体层上的栅电极,源电极和漏电极。 这里,第一氮化物半导体层的膜厚为1.5μm以下,第二半导体层以1×1013cm-2以上的剂量掺杂杂质。
    • 10. 发明申请
    • FIXED CONSTANT VELOCITY UNIVERSAL JOINT
    • 固定不变速度通用接头
    • US20110212789A1
    • 2011-09-01
    • US13127561
    • 2009-11-27
    • Hirokazu OobaMasayuki KurodaHisaaki KuraTatsuro SugiyamaTeruaki Fujio
    • Hirokazu OobaMasayuki KurodaHisaaki KuraTatsuro SugiyamaTeruaki Fujio
    • F16D3/223
    • F16D3/2233F16D3/2237F16D2003/22306
    • Wedge angles are formed between mutually facing central track-groove portions (11b, 12b, 21b, 22b) of an outer joint member (1) and an inner joint member (2). Track grooves (11, 12) provided to the outer joint member (1) and track grooves (21, 22) provided to the inner joint member (2) include a first pair of track grooves (11, 21) respectively including the central track-groove portions (11b, 21b) forming therebetween the wedge angle (α) opening to an opening side of the outer joint member (1) under a state in which an operating angle is 0°, and a second pair of track grooves (12, 22) respectively including the central track-groove portions (12b, 22b) oppositely forming therebetween the wedge angle (β) opening to an inner-end side of the outer joint member (1) under the state in which the operating angle is 0° . Both the first track groove (11) and the second track groove (12) of the outer joint member (1) include opening-side track-groove portions (11c, 12c) connected respectively to the central track-groove portions (11b, 12b) directly, each of the opening-side track-groove portions (11c, 12c) being formed in such a shape as to be free from an undercut toward the opening side. Accordingly, it is possible to manufacture at low cost a high-efficient fixed type constant velocity universal joint which involves less torque loss.
    • 楔形角形成在外侧接头构件(1)和内侧接头构件(2)的相互面对的中心轨道槽部(11b,12b,21b,22b)之间。 设置在外侧接头部件(1)上的履带槽(11,12)和设置于内侧接头部件(2)的履带槽(21,22)包括:第一对履带槽(11,21),分别包括中心轨道 - 沟槽部分(11b,21b)之间形成在操作角度为0°的状态下向外侧接头构件(1)的开口侧开口的楔角(α)和第二对轨道槽(12 ,22),分别包括在所述外侧接头构件(1)的内侧侧与所述外侧接头构件(1)的内侧侧面相反地形成的中心轨道槽部(12b,22b),所述楔形角(& bgr) 0°。 外侧接头构件(1)的第一轨道槽(11)和第二轨道槽(12)都分别与中心轨道槽部(11b,12b)连接的开口侧轨道槽部(11c,12c) ),每个开口侧轨道槽部分(11c,12c)形成为朝向开口侧没有底切的形状。 因此,可以低成本地制造涉及较小转矩损失的高效率固定式等速万向接头。