专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07079491B2 Method and node apparatus for filtering ICMP data frame 失效
公开(公告)号：US07079491B2
公开(公告)日：2006-07-18
申请号：US09805607
申请日：2001-03-13
申请人： Masayoshi Nakano , Fumiharu Etoh , Tomoyuki Furutono
发明人： Masayoshi Nakano , Fumiharu Etoh , Tomoyuki Furutono
IPC分类号： H04J1/16
CPC分类号： H04L29/06 , H04L69/16
摘要： A node apparatus is provided for transmitting an ICMP data frame to a transmission source in response to an IP data frame received from the transmission source when detecting failure regarding the IP data frame. The node apparatus includes an information database storing information about necessity of generating the ICMP data frame for each attribute of the ICMP data frame corresponding to a type of the failure, an information management unit determining the necessity of generating the ICMP data frame by referring to the information database when the node apparatus detects the failure, and a processing unit generating the ICMP data frame if the information management unit determines that generation of the ICMP data frame is necessary, wherein the node apparatus transmits the ICMP data frame to the transmission source if the processing unit generates the ICMP data frame.

2. 发明授权

US06992660B2 Information processing apparatus, program and coordinate input method 失效
公开(公告)号：US06992660B2
公开(公告)日：2006-01-31
申请号：US10300065
申请日：2002-11-20
申请人： Seiichi Kawano , Masayoshi Nakano , Yuhko Ohmori
发明人： Seiichi Kawano , Masayoshi Nakano , Yuhko Ohmori
IPC分类号： G09G5/00
CPC分类号： G06F3/04883
摘要： An apparatus, program product and method of detecting, within a predetermined time period after an input of a first coordinate, an input of a second coordinate being apart a predetermined distance or more from a first coordinate, or detecting, within a predetermined time period after an input of the first coordinate, an input of the second coordinate being apart a predetermined distance or more from the first coordinate and the following input of a third coordinate near the first coordinate, whereby a first processing in accordance with the first coordinate or a second processing in accordance with the first coordinate is performed depending on the detected result.

3. 发明授权

US5875348A Information processing system 失效
标题翻译：信息处理系统
公开(公告)号：US5875348A
公开(公告)日：1999-02-23
申请号：US722281
申请日：1996-09-26
申请人： Shinji Matsushima , Saiichi Kawano , Masayoshi Nakano , Yuichi Shiraishi
发明人： Shinji Matsushima , Saiichi Kawano , Masayoshi Nakano , Yuichi Shiraishi
IPC分类号： G06F1/04 , G06F1/32 , G06F13/42 , G06F11/00
CPC分类号： G06F1/3215
摘要： Disclosed is a computer system that includes a CPU that can be operated both in a normal mode and in a power saving mode. The system further includes at least one peripheral device and a bus for allowing communication between the CPU and the peripheral device. A bus cycle detector monitors a bus cycle on the bus and a condition determiner determines the operation mode for the CPU in a specific bus cycle that is detected by the bus cycle detector. A signal generator is used to provide to the CPU, a control signal for changing the CPU's operation mode in accordance with a determination result obtained by the condition determiner. The disclosed system can reduce the operating frequency of a CPU or halt the operation of the CPU in accordance with an appropriate timing even when asynchronous communication is performed with peripheral devices.
摘要翻译：公开了一种计算机系统，其包括可以在正常模式和省电模式下操作的CPU。该系统还包括至少一个外围设备和总线，用于允许CPU与外围设备之间的通信。总线周期检测器监视总线上的总线周期，并且条件确定器确定由总线周期检测器检测到的特定总线周期中的CPU的操作模式。信号发生器用于向CPU提供用于根据由条件确定器获得的确定结果来改变CPU的操作模式的控制信号。所公开的系统可以降低CPU的工作频率，或者即使在与外围设备进行异步通信时，也可以根据适当的定时停止CPU的操作。

4. 发明申请

US20120239842A1 HIGH PERFORMANCE EXTENSION DEVICE 有权
标题翻译：高性能扩展设备
公开(公告)号：US20120239842A1
公开(公告)日：2012-09-20
申请号：US13046886
申请日：2011-03-14
申请人： Masayoshi Nakano
发明人： Masayoshi Nakano
IPC分类号： G06F13/00
CPC分类号： G06F13/426 , G06F13/4022
摘要： An extension device for connecting one or more peripheral devices to a computer, comprising a first bus for connecting to the computer; a second bus for connecting to the computer; a hub coupled to the first bus for connecting the computer to one or more peripheral devices; a controller for connecting the computer to a high-bandwidth device, the controller being switchably coupled to the hub and the second bus; and a switch for switching the controller, from being coupled to the hub, to being coupled to the second bus, when a connection to the computer is detected on the second bus.
摘要翻译：一种用于将一个或多个外围设备连接到计算机的扩展装置，包括用于连接到计算机的第一总线; 用于连接到计算机的第二条总线; 耦合到第一总线的集线器，用于将计算机连接到一个或多个外围设备; 用于将计算机连接到高带宽设备的控制器，所述控制器可切换地耦合到所述集线器和所述第二总线; 以及用于在所述第二总线上检测到与所述计算机的连接时，将所述控制器切换为耦合到所述集线器以将其耦合到所述第二总线的开关。

5. 发明授权

US07119797B2 Information processing apparatus, program and coordinate input method 有权
公开(公告)号：US07119797B2
公开(公告)日：2006-10-10
申请号：US10300274
申请日：2002-11-20
申请人： Seiichi Kawano , Masayoshi Nakano , Yuhko Ohmori
发明人： Seiichi Kawano , Masayoshi Nakano , Yuhko Ohmori
IPC分类号： G09G5/00
CPC分类号： G06F3/041 , G06F3/0421 , G06F3/043 , G06F3/0488
摘要： Units are provided for determining whether or not a coordinate input is continued as being substantially the same coordinate and a predetermined time period has lapsed after an initial input of an arbitrary coordinate by a coordinate input unit. A first processing unit performs a first processing in accordance with the coordinate when the determination is not met, and a second processing unit performs a second processing different from the first processing when the determination is met.

6. 发明授权

US06934151B2 Docking station 失效
标题翻译：对接站
公开(公告)号：US06934151B2
公开(公告)日：2005-08-23
申请号：US10792471
申请日：2004-03-03
申请人： Masayoshi Nakano , Hideyuki Usui
发明人： Masayoshi Nakano , Hideyuki Usui
IPC分类号： G06F13/10 , G06F1/16 , G06F1/18 , G06F13/00 , G06F13/14
CPC分类号： G06F1/1632
摘要： As a user depresses an eject button from the standard position to its sunken position and an instruction is transmitted to an installed notebook PC to request the disconnection of a driver for a device being operated in a docking station. When a notification is received from the PC indicating that the disconnection has been completed, for example and not to limit the a solenoid type electromagnetic apparatus switches a plunger to its non-projected position. The eject button is then placed into its projected position owing to the urging force of a spring. When the user depresses the eject button placed in its projected position, a motion direction converting lever is pivoted to activate an ejecting member and a locking hook. Consequently, the PC is ejected.
摘要翻译：当用户将弹出按钮从标准位置压到其下沉位置时，并且将指令传送到已安装的笔记本电脑，以请求在对接站中操作的设备的驾驶员断开连接。例如，当从PC接收到指示断线已经完成的通知时，不限制螺线管式电磁装置将柱塞切换到非突出位置。然后弹出按钮由于弹簧的推动力被放置到其突出位置。当用户按下放置在其突出位置的弹出按钮时，运动方向转换杆被枢转以启动弹出构件和锁定钩。因此，PC被弹出。

7. 发明授权

US06000035A Method and system for improved power management in information processing system 失效
标题翻译：信息处理系统电源管理改进方法与系统
公开(公告)号：US06000035A
公开(公告)日：1999-12-07
申请号：US676579
申请日：1996-07-01
申请人： Shinji Matsushima , Seiichi Kawano , Masayoshi Nakano , Takashi Inui
发明人： Shinji Matsushima , Seiichi Kawano , Masayoshi Nakano , Takashi Inui
IPC分类号： G06F1/04 , G06F1/32 , G06F1/00
CPC分类号： G06F1/3215
摘要： An information processing system that can reduce the operating frequency of a CPU, or halt the operation of the CPU, at an adequate timing, even when the system is engaged in exchanging data with another independent apparatus (e.g., another PC) via a communication port (a serial port or a parallel port), or when a communication application is being executed. The system has (a) a CPU that operates in a normal mode, in a power saving mode in which less power is consumed than is required in a normal mode, or in a stop mode in which operation is completely halted; (b) at least one peripheral device; (c) a bus employed for communication between the CPU and the peripheral device; (d) a communication port, physically connected to another independent apparatus, for performing data transfer; (e) a bus cycle detector monitoring a bus cycle on the bus; (f) a state detector determining an operational mode of the CPU in response to a detection by the bus cycle of access of the communication port; (g) a signal generator providing, when the state detector ascertains that the operational mode is to be the power saving mode, a control signal to the CPU to set the CPU to the power saving mode; and (h) a CPU operation halting signal completely halting an operation of the CPU when the state determination means ascertains that the operational mode is to be the stop mode.
摘要翻译：一种信息处理系统，即使在系统通过通信端口与另一独立设备（例如，另一个PC）交换数据时，可以在适当的定时降低CPU的工作频率或停止CPU的操作（串行端口或并行端口），或正在执行通信应用程序时。该系统具有（a）在正常模式下操作的CPU，其中消耗的功率比正常模式中所需的功率更少，或者在完全停止操作的停止模式中操作的CPU; （b）至少一个外围设备; （c）用于CPU与外围设备之间通信的总线; （d）物理地连接到另一独立设备的用于执行数据传送的通信端口; （e）总线周期检测器，监测总线上的总线周期; （f）状态检测器，响应于通过所述通信端口的总线周期的检测来确定所述CPU的操作模式; （g）信号发生器，当状态检测器确定操作模式是功率节省模式时，提供控制信号给CPU以将CPU设置为省电模式; 以及（h）当状态确定装置确定操作模式是停止模式时，CPU操作停止信号完全停止CPU的操作。

8. 发明申请

US20060250951A1 Path switching system for network 审中-公开
标题翻译：网路路径切换系统
公开(公告)号：US20060250951A1
公开(公告)日：2006-11-09
申请号：US11449038
申请日：2006-06-07
申请人： Koji Ueda , Kazuhiro Nakashima , Hirofumi Mitome , Tetsuya Uehori , Masayoshi Nakano
发明人： Koji Ueda , Kazuhiro Nakashima , Hirofumi Mitome , Tetsuya Uehori , Masayoshi Nakano
IPC分类号： H04J3/14
CPC分类号： H04L45/28 , H04L43/0817 , H04L45/00 , H04L45/22 , H04L45/50
摘要： A path switching system can dramatically decrease time required until a transfer path of user data is switched to a detour path when a failure occurred to a system/line constituting the network. In the path switching system, a path is set by a switch device and a plurality of relay devices adjacent to the switch device, and the switch device has a notification processing section notifying information to specify a corresponding relay device to the plurality of other relay devices when a failure of an adjacent relay device or a line failure between adjacent relay devices is detected, and the relay device has a path change processing section canceling information on the path that passes through the relay device detected to have a failure, from the information notified by the notification processing section of the relay device.
摘要翻译：当构成网络的系统/线路发生故障时，路径切换系统可以显着减少所需时间，直到用户数据的传输路径切换到迂回路径。在路径切换系统中，由开关装置和与开关装置相邻的多个中继装置设定路径，并且交换装置具有通知处理部，通知信息以向多个其他中继装置指定对应的中继装置当检测到相邻中继设备的故障或相邻中继设备之间的线路故障时，中继设备具有路径改变处理部分从通知的信息中取消通过检测到故障的中继设备的路径的信息由中继装置的通知处理部。

9. 发明授权

US06924442B2 Electronic input apparatus and method thereof 有权
标题翻译：电子输入装置及其方法
公开(公告)号：US06924442B2
公开(公告)日：2005-08-02
申请号：US09683281
申请日：2001-12-07
申请人： Masayoshi Nakano , Hirohide Komiyama , Takayuki Akai
发明人： Masayoshi Nakano , Hirohide Komiyama , Takayuki Akai
IPC分类号： B43K8/02 , B43K24/12 , G06F3/033 , G06F3/041 , G06F3/046 , G06K11/18 , G06K9/00 , G06K11/06 , G08C21/00 , G09G5/00
CPC分类号： G06F3/046 , G06F3/03545
摘要： A pen input apparatus includes a plurality of penpoints for drawing tracks on a recording medium such as paper, and a selector for selecting a specific penpoint from the plurality of penpoints. The input apparatus including a type recognition unit for recognizing the type of the selected penpoint (such as the color of a line which can be drawn, the thickness of the line, pen type such as ballpoint pen, sign pen or fluorescent pen), and a transmitter for transmitting the track of the penpoint as position information, and transmitting the information on the type recognized by the type recognition unit to a computer system.
摘要翻译：笔输入装置包括用于在诸如纸张的记录介质上绘制轨迹的多个笔尖，以及用于从多个笔尖中选择特定笔尖的选择器。该输入装置包括用于识别所选择的笔尖的类型（诸如可绘制的线的颜色，线的厚度，圆珠笔，标志笔或荧光笔等笔型）的类型识别单元，以及发送器，用于发送笔尖的轨迹作为位置信息，并将关于由类型识别单元识别的类型的信息发送到计算机系统。

10. 发明授权

US06800840B2 Portable information processor 失效
标题翻译：便携式信息处理器
公开(公告)号：US06800840B2
公开(公告)日：2004-10-05
申请号：US09950995
申请日：2001-09-11
申请人： Masayoshi Nakano , Tetsuji Nakamura , Takashi Yanagisawa , Fusanobu Nakamura
发明人： Masayoshi Nakano , Tetsuji Nakamura , Takashi Yanagisawa , Fusanobu Nakamura
IPC分类号： H01J4014
CPC分类号： G06F1/1677 , G06F1/1616 , G06F1/169 , G06F2200/1632
摘要： A portable information processor includes a computer main body and a digitizer connected by a flexible hinge defined in a cover. The hinge allows the computer main body and the digitizer to assume different superposed states by means of a flexible separable portion of the cover. In the superposed state of the computer main body and the digitizer, arbitrariness in folding back the separable portion causes runout between the computer main body and the digitizer. In spite of this runout, the superposed state can be accurately detected by means of an optical sensor, including an infrared radiator and an infrared-ray detector, disposed in the computer main body. A flexible reflection member is fixed to a predetermined surface of the separable portion of the leather cover, while assuring a predetermined area. If the computer main body and the digitizer assume a superposed state, light emitted from the infrared radiator is reflected by the flexible reflection member and is incident on the infrared-ray detector.
摘要翻译：便携式信息处理器包括计算机主体和通过限定在盖中的柔性铰链连接的数字转换器。铰链允许计算机主体和数字化仪借助于盖的柔性可分离部分来呈现不同的重叠状态。在计算机主体和数字化仪的叠加状态下，折回可分离部分的任意性导致计算机主体和数字化仪之间的跳动。尽管有这种跳动，但是可以通过设置在计算机主体中的包括红外辐射器和红外线检测器的光学传感器来精确地检测重叠状态。柔性反射构件固定在皮革罩的可分离部分的预定表面上，同时确保预定区域。如果计算机主体和数字转换器呈现叠加状态，则由红外辐射器发射的光被柔性反射构件反射并入射到红外线检测器上。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式