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1. 发明授权

US4429390A Digital signal transmitting system 失效
标题翻译：数字信号发射系统
公开(公告)号：US4429390A
公开(公告)日：1984-01-31
申请号：US290848
申请日：1981-08-07
申请人： Takenori Sonoda , Nobuhiko Watanabe , Masato Tanaka
发明人： Takenori Sonoda , Nobuhiko Watanabe , Masato Tanaka
IPC分类号： H03M13/00 , G08C19/28 , G11B5/09 , G11B20/12 , G11B20/18 , H03M13/27 , G06F11/10
CPC分类号： G11B20/1809
摘要： A digital signal is encoded for error correction, and the encoded digital signal is transmitted in M transmitting paths. The signal to be encoded occurs as N sequences of data words. A plurality n of sequences of error correcting words are generated from respective words of the N sequences delayed by respective different delay times of (D-di) words, where d.sub.i is a whole number associated with an ith one of the n error correcting word sequences. The resulting N data word sequences and n error correcting word sequences are provided with respective different total delay times, so that the total delays of the N sequences differ by an integral number D of words from one another. Blocks of the delayed N data sequences and n error correcting word sequences are formed and the blocks are cyclically distributed among the M transmitting paths. The values of M, N, n, D, and d.sub.i are selected so that the least common multiple of any two values of (d-d.sub.i) is greater than (N+n-1)D; and for any value of (D-di), (d-di) and M are relatively prime. Favorably, M is selected as 2.sup. k, and (D-d.sub.i) is odd.
摘要翻译：数字信号被编码用于纠错，并且编码的数字信号在M个发送路径中发送。待编码的信号以数据字的N个序列发生。从（D-di）个字的不同延迟时间延迟的N个序列的各个字生成多个n个纠错字序列，其中di是与n个纠错字序列中的第i个相关联的整数。所得到的N个数据字序列和n个纠错字序列被提供有相应不同的总延迟时间，使得N个序列的总延迟彼此相差一个单词的整数D。形成延迟的N个数据序列的块和n个纠错字序列，并且这些块在M个发送路径之间循环地分布。选择M，N，n，D和di的值，使得（d-di）任意两个值的最小公倍数大于（N + n-1）D; 并且对于（D-di），（d-di）和M的任何值都是相同的。有利地，选择M为2k，（D-di）为奇数。

2. 发明授权

US4441184A Method and apparatus for transmitting a digital signal 失效
标题翻译：用于发送数字信号的方法和装置
公开(公告)号：US4441184A
公开(公告)日：1984-04-03
申请号：US290850
申请日：1981-08-07
申请人： Takenori Sonoda , Nobuhiko Watanabe , Masato Tanaka
发明人： Takenori Sonoda , Nobuhiko Watanabe , Masato Tanaka
IPC分类号： G11B20/12 , G08C19/28 , G11B20/18 , H03M13/27 , H04B7/17 , H04B14/04 , H04B15/00 , G06F11/10
CPC分类号： G11B20/1809 , G11B20/1876
摘要： A PCM digital signal is provided with double-interleaving and error-correction encoding to protect against errors occurring during transmission, which can be carried out by magnetic recording and reproducing. The PCM signal is processed as error correcting blocks of several data word sequences and an associated error correction word sequence, and the double-interleaved sequences are then transmitted as transmission blocks. Up to one erroneous word in each error correction block can be corrected by using the error correction word sequence. Any uncorrectable word can be compensated by substituting a synthetic word interpolated from immediately preceding and following data words known to be correct. The distance between successive data words is made as great as possible so that a long burst error is unlikely to affect the ability to compensate uncorrectable errors. To achieve this, alternate words of the PCM signal are distributed to odd and even groups of sequences, and the interleaving is carried out by imparting different delay times to the respective sequences such that the greatest delay time imparted to the odd sequences is less than the shortest delay time imparted to the even sequences. The error correction word sequence is provided with a delay time intermediate the greatest delay time of the odd sequences and the shortest delay time of the even sequences.
摘要翻译： PCM数字信号具有双交错和纠错编码，以防止在传输期间发生的错误，这可以通过磁记录和再现来执行。 PCM信号被处理为几个数据字序列和相关联的纠错字序列的纠错块，然后将双交错序列作为传输块传输。可以通过使用纠错字序列来校正每个纠错块中的一个错误字。任何不可校正的单词都可以通过替换从已知正确的前一个和后续数据字内插的合成词来进行补偿。连续数据字之间的距离尽可能大，使得长突发错误不太可能影响补偿不可校正错误的能力。为了实现这一点，PCM信号的交替字被分配给奇数和偶数序列，并且通过给各个序列赋予不同的延迟时间来执行交织，使得赋予奇数序列的最大延迟时间小于给予偶数序列的最短延迟时间。误差校正字序列具有在奇数序列的最大延迟时间和偶数序列的最短延迟时间之间的延迟时间。

3. 发明授权

US4389681A Method and apparatus for recording digitized information on a record medium 失效
标题翻译：在记录介质上记录数字化信息的方法和装置
公开(公告)号：US4389681A
公开(公告)日：1983-06-21
申请号：US286963
申请日：1981-07-27
申请人： Masato Tanaka , Takenori Sonoda , Nobuhiko Watanabe
发明人： Masato Tanaka , Takenori Sonoda , Nobuhiko Watanabe
IPC分类号： G11B5/09 , G11B20/10 , G11B20/12 , G11B20/18 , G11B27/10 , G11B5/02
CPC分类号： G11B27/107 , G11B20/10527 , G11B20/1204 , G11B20/1806 , G11B20/1202 , G11B2020/10546 , G11B2020/1087 , G11B2220/90
摘要： At least one channel of digitized information is recorded in a selected number of data tracks by a record medium. The digitized information is encoded, modulated and then recorded in a predetermined number of tracks. For example, if n channels of digitized information are to be recorded in m data tracks, then each channel is recorded in m/n data tracks (m.gtoreq.n). A control signal is generated to include control data representing at least one of the following: (a) the number of data tracks in which each channel of digitized information is recorded, (b) the encoding scheme used to encode the information, (c) the type of modulation used to modulate the encoded information and (d) the relative speed of movement of the record medium. The control signal is recorded in a separate control track. Thus, the control signal represents the particular format in which the digitized information is recorded.
摘要翻译：数字化信息的至少一个通道由记录介质记录在选定数量的数据轨道中。数字化信息被编码，调制，然后记录在预定数量的磁道中。例如，如果n个通道的数字化信息要记录在m个数据轨道中，则每个通道被记录在m / n个数据轨道（m> / = n）中。生成控制信号以包括表示以下至少一个的控制数据：（a）记录数字化信息的每个通道的数据轨道的数量，（b）用于编码信息的编码方案，（c）用于调制编码信息的调制类型和（d）记录介质的相对移动速度。控制信号记录在单独的控制轨道中。因此，控制信号表示记录数字化信息的特定格式。

4. 发明授权

US4402021A Method and apparatus for recording digitized information on a record medium 失效
标题翻译：在记录介质上记录数字化信息的方法和装置
公开(公告)号：US4402021A
公开(公告)日：1983-08-30
申请号：US290196
申请日：1981-08-05
申请人： Takenori Sonoda , Nobuhiko Watanabe , Masato Tanaka
发明人： Takenori Sonoda , Nobuhiko Watanabe , Masato Tanaka
IPC分类号： G11B27/02 , G11B5/09 , G11B20/10 , G11B20/12 , G11B20/18 , G11B27/10 , G11B27/28 , G11B27/32 , G11B15/18
CPC分类号： G11B20/10527 , G11B20/1204 , G11B20/1809 , G11B27/107 , G11B27/322 , G11B27/323 , G11B20/1202 , G11B2020/10546 , G11B2220/90 , G11B2220/913
摘要： At least one channel of digitized information is recorded in at least one data track on a record medium by forming data blocks, each containing a predetermined number of data words representing the digitized information, and recording successive data blocks in at least one data track. A block address also is generated to identify each of the respective data blocks, this block address also being recorded with the data block in the data track. A predetermined number of successive data blocks is recorded in the data track in a sector interval. A control signal having at least a sector address for identifying the sector interval also is generated, and this control signal is recorded in a separate control track, successive control signals being recorded in successive sector intervals. The least significant bit of the sector address is coincident with the most significant bit of the block address, such that the block address is repeated with a periodicity related to the sector interval. The combination of the sector and block addresses is used to access a desired one of the recorded data blocks.
摘要翻译：数字化信息的至少一个通道通过形成数据块而被记录在记录介质上的至少一个数据轨道中，每个数据块包含表示数字化信息的预定数量的数据字，并将连续数据块记录在至少一个数据轨道中。生成块地址以识别每个相应的数据块，该块地址也与数据轨道中的数据块一起记录。预定数量的连续数据块以扇区间隔被记录在数据轨道中。至少具有用于识别扇区间隔的扇区地址的控制信号也被产生，并且该控制信号被记录在单独的控制轨道中，连续的控制信号以连续的扇区间隔被记录。扇区地址的最低有效位与块地址的最高有效位一致，使得以与扇区间隔相关的周期重复块地址。扇区和块地址的组合用于访问所需的一个记录的数据块。

5. 发明授权

US4348699A Apparatus for recording and/or reproducing digital signal 失效
标题翻译：用于记录和/或再现数字信号的装置
公开(公告)号：US4348699A
公开(公告)日：1982-09-07
申请号：US149299
申请日：1980-05-13
申请人： Yoshikazu Tsuchiya , Masato Tanaka , Takenori Sonoda , Tetsu Watanabe , Chiaki Kanai , Nobuhiko Watanabe
发明人： Yoshikazu Tsuchiya , Masato Tanaka , Takenori Sonoda , Tetsu Watanabe , Chiaki Kanai , Nobuhiko Watanabe
IPC分类号： G11B27/02 , G11B5/09 , G11B15/52 , G11B20/10 , G11B27/32 , G11B5/00
CPC分类号： G11B15/52 , G11B20/10527 , G11B27/322
摘要： An apparatus for recording and/or reproducing a serial digitized analog signal controls the transport speed of a recording medium according to the sampling rate employed in digitizing the analog signal to produce a constant data density on the recording medium regardless of the sampling rate selected. The frequency of a fundamental clock signal establishes the sampling frequency during recording. A coded timing signal also recorded on the recording medium includes both a sync signal and a coded identity of the sampling frequency in use. During reproduction, the coded identity of the sampling frequency is used to select the same fundamental clock signal as was used during recording and the reproduced sync signal is phase compared with a reference signal derived from the fundamental clock signal to correspondingly control the speed and phase of transport of the recording medium. The fundamental clock signal may be manually varied during reproduction for pitch control of the reproduced analog signal.
摘要翻译：用于记录和/或再现串行数字化模拟信号的装置根据在数字化模拟信号中采用的采样率来控制记录介质的传输速度，以在记录介质上产生恒定的数据密度，而不管选择的采样率如何。基本时钟信号的频率在记录期间建立采样频率。也记录在记录介质上的编码定时信号包括同步信号和使用中的采样频率的编码标识。在再现期间，使用采样频率的编码标识来选择与记录期间相同的基本时钟信号，并且再现的同步信号与从基本时钟信号导出的参考信号进行相位比较，以相应地控制速度和相位运输记录介质。可以在再现期间手动地改变基本时钟信号以用于再现的模拟信号的音调控制。

6. 发明授权

US5521714A Rotary head type reproducing apparatus 失效
标题翻译：旋转头式再现装置
公开(公告)号：US5521714A
公开(公告)日：1996-05-28
申请号：US327482
申请日：1994-10-21
申请人： Masato Tanaka , Nobuhiko Watanabe
发明人： Masato Tanaka , Nobuhiko Watanabe
IPC分类号： G11B5/02 , G11B5/09 , G11B15/02 , G11B15/04 , G11B27/13 , G11B33/10 , H04N5/7824
CPC分类号： G11B27/13 , G11B15/02 , G11B15/04 , G11B33/10 , G11B2220/90 , G11B2220/913
摘要： In a rotary head type reproducing apparatus, such as a digital audio tape recorder (DAT), a display changeover operation, a key scanning operation or a sensor scanning operation is inhibited during the periods T.sub.PB-A, T.sub.PB-B when a rotary head is in contact with a magnetic tape for reproducing signals, and the display changeover operation is performed during time periods T.sub.DS1 to T.sub.DS4 outside of these periods T.sub.PB-A, T.sub.PB-B, while the scanning operations are performed during a time period T.sub.SC. An error rate may be improved because noises due to display changeover or scanning may be eliminated during the time the magnetic head is contacted with the magnetic tape for signal reproduction. The result is that shielding or the like may be eliminated and the display section of switches may be mounted in proximity to the rotary head to reduce the size of weight of the apparatus.
摘要翻译：在诸如数字音频磁带录像机（DAT）的旋转磁头型再现装置中，当旋转磁头是旋转磁头是在时间段TPB-A，TPB-B期间，禁止显示切换操作，键扫描操作或传感器扫描操作与用于再现信号的磁带接触，并且在这些时段TPB-A，TPB-B之外的时间段TDS1至TDS4期间执行显示切换操作，同时在时间段TSC期间执行扫描操作。可能会改善错误率，因为在磁头与磁带接触以用于信号再现的时间期间可能消除由于显示切换或扫描引起的噪声。结果是可以消除屏蔽等，并且开关的显示部分可以安装在旋转头附近，以减小装置的重量。

7. 发明授权

US4385395A Bit clock reproducing circuit 失效
标题翻译：位时钟再现电路
公开(公告)号：US4385395A
公开(公告)日：1983-05-24
申请号：US254290
申请日：1981-04-15
申请人： Masato Tanaka , Nobuhiko Watanabe
发明人： Masato Tanaka , Nobuhiko Watanabe
IPC分类号： H03L7/08 , G11B20/14 , H04L7/027 , H04L7/033 , H04L25/04 , H03L7/06
CPC分类号： H04L7/0331 , G11B20/1403
摘要： A bit clock reproducing circuit produces an output bit clock signal in response to an input clock signal but without reproducing jitter present in the input signal. A counter is supplied with a reference clock signal as a counting input, and the counter is periodically loaded, at a fixed time during each cycle of the input clock signal, with data which is a predetermined function of the state of the counter at such times.
摘要翻译：位时钟再现电路响应于输入时钟信号产生输出位时钟信号，但不产生输入信号中存在的抖动。向计数器提供参考时钟信号作为计数输入，并且在输入时钟信号的每个周期期间的固定时间周期性地加载计数器，其中数据是在这样的时间的计数器的状态的预定函数。

8. 再颁专利

USRE36803E Bit clock reproducing circuit 失效
标题翻译：位时钟再现电路
公开(公告)号：USRE36803E
公开(公告)日：2000-08-01
申请号：US62484
申请日：1993-05-17
申请人： Masato Tanaka , Nobuhiko Watanabe
发明人： Masato Tanaka , Nobuhiko Watanabe
IPC分类号： G11B20/14 , H04L7/00
CPC分类号： G11B20/1403
摘要： .[.A bit clock reproducing circuit produces an output bit clock signal in response to an input clock signal but without reproducing jitter present in the input signal. A counter is supplied with a reference clock signal as a counting input, and the counter is periodically loaded, at a fixed time during each cycle of the input clock signal, with data which is a predetermined function of the state of the counter at such times..]. .Iadd.A bit clock reproducing circuit incorporates a counter for counting pulses of a clock pulse source after the arrival of an edge of a data pulse, at which time the counter is loaded with one of a number of preset values stored in a read-only memory, the contents of which are addressed by the counter output. Input data pulses are gated to an output terminal when the counter arrives at a predetermined state. Some values loaded into the counter may be the same for various different states of the counter immediately prior to the times when it is preset, and other values loaded into the counter are uniquely associated with the state of the counter at such times. .Iaddend.
摘要翻译： [位时钟再现电路响应于输入时钟信号产生输出位时钟信号，但不产生输入信号中存在的抖动。向计数器提供参考时钟信号作为计数输入，并且在输入时钟信号的每个周期期间的固定时间周期性地加载计数器，其中数据是在这样的时间的计数器的状态的预定函数 ]位时钟再现电路包括用于在数据脉冲的边缘到达之后对时钟脉冲源的脉冲进行计数的计数器，此时计数器加载存储在只读中的多个预设值中的一个存储器，其内容由计数器输出寻址。当计数器到达预定状态时，输入数据脉冲被选通到输出端。加载到计数器中的一些值可以在紧接其预设的时间之前的计数器的各种不同状态相同，并且加载到计数器中的其他值与这种时间的计数器的状态唯一地相关联。

9. 发明授权

US4525752A Apparatus for recording and reproducing a digital signal 失效
标题翻译：用于记录和再现数字信号的装置
公开(公告)号：US4525752A
公开(公告)日：1985-06-25
申请号：US465461
申请日：1983-02-10
申请人： Nobuhiko Watanabe , Masato Tanaka
发明人： Nobuhiko Watanabe , Masato Tanaka
IPC分类号： G11B15/46 , G11B15/52 , G11B19/28 , G11B20/10 , G11B20/12 , G11B20/18 , G11B27/032 , G11B27/10 , G11B27/02 , G11B5/00
CPC分类号： G11B20/10527 , G11B15/52 , G11B19/28 , G11B20/1204 , G11B20/18 , G11B27/032 , G11B27/10 , G11B20/1202 , G11B2220/90 , G11B2220/913
摘要： An apparatus for reproducing a digital signal recorded on a recording medium in the form of successive data blocks, in which each data block includes at least plural data words and a block address circulating with a predetermined phase relation to a certain reference signal. In accordance with the reference signal, a control signal is recorded on the recording medium. The control signal is reproduced from the recording medium and a reference phase signal with a frequency of an integral multiple of more than twice the frequency of the control signal is sampled by the control signal, and a phase comparison output and a lock mode signal are generated from the sampling output. The running phase of the recording medium is controlled by the phase comparison output whereby the fluctuation of running speed of the recording medium due to discontinuities of the control signal can be suppressed. Further, by the lock mode signal, it becomes easy to change the phase of a block address which will be added to a newly recordable digital signal.
摘要翻译：一种用于以连续的数据块的形式再现记录在记录介质上的数字信号的装置，其中每个数据块至少包括多个数据字，以及以与某个参考信号的预定相位关系循环的块地址。根据参考信号，控制信号被记录在记录介质上。控制信号从记录介质再现，并且通过控制信号对具有超过控制信号频率的两倍的整数倍的频率的参考相位信号进行采样，并且产生相位比较输出和锁定模式信号从采样输出。通过相位比较输出来控制记录介质的运行阶段，由此可以抑制由于控制信号的不连续性引起的记录介质的运行速度的波动。此外，通过锁定模式信号，容易改变将被添加到新记录的数字信号的块地址的相位。

10. 发明授权

US4492989A Time base correcting apparatus 失效
标题翻译：时基校正装置
公开(公告)号：US4492989A
公开(公告)日：1985-01-08
申请号：US465462
申请日：1983-02-10
申请人： Nobuhiko Watanabe , Masato Tanaka
发明人： Nobuhiko Watanabe , Masato Tanaka
IPC分类号： G11B20/10 , G11B20/12 , G11B20/18 , G11B20/22 , G11B27/10 , H03M13/27 , H04L7/00 , G11B5/00
CPC分类号： G11B20/1204 , G11B20/18 , G11B20/1813 , G11B20/225 , G11B27/10 , G11B20/1202 , G11B2220/90
摘要： A time base correcting apparatus is disclosed which is capable of correcting time base errors contained in a digital signal supplied thereto in the form of successive data blocks with each data block including plural data words. Each data block includes therein at least plural data words and a block address circulating with a predetermined phase relation relative to a certain reference signal. A memory is provided, having plural addressable storage locations, each adapted to store a respective data block. A write-in address to identify the particular storage locations is generated according to data block addresses and read-out addresses. The write-in address is varied by a lock phase mode signal indicative of a phase relation at which an incoming digital signal is locked to a reference signal so that notwithstanding the phase mode in which the digital signal is locked to the reference signal, the correction ability of the time base correcting apparatus can be prevented from being lowered.
摘要翻译：公开了一种时基校正装置，其能够以包括多个数据字的每个数据块以连续数据块的形式校正提供给其的数字信号中包含的时基误差。每个数据块在其中包括至少多个数据字和相对于某个参考信号以预定相位关系循环的块地址。提供了具有多个可寻址存储位置的存储器，每个存储位置适于存储相应的数据块。根据数据块地址和读出地址生成用于识别特定存储位置的写入地址。写入地址由指示输入数字信号被锁定到参考信号的相位关系的锁相模式信号而变化，使得即使数字信号被锁定到参考信号的相位模式，校正可以防止时基校正装置的能力降低。

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