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    • 3. 发明授权
    • Semiconductor memory device having a capability for controlled
activation of sense amplifiers
    • 具有用于感测放大器的受控激活能力的半导体存储器件
    • US5592433A
    • 1997-01-07
    • US643834
    • 1996-05-07
    • Hiroyoshi TomitaMakoto YanagisawaYukinori Kodama
    • Hiroyoshi TomitaMakoto YanagisawaYukinori Kodama
    • G11C7/06G11C13/00
    • G11C7/065
    • A semiconductor memory device includes a memory cell array in which a number of sense amplifiers are provided, a plurality of segmented drive lines each connected to a group of sense amplifiers for driving the same, each of the segmented drive lines being formed of first and second drive line segments forming a pair, and a number of trunks for supplying electric power to the segmented drive lines. Each of the trunks includes a first conductor strip extending from a first side of the memory cell array toward a second side for connection to a plurality of the first drive line segments upon crossing the same, and a second conductor strip extending from the second side of the memory cell array toward the first side for connection to a plurality of the second drive line segments upon crossing the same. The first and second conductor strips have distal end parts having a reduced width and a mutually complementary shape, such that the first and second conductor strips are disposed to form a straight strip having a substantially constant width throughout the memory cell array.
    • 一种半导体存储器件包括其中提供多个读出放大器的存储单元阵列,多个分段驱动线,每个驱动线连接到用于驱动读出放大器的一组读出放大器,每个分段驱动线由第一和第二 形成一对的驱动线段和用于向分段驱动线提供电力的多个中继线。 每个中继线包括从存储单元阵列的第一侧向第二侧延伸的第一导体条,用于在与第一驱动线段交叉时与多个第一驱动线段连接,第二导体条从第二侧延伸 所述存储单元阵列朝向所述第一侧,用于在与所述第二驱动线段交叉时连接到所述第二驱动线段。 第一和第二导体条具有具有减小的宽度和相互互补形状的远端部分,使得第一和第二导体条被设置成形成整个存储单元阵列具有基本恒定的宽度的直条。
    • 4. 发明授权
    • Semiconductor memory device having a capability for controlled
activation of sense amplifiers
    • 具有用于感测放大器的受控激活能力的半导体存储器件
    • US5384726A
    • 1995-01-24
    • US193535
    • 1994-02-08
    • Hiroyoshi TomitaMakoto YanagisawaYukinori Kodama
    • Hiroyoshi TomitaMakoto YanagisawaYukinori Kodama
    • G11C7/06G11C5/06
    • G11C7/065
    • A semiconductor memory device includes a memory cell array in which a number of sense amplifiers are provided, a plurality of segmented drive lines each connected to a group of sense amplifiers for driving the same, each of the segmented drive lines being formed of first and second drive line segments forming a pair, and a number of trunks for supplying electric power to the segmented drive lines. Each of the trunks includes a first conductor strip extending from a first side of the memory cell array toward a second side for connection to a plurality of the first drive line segments upon crossing the same, and a second conductor strip extending from the second side of the memory cell array toward the first side for connection to a plurality of the second drive line segments upon crossing the same. The first and second conductor strips have distal end parts having a reduced width and a mutually complementary shape, such that the first and second conductor strips are disposed to form a straight strip having a substantially constant width throughout the memory cell array.
    • 一种半导体存储器件包括其中提供多个读出放大器的存储单元阵列,多个分段驱动线,每个驱动线连接到用于驱动读出放大器的一组读出放大器,每个分段驱动线由第一和第二 形成一对的驱动线段和用于向分段驱动线提供电力的多个中继线。 每个中继线包括从存储单元阵列的第一侧向第二侧延伸的第一导体条,用于在与第一驱动线段交叉时与多个第一驱动线段连接,第二导体条从第二侧延伸 所述存储单元阵列朝向所述第一侧,用于在与所述第二驱动线段交叉时连接到所述第二驱动线段。 第一和第二导体条具有具有减小的宽度和相互互补形状的远端部分,使得第一和第二导体条被设置成形成整个存储单元阵列具有基本恒定的宽度的直条。
    • 5. 发明授权
    • Semiconductor integrated circuit having function for switching
operational mode of internal circuit
    • 具有切换内部电路工作模式功能的半导体集成电路
    • US4771407A
    • 1988-09-13
    • US79061
    • 1987-07-29
    • Yoshihiro TakemaeShigeki NozakiMasao NakanoKimiaki SatoHatsuo MiyaharaNobumi KodamaMakoto YanagisawaYasuhiro TakadaSatoshi Momozono
    • Yoshihiro TakemaeShigeki NozakiMasao NakanoKimiaki SatoHatsuo MiyaharaNobumi KodamaMakoto YanagisawaYasuhiro TakadaSatoshi Momozono
    • H03K3/353G01R31/28G11C11/401G11C29/46G11C11/40
    • G11C29/46
    • In a semiconductor integrated circuit having first and second power supply lines for receiving a power supply voltage, an external input terminal for receiving an input signal, and a high voltage detection circuit for detecting at the external input terminal a high voltage higher than a predetermined voltage which is higher than the power supply voltage, the high voltage detection circuit comprises an input circuit connected to the external input terminal for generating circuit for generating a reference voltage; and a differential voltage amplifier connected to receive the detection voltage and the reference voltage for amplifying the difference between the detection voltage and the reference voltage, to thereby determine whether the high voltage is applied, the input circuit comprising; a level shift element connected to the external input terminal for providing the detection voltage; an impedance element connected between the level shift element and the second power supply line; and a leak current compensating element connected between the first power supply line and the level shift element for allowing a current to flow from the first power supply line through the leak current compensating element and the impedance element to the second power supply line when the high voltage is not applied to the external input terminal.
    • 在具有用于接收电源电压的第一和第二电源线,用于接收输入信号的外部输入端子和用于在外部输入端子处检测高于预定电压的高电压的高电压检测电路的半导体集成电路中, 高电压检测电路包括连接到外部输入端的输入电路,用于产生用于产生参考电压的电路; 连接的差分电压放大器,用于接收检测电压和参考电压,用于放大检测电压和参考电压之间的差值,从而确定是否施加高电压,输入电路包括: 连接到所述外部输入端子以提供所述检测电压的电平移动元件; 连接在电平移位元件和第二电源线之间的阻抗元件; 以及泄漏电流补偿元件,其连接在所述第一电源线和所述电平移动元件之间,用于当高电压时允许电流从所述第一电源线流过所述漏电流补偿元件和所述阻抗元件流到所述第二电源线 不适用于外部输入端子。
    • 8. 发明授权
    • Semiconductor device
    • 半导体器件
    • US08823082B2
    • 2014-09-02
    • US13205671
    • 2011-08-09
    • Makoto Yanagisawa
    • Makoto Yanagisawa
    • H01L29/78H01L29/04
    • H01L29/7869H01L29/42384H01L29/42392H01L29/78642
    • The present invention is a semiconductor device including a first electrode over a substrate; a pair of oxide semiconductor films in contact with the first electrode; a second electrode in contact with the pair of oxide semiconductor films; a gate insulating film covering at least the first electrode and the pair of oxide semiconductor films; and a third electrode that is in contact with the gate insulating film and is formed at least between the pair of oxide semiconductor films. When the donor density of the oxide semiconductor films is 1.0×1013/cm3 or less, the thickness of the oxide semiconductor films is made larger than the in-plane length of each side of the oxide semiconductor films which is in contact with the first electrode.
    • 本发明是一种半导体器件,其包括在衬底上的第一电极; 与所述第一电极接触的一对氧化物半导体膜; 与所述一对氧化物半导体膜接触的第二电极; 覆盖至少所述第一电极和所述一对氧化物半导体膜的栅极绝缘膜; 以及与所述栅极绝缘膜接触并且至少形成在所述一对氧化物半导体膜之间的第三电极。 当氧化物半导体膜的供体密度为1.0×1013 / cm3以下时,使氧化物半导体膜的厚度大于与第一电极接触的氧化物半导体膜的各一侧的面内长度 。