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1. 发明授权

US07989856B2 Fin transistor 有权
标题翻译：鳍晶体管
公开(公告)号：US07989856B2
公开(公告)日：2011-08-02
申请号：US12335701
申请日：2008-12-16
申请人： Masakazu Goto , Nobutoshi Aoki , Takashi Izumida , Kimitoshi Okano , Satoshi Inaba , Ichiro Mizushima
发明人： Masakazu Goto , Nobutoshi Aoki , Takashi Izumida , Kimitoshi Okano , Satoshi Inaba , Ichiro Mizushima
IPC分类号： H01L21/336
CPC分类号： H01L29/785 , H01L29/7845
摘要： A fin transistor includes: a substrate; a plurality of semiconductor fins formed on the substrate; a gate electrode covering a channel region of the semiconductor fins; and a member as a stress source for the semiconductor fins included in a region of the gate electrode and the region provided between the semiconductor fins, and the member being made of a different material from the gate electrode.
摘要翻译：翅片晶体管包括：衬底; 形成在所述基板上的多个半导体翅片; 覆盖半导体鳍片的沟道区域的栅电极; 以及作为用于包括在栅极电极的区域中的半导体鳍片的应力源的构件和设置在半导体鳍片之间的区域，并且该构件由与栅电极不同的材料制成。

2. 发明授权

US07932564B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07932564B2
公开(公告)日：2011-04-26
申请号：US12146667
申请日：2008-06-26
申请人： Masakazu Goto , Makoto Fujiwara
发明人： Masakazu Goto , Makoto Fujiwara
IPC分类号： H01L27/088 , H01L21/8234
CPC分类号： H01L21/823437 , H01L21/823412 , H01L21/823431 , H01L21/823462 , H01L29/7851
摘要： A semiconductor device according to an embodiment includes: a fin type MOSFET having a first gate electrode, and a first gate insulating film for generating Fermi level pinning in the first gate electrode; and a planar type MOSFET having a second gate electrode, and a second gate insulating film for generating no Fermi level pinning in the second gate electrode, or generating Fermi level pinning weaker than that generated in the first gate electrode in the second gate electrode.
摘要翻译：根据实施例的半导体器件包括：具有第一栅电极的鳍型MOSFET和用于在第一栅电极中产生费米能级钉扎的第一栅极绝缘膜; 以及具有第二栅电极的平面型MOSFET和用于在第二栅电极中不产生费米能级钉扎的第二栅绝缘膜，或者产生比在第二栅电极中的第一栅电极中产生的费米能级钉扎更弱的费米能级钉扎。

3. 发明授权

US08426891B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08426891B2
公开(公告)日：2013-04-23
申请号：US12723917
申请日：2010-03-15
申请人： Masakazu Goto
发明人： Masakazu Goto
IPC分类号： H01L31/072
CPC分类号： H01L27/105 , H01L21/823864 , H01L27/11 , H01L27/1104 , H01L27/1116
摘要： A semiconductor substrate according to one embodiment includes: a first transistor having a first gate insulating film formed on a semiconductor substrate, a first gate electrode formed on the first gate insulating film and a first sidewall formed on a side face of the first gate electrode, the first gate insulating film comprising a high-dielectric constant material as a base material, a part of the first sidewall contacting with the first gate insulating film and containing Si and N; and a second transistor having a second gate insulating film formed on the semiconductor substrate, a second gate electrode formed on the second gate insulating film and a second sidewall formed on a side face of the second gate electrode so as to contact with the second gate insulating film, the second gate insulating film comprising a high-dielectric constant material as a base material, a part of the second sidewall contacting with the second gate insulating film and containing Si and N, wherein at least one of an abundance ratio of Si—H bond to N—H bond per unit volume, an amount of Cl per unit volume and an amount of H per unit volume of the second sidewall is larger than that of the first sidewall; and a threshold voltage of the second transistor is higher than that of the first transistor.
摘要翻译：根据一个实施例的半导体衬底包括：具有形成在半导体衬底上的第一栅极绝缘膜的第一晶体管，形成在第一栅极绝缘膜上的第一栅电极和形成在第一栅电极的侧面上的第一侧壁，所述第一栅极绝缘膜包括作为基材的高介电常数材料，所述第一侧壁的与所述第一栅极绝缘膜接触并且包含Si和N的部分; 以及第二晶体管，其具有形成在所述半导体基板上的第二栅极绝缘膜，形成在所述第二栅极绝缘膜上的第二栅极电极和形成在所述第二栅极电极的侧面上的第二侧壁，以与所述第二栅极绝缘体所述第二栅绝缘膜包括作为基材的高介电常数材料，所述第二侧壁的一部分与所述第二栅极绝缘膜接触并且含有Si和N，其中，所述第二栅绝缘膜中的Si-H的丰度比中的至少一个与每单位体积的NH键键合，每单位体积的Cl量和第二侧壁的每单位体积的H量大于第一侧壁的量; 并且第二晶体管的阈值电压高于第一晶体管的阈值电压。

4. 发明申请

US20100176460A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100176460A1
公开(公告)日：2010-07-15
申请号：US12628283
申请日：2009-12-01
申请人： Masakazu Goto
发明人： Masakazu Goto
IPC分类号： H01L27/088 , H01L21/8234
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device according to one embodiment includes: a semiconductor substrate having first and second regions; a first transistor comprising a first gate insulating film and a first gate electrode thereon in the first region on the semiconductor substrate, the first gate insulating film comprising a first interface layer containing nitrogen atoms and a first high dielectric constant layer thereon; a second transistor comprising a second gate insulating film and a second gate electrode thereon in the second region on the semiconductor substrate, the second gate insulating film comprising a second interface layer and a second high dielectric constant layer thereon, the second interface layer containing nitrogen atoms at an average concentration lower than that of the first interface layer or not containing nitrogen atoms, and the second transistor having a threshold voltage different from that of the first transistor; and an element isolation region on the semiconductor substrate, the element isolation region containing oxygen atoms and isolating the first transistor from the second transistor.
摘要翻译：根据一个实施例的半导体器件包括：具有第一和第二区域的半导体衬底; 所述第一晶体管包括在所述半导体衬底上的所述第一区域中的第一栅极绝缘膜和第一栅电极，所述第一栅极绝缘膜包括含有氮原子的第一界面层和其上的第一高介电常数层; 第二晶体管，其在半导体衬底上的第二区域中包括第二栅极绝缘膜和第二栅电极，第二栅极绝缘膜包括第二界面层和第二高介电常数层，第二界面层含有氮原子其平均浓度低于第一界面层的浓度或不含氮原子，第二晶体管具有与第一晶体管不同的阈值电压; 以及半导体衬底上的元件隔离区域，元件隔离区域包含氧原子并将第一晶体管与第二晶体管隔离。

5. 发明申请

US20140070328A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20140070328A1
公开(公告)日：2014-03-13
申请号：US13611040
申请日：2012-09-12
申请人： Masakazu Goto , Akira Hokazono
发明人： Masakazu Goto , Akira Hokazono
IPC分类号： H01L27/088 , H01L21/8234
CPC分类号： H01L21/823431 , H01L21/823821 , H01L27/0886 , H01L27/0924
摘要： Semiconductor devices and methods of fabricating semiconductor devices are provided. Two or more layers can be formed on a silicon substrate, wherein one or more of the layers are used for controlling an isolation recess. A first layer can comprise a first material and a second layer can comprise a second material.
摘要翻译：提供了制造半导体器件的半导体器件和方法。可以在硅衬底上形成两层或更多层，其中一层或多层用于控制隔离凹槽。第一层可以包括第一材料，第二层可以包括第二材料。

6. 发明授权

US08174049B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08174049B2
公开(公告)日：2012-05-08
申请号：US12628283
申请日：2009-12-01
申请人： Masakazu Goto
发明人： Masakazu Goto
IPC分类号： H01L29/66
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device according to one embodiment includes: a semiconductor substrate having first and second regions; a first transistor comprising a first gate insulating film and a first gate electrode thereon in the first region on the semiconductor substrate, the first gate insulating film comprising a first interface layer containing nitrogen atoms and a first high dielectric constant layer thereon; a second transistor comprising a second gate insulating film and a second gate electrode thereon in the second region on the semiconductor substrate, the second gate insulating film comprising a second interface layer and a second high dielectric constant layer thereon, the second interface layer containing nitrogen atoms at an average concentration lower than that of the first interface layer or not containing nitrogen atoms, and the second transistor having a threshold voltage different from that of the first transistor; and an element isolation region on the semiconductor substrate, the element isolation region containing oxygen atoms and isolating the first transistor from the second transistor.
摘要翻译：根据一个实施例的半导体器件包括：具有第一和第二区域的半导体衬底; 所述第一晶体管包括在所述半导体衬底上的所述第一区域中的第一栅极绝缘膜和第一栅电极，所述第一栅极绝缘膜包括含有氮原子的第一界面层和其上的第一高介电常数层; 第二晶体管，其在半导体衬底上的第二区域中包括第二栅极绝缘膜和第二栅电极，第二栅极绝缘膜包括第二界面层和第二高介电常数层，第二界面层含有氮原子其平均浓度低于第一界面层的浓度或不含氮原子，第二晶体管具有与第一晶体管不同的阈值电压; 以及半导体衬底上的元件隔离区域，元件隔离区域包含氧原子并将第一晶体管与第二晶体管隔离。

7. 发明授权

US08008728B2 Semiconductor device and manufacturing method of semiconductor device 失效
标题翻译：半导体器件及半导体器件的制造方法
公开(公告)号：US08008728B2
公开(公告)日：2011-08-30
申请号：US12398491
申请日：2009-03-05
申请人： Masakazu Goto
发明人： Masakazu Goto
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/76224 , H01L21/28194
摘要： In one aspect of the present invention, a semiconductor device may include a semiconductor substrate; an element isolation region provided in the semiconductor substrate and having an oxide layer and an oxidant-diffusion prevention layer provided on the oxide layer; a gate dielectric film provided on the semiconductor substrate and the oxidant-diffusion prevention layer; and a gate electrode provided on the gate dielectric film.
摘要翻译：在本发明的一个方面，半导体器件可以包括半导体衬底; 设置在所述半导体衬底中并且具有设置在所述氧化物层上的氧化物层和氧化剂扩散防止层的元件隔离区; 设置在半导体衬底和氧化剂扩散防止层上的栅介质膜; 以及设置在栅极电介质膜上的栅电极。

8. 发明申请

US20100072554A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100072554A1
公开(公告)日：2010-03-25
申请号：US12540679
申请日：2009-08-13
申请人： Masakazu Goto , Shigeru Kawanaka
发明人： Masakazu Goto , Shigeru Kawanaka
IPC分类号： H01L27/092 , H01L29/40
CPC分类号： H01L21/823828 , H01L21/823842 , H01L27/092 , H01L29/4958 , H01L29/4966 , H01L29/517 , H01L29/518 , H01L29/7833 , H01L29/7845
摘要： A semiconductor device according to one embodiment includes: an n-type transistor comprising a first gate electrode formed on a semiconductor substrate via a first gate insulating film, a first channel region formed in the semiconductor substrate under the first gate insulating film, and first source/drain regions formed in the semiconductor substrate on both sides of the first channel region, the first gate electrode comprising a first metal layer and a first conductive layer thereon; and a p-type transistor comprising a second gate electrode formed on the semiconductor substrate via a second gate insulating film, a second channel region formed in the semiconductor substrate under the second gate insulating film, and second source/drain regions formed in the semiconductor substrate on both sides of the second channel region, the second gate electrode comprising a second metal layer and a second conductive layer thereon, the second metal layer being thicker than the first metal layer and having the same constituent element as the first metal layer.
摘要翻译：根据一个实施例的半导体器件包括：n型晶体管，包括通过第一栅极绝缘膜形成在半导体衬底上的第一栅极电极，形成在第一栅极绝缘膜下方的半导体衬底中的第一沟道区域和第一源极 /漏区，形成在第一沟道区两侧的半导体衬底中，第一栅电极包括第一金属层和第一导电层; 以及p型晶体管，包括通过第二栅极绝缘膜形成在半导体衬底上的第二栅极电极，形成在第二栅极绝缘膜下方的半导体衬底中的第二沟道区域和形成在半导体衬底中的第二源极/漏极区域在第二沟道区域的两侧，第二栅电极在其上包括第二金属层和第二导电层，第二金属层比第一金属层厚，并具有与第一金属层相同的构成元件。

9. 发明申请

US20120139057A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120139057A1
公开(公告)日：2012-06-07
申请号：US12961793
申请日：2010-12-07
申请人： Masakazu Goto
发明人： Masakazu Goto
IPC分类号： H01L27/088 , H01L21/28 , H01L29/772
CPC分类号： H01L21/823462 , H01L21/28167 , H01L27/088 , H01L29/51 , H01L29/78
摘要： Semiconductors devices and methods of making semiconductor devices are provided. According to one embodiment, a semiconductor device, having more than two types of threshold voltages, can be employed in a logic integrated circuit with an embedded SRAM. The semiconductor device can include at least two transistors. The two transistors can be the same conductivity type (e.g., n-type or p-type). In addition, the two transistors can have disparate voltage thresholds.
摘要翻译：提供了制造半导体器件的半导体器件和方法。根据一个实施例，具有多于两种类型的阈值电压的半导体器件可以用于具有嵌入式SRAM的逻辑集成电路中。半导体器件可以包括至少两个晶体管。两个晶体管可以是相同的导电类型（例如，n型或p型）。另外，两个晶体管可以具有不同的电压阈值。

10. 发明授权

US08084831B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08084831B2
公开(公告)日：2011-12-27
申请号：US12540679
申请日：2009-08-13
申请人： Masakazu Goto , Shigeru Kawanaka
发明人： Masakazu Goto , Shigeru Kawanaka
IPC分类号： H01L27/088
CPC分类号： H01L21/823828 , H01L21/823842 , H01L27/092 , H01L29/4958 , H01L29/4966 , H01L29/517 , H01L29/518 , H01L29/7833 , H01L29/7845
摘要： A semiconductor device according to one embodiment includes: an n-type transistor comprising a first gate electrode formed on a semiconductor substrate via a first gate insulating film, a first channel region formed in the semiconductor substrate under the first gate insulating film, and first source/drain regions formed in the semiconductor substrate on both sides of the first channel region, the first gate electrode comprising a first metal layer and a first conductive layer thereon; and a p-type transistor comprising a second gate electrode formed on the semiconductor substrate via a second gate insulating film, a second channel region formed in the semiconductor substrate under the second gate insulating film, and second source/drain regions formed in the semiconductor substrate on both sides of the second channel region, the second gate electrode comprising a second metal layer and a second conductive layer thereon, the second metal layer being thicker than the first metal layer and having the same constituent element as the first metal layer.
摘要翻译：根据一个实施例的半导体器件包括：n型晶体管，包括通过第一栅极绝缘膜形成在半导体衬底上的第一栅极电极，形成在第一栅极绝缘膜下方的半导体衬底中的第一沟道区域和第一源极 /漏区，形成在第一沟道区两侧的半导体衬底中，第一栅电极包括第一金属层和第一导电层; 以及p型晶体管，包括通过第二栅极绝缘膜形成在半导体衬底上的第二栅极电极，形成在第二栅极绝缘膜下方的半导体衬底中的第二沟道区域和形成在半导体衬底中的第二源极/漏极区域在第二沟道区域的两侧，第二栅电极在其上包括第二金属层和第二导电层，第二金属层比第一金属层厚，并具有与第一金属层相同的构成元件。

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