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1. 发明授权

US4656494A Avalanche multiplication photodiode having a buried structure 失效
标题翻译：具有掩埋结构的雪崩倍增光电二极管
公开(公告)号：US4656494A
公开(公告)日：1987-04-07
申请号：US738724
申请日：1985-05-29
申请人： Masahiro Kobayashi , Susumu Yamazaki , Takashi Mikawa , Kazuo Nakajima , Takao Kaneda
发明人： Masahiro Kobayashi , Susumu Yamazaki , Takashi Mikawa , Kazuo Nakajima , Takao Kaneda
IPC分类号： H01L31/10 , H01L31/0352 , H01L31/107 , H01L27/14
CPC分类号： H01L31/1075 , H01L31/035281 , Y02E10/50
摘要： A buried structure avalanche multiplication photodiode (APD) is provided with a surface level difference between the multiplication region and guard ring region. The APD has a so-called separated absorption and multiplication region structure comprising an n-InGaAs light absorbing layer and an n-InP multiplication layer. The surface level difference is provided by selective growth of the layer in which the guard ring is formed or selective removal of the layer over the multiplication region. In the APD, the pn junction is level throughout the multiplication region and guard ring region or is made farther apart from the light absorbing layer in the guard ring region than in the multiplication region, and a significant reduction of dark current due to tunneling current in the InGaAs layer and/or InGaAsP layer is obtained. Moreover, the breakdown voltage difference of the pn junction in the multiplication region and the guard ring region has also been increased.
摘要翻译：掩埋结构雪崩倍增光电二极管（APD）在乘法区域和保护环区域之间具有表面电平差。 APD具有包括n-InGaAs光吸收层和n-InP倍增层的所谓的分离的吸收和乘法区域结构。表面电平差通过形成保护环的层的选择性生长或乘法区域上的层的选择性去除来提供。在APD中，pn结在整个乘法区域和保护环区域中是平坦的，或者在保护环区域中比在乘法区域中的光吸收层更远，并且由于隧道电流引起的暗电流显着降低获得InGaAs层和/或InGaAsP层。此外，倍增区域和保护环区域中的pn结的击穿电压差也增加。

2. 发明授权

US4935795A Avalanche photodiode with uniform avalanche multiplication 失效
标题翻译：具有均匀雪崩倍数的雪崩光电二极管
公开(公告)号：US4935795A
公开(公告)日：1990-06-19
申请号：US391649
申请日：1989-08-07
申请人： Takashi Mikawa , Takao Kaneda
发明人： Takashi Mikawa , Takao Kaneda
IPC分类号： H01L31/04 , H01L31/107
CPC分类号： H01L31/1075
摘要： An APD of the invention has its avalanche multiplication layer, made of a material which can cause a resonant impact ionization therein, between its window layer having a big band gap energy and light-absorbing layer having a band gap energy smaller than the window layer. The layout of the invention lowers field intensity in the light absorbing layer, thus, a dark current produced by a tunnel effect in the light absorbing layer is reduced. Because of great amount of ionization ratio in the resonant impact ionization phenomena, both excessive noise factor and the applied operating DC voltage to the APD can be much less than that of the prior art APD without employing the resonant impact ionization, as well as the operation speed can be increased. The reduced operation voltage protects unexpected local avalanche breakdown in the pn junction area, thus uniform and reliable avalanche multiplication is always initiated in the multiplication layer, resulting in reduction of dark current and allowing a voltage margin. For fabricating the APD, there is no difficult problem like the difficulty of doping n.sup.+ impurity in the p-type window layer in the prior art APD employing the resonant impact ionization. Excessive noise factor below 3, operation at 12.5 V, and operation at 10 GHZ are achieved.
摘要翻译：本发明的APD具有其具有大的带隙能量的窗口层和具有小于窗口层的带隙能量的光吸收层之间的能够引起共振冲击电离的材料的雪崩倍增层。本发明的布局降低了光吸收层中的场强，从而减少了由光吸收层中的隧道效应产生的暗电流。由于共振冲击电离现象中离子化比例大，所以与采用共振冲击电离的现有技术APD相比，过大的噪声因子和对APD的施加的工作直流电压都可以远小于现有技术的APD，速度可以提高。降低的操作电压保护pn结区域中意外的局部雪崩击穿，从而在乘法层中始终启动均匀可靠的雪崩倍增，导致暗电流的减小并允许电压裕量。对于制造APD，没有困难的问题，例如在采用谐振冲击电离的现有技术的APD中在p型窗口层中掺杂n +杂质的困难。噪音因子低于3，操作12.5 V，运行10 GHZ。

3. 发明授权

US4701773A Semiconductor device for receiving light 失效
标题翻译：用于接收光的半导体器件
公开(公告)号：US4701773A
公开(公告)日：1987-10-20
申请号：US900249
申请日：1986-08-25
申请人： Takao Kaneda , Kazuo Nakajima
发明人： Takao Kaneda , Kazuo Nakajima
IPC分类号： H01L31/10 , H01L31/107 , H01L31/109 , H01L29/90
CPC分类号： H01L31/1075 , H01L31/109
摘要： A semiconductor device for receiving light includes a first semiconductor layer having a first conductivity type; the device further includes a second semiconductor layer having the first conductivity type, contacting the first semiconductor layer, having a forbidden bandwidth larger than that of the first semiconductor layer and distributed so that the forbidden bandwidth has a maximum value at an intermediate position in the vertical direction and of the second semiconductor layer. The semiconductor device further includes a third semiconductor region having a second conductivity type opposite the first conductivity type, contacting the second semiconductor layer and having a forbidden bandwidth smaller than that of the third contact end portion between the semiconductor region and the second semiconductor layer and larger than that of the first semiconductor layer. The third semiconductor region having the second conductivity type acts as a window layer through which incident light is transmitted.
摘要翻译：用于接收光的半导体器件包括具有第一导电类型的第一半导体层; 该器件还包括具有第一导电类型的第二半导体层，与第一半导体层接触，具有大于第一半导体层的带宽的禁止带宽，并且被分配，使得禁止带宽在垂直于中间位置处具有最大值方向和第二半导体层。半导体器件还包括具有与第一导电类型相反的第二导电类型的第三半导体区域，与第二半导体层接触并且具有比半导体区域和第二半导体层之间的第三接触端部分的阻带宽度更小的禁带宽度比第一半导体层的厚度大。具有第二导电类型的第三半导体区域用作透射入射光的窗口层。

4. 发明授权

US4415370A Method of beryllium implantation in germanium substrate 失效
标题翻译：锗衬底中铍注入方法
公开(公告)号：US4415370A
公开(公告)日：1983-11-15
申请号：US187419
申请日：1980-09-15
申请人： Shuzo Kagawa , Tatsunori Shirai , Takao Kaneda , Yasuo Baba
发明人： Shuzo Kagawa , Tatsunori Shirai , Takao Kaneda , Yasuo Baba
IPC分类号： H01L21/265 , H01L29/167 , H01L31/0288 , H01L31/103 , H01L21/263
CPC分类号： H01L21/26506 , H01L29/167 , H01L31/0288 , H01L31/103 , Y02E10/50
摘要： A semiconductor device, and a method for manufacturing it in which ions of beryllium are implanted into a germanium substrate to form a layer containing p-type impurity material. There after the substrate is heated at a temperature in the range of 400.degree. C. to 700.degree. C. to diffuse the beryllium ions into the substrate so that the concentration of beryllium at the surface of the impurity layer is in the order of 10.sup.17 cm.sup.-3 or more. In one embodiment, a p-type channel stopper is formed locally in a p-type germanium substrate and an n-type active layer is formed in a region surrounded by, and isolated from, the channel stopper region. In another embodiment, a relatively shallow p-type active layer is formed at one part of an n-type germanium substrate and p-type guard ring regions are formed surrounding, and partly overlapping said p-type active layer. In a further embodiment, a p-type island region is formed at one part of an n-type germanium substrate, and an n-type region is formed within said p-type region. In these embodiments, the p-type channel stopper region, p-type guard ring regions and the p-type island region are all formed by implanting ions of beryllium into the germanium substrate.
摘要翻译：一种半导体器件及其制造方法，其中将铍的离子注入到锗衬底中以形成含有p型杂质的层。在400℃〜700℃的温度下加热基板后，将铍离子扩散到基板中，使杂质层表面的铍浓度为1017cm -1以下， 3以上。在一个实施例中，在p型锗衬底中局部形成p型通道阻挡层，并且在由沟道阻挡区域包围和隔离的区域中形成n型有源层。在另一个实施例中，在n型锗衬底的一部分处形成较浅的p型有源层，并且形成p型保护环区域，并且与所述p型有源层部分重叠。在另一实施例中，在n型锗衬底的一部分处形成p型岛区，在所述p型区内形成n型区。在这些实施例中，p型沟道截止区，p型保护环区和p型岛区均通过将铍离子注入到锗衬底中而形成。

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