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1. 发明申请

US20060174303A1 Moving picture encoding or decoding processing system and mobin g picture encoding or decoding processing method 审中-公开
标题翻译：运动图像编码或解码处理系统和移动图像编码或解码处理方法
公开(公告)号：US20060174303A1
公开(公告)日：2006-08-03
申请号：US10553651
申请日：2004-04-15
申请人： Masahiko Yoshimoto , Kentaro Kawakami , Miwako Kanamori , Hideo Ohira
发明人： Masahiko Yoshimoto , Kentaro Kawakami , Miwako Kanamori , Hideo Ohira
IPC分类号： H04N7/173 , H04N7/16
CPC分类号： H04N19/42 , H04N19/127 , H04N19/136 , H04N19/172 , H04N19/61
摘要： This invention is aimed at providing a motion picture encoding or decoding system and a motion picture encoding or decoding method which economize the electric power consumption efficiently as compared with the conventional technique. They are provided with at least one failure avoiding means adapted to calculate a necessary volume Kp of operation required for encoding or decoding one frame, decide an operating frequency F capable of encoding or decoding the necessary volume Kp of operation within a duration Te allocated in advance to the operation of encoding or decoding the one frame, perform the operation of encoding or decoding the one frame while continuing the operation of the processor at the operating frequency F and an operating voltage V befitting the operating frequency F, and avoid the failure situation which occurs when the necessary volume Kp of operation is smaller than the actually necessary volume of operation.
摘要翻译：本发明旨在提供一种与常规技术相比有效地节省电力消耗的运动图像编码或解码系统和运动图像编码或解码方法。它们被提供有至少一个故障避免装置，其适于计算编码或解码一帧所需的操作的必要体积Kp，决定能够在预先分配的持续时间Te内编码或解码所需体积Kp的操作频率F 对于一帧编码或解码的操作，在操作频率F持续处理器的操作和与操作频率F相匹配的操作电压V的同时执行对一帧进行编码或解码的操作，并避免出现故障情况当必需的操作量Kp小于实际所需的操作量时发生。

2. 发明申请

US20090024866A1 DIGITAL VLSI CIRCUIT AND IMAGE PROCESSING DEVICE INTO WHICH THE SAME IS ASSEMBLED 有权
标题翻译：数字VLSI电路和图像处理装置同时组装
公开(公告)号：US20090024866A1
公开(公告)日：2009-01-22
申请号：US12278015
申请日：2007-02-05
申请人： Masahiko Yoshimoto , Kentaro Kawakami
发明人： Masahiko Yoshimoto , Kentaro Kawakami
IPC分类号： G06F1/04 , G06F9/302
CPC分类号： G06F1/10 , G06F1/3203 , G06F1/3237 , Y02D10/128
摘要： A digital VLSI circuit is provided with functions in which the number of switching operations to supply electric power to each arithmetic operation unit is reduced in a restricted period of time while electric power supply is controlled for each arithmetic operation unit, so that low power consumption can be achieved in real pipe-line arithmetic operation. The VLSI circuit that performs each stage of the pipe-line arithmetic operation is comprised of a plurality of arithmetic operation units for carrying out arithmetic operations in synchronization with a clock signal, a detecting means for detecting completion of the stage in the arithmetic operation assigned to the arithmetic operation unit, and a clock signal supply control means for controlling supply/stop operation of the clock signal to each arithmetic operation unit, wherein the clock signal supply control means stops supplying the clock signal to a certain arithmetic operation unit when the detecting means detects the completion of the arithmetic operation assigned to the same, and restarts supplying the clock signal to all the arithmetic operation units for a next pipe-line arithmetic operation when the detecting means detects the completion of the arithmetic operations assigned to them.
摘要翻译：数字VLSI电路具有这样的功能，其中在每个算术运算单元控制电力供应时，在限制的时间段内减少向每个算术运算单元供电的开关操作次数，从而低功耗可以在实际管线算术运算中实现。执行管线算术运算的每个阶段的VLSI电路包括用于与时钟信号同步地执行算术运算的多个算术运算单元，检测装置，用于检测分配给算术运算单元，以及时钟信号供给控制单元，用于控制对每个算术运算单元的时钟信号的供给/停止运行，其中，当所述检测单元检测到所述检测单元时，所述时钟信号供给控制单元停止向所述算术运算单元供给所述时钟信号检测到分配给其的算术运算的完成，并且当检测装置检测到分配给它们的算术运算的完成时，重新开始向所有算术运算单元提供时钟信号用于下一个管线算术运算。

3. 发明授权

US08291256B2 Clock stop and restart control to pipelined arithmetic processing units processing plurality of macroblock data in image frame per frame processing period 有权
标题翻译：对每帧处理周期的图像帧处理多个宏块数据的流水线运算处理单元进行时钟停止和重启控制
公开(公告)号：US08291256B2
公开(公告)日：2012-10-16
申请号：US12278015
申请日：2007-02-05
申请人： Masahiko Yoshimoto , Kentaro Kawakami , Jun Takemura
发明人： Masahiko Yoshimoto , Kentaro Kawakami , Jun Takemura
IPC分类号： G06F1/04 , G06F15/80
CPC分类号： G06F1/10 , G06F1/3203 , G06F1/3237 , Y02D10/128
摘要： A digital VLSI circuit is provided with functions in which the number of switching operations to supply electric power to each arithmetic operation unit is reduced in a restricted period of time while electric power supply is controlled for each arithmetic operation unit, so that low power consumption can be achieved in real pipe-line arithmetic operation. The VLSI circuit that performs each stage of the pipe-line arithmetic operation is comprised of a plurality of arithmetic operation units for carrying out arithmetic operations in synchronization with a clock signal, a detecting means for detecting completion of the stage in the arithmetic operation assigned to the arithmetic operation unit, and a clock signal supply control means for controlling supply/stop operation of the clock signal to each arithmetic operation unit, wherein the clock signal supply control means stops supplying the clock signal to a certain arithmetic operation unit when the detecting means detects the completion of the arithmetic operation assigned to the same, and restarts supplying the clock signal to all the arithmetic operation units for a next pipe-line arithmetic operation when the detecting means detects the completion of the arithmetic operations assigned to them.
摘要翻译：数字VLSI电路具有这样的功能，其中在每个算术运算单元控制电力供应时，在限制的时间段内减少向每个算术运算单元供电的开关操作次数，从而低功耗可以在实际管线算术运算中实现。执行管线算术运算的每个阶段的VLSI电路包括用于与时钟信号同步地执行算术运算的多个算术运算单元，检测装置，用于检测分配给算术运算单元，以及时钟信号供给控制单元，用于控制对每个算术运算单元的时钟信号的供给/停止运行，其中，当所述检测单元检测到所述检测单元时，所述时钟信号供给控制单元停止向所述算术运算单元供给所述时钟信号检测到分配给其的算术运算的完成，并且当检测装置检测到分配给它们的算术运算的完成时，重新开始向所有算术运算单元提供时钟信号用于下一个管线算术运算。

4. 发明授权

US06808383B1 Device for forming vessel body 失效
标题翻译：用于形成血管体的装置
公开(公告)号：US06808383B1
公开(公告)日：2004-10-26
申请号：US09557176
申请日：2000-04-21
申请人： Kentaro Kawakami , Takayuki Aigami
发明人： Kentaro Kawakami , Takayuki Aigami
IPC分类号： B29C4308
CPC分类号： D21J3/00
摘要： A device, for forming a vessel body, which has an open top negative mold, a ring-like lid member for the negative mold with an inside diameter which is smaller than an open top diameter of the mold, a cylindrical rotary trowel which is mechanically fixed to move against an inner surface of the mold within a predetermined range and is at least longer in length than a height of an inner wall surface of the vessel body to be formed, and a trowel drive for rotating the rotary trowel.
摘要翻译：一种用于形成容器主体的装置，其具有敞开的顶部负模具，用于阴模的环形盖构件，其内径小于模具的开口顶部直径;圆筒形旋转t刀，其机械地被固定成在预定范围内抵靠模具的内表面移动，并且至少长于要形成的容器主体的内壁表面的高度，以及用于旋转t刀的el刀驱动器。

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