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1. 发明申请

US20090014806A1 Semiconductor Device and Method for Manufacturing the Same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090014806A1
公开(公告)日：2009-01-15
申请号：US11775504
申请日：2007-07-10
申请人： Martin Ostermayr , Winfried Kamp , Anton Huber
发明人： Martin Ostermayr , Winfried Kamp , Anton Huber
IPC分类号： H01L29/94 , H01L21/8238
CPC分类号： H01L21/823807 , H01L27/0207 , H01L27/1104
摘要： A semiconductor device and method of manufacturing thereof. The semiconductor device has at least one NMOS device and at least one PMOS device provided on a substrate. An electron channel of the NMOS device is aligned with a first direction. A hole channel of the PMOS device is aligned with a different second direction that forms an acute angle with respect to the first direction.
摘要翻译：一种半导体器件及其制造方法。半导体器件具有至少一个NMOS器件和设置在衬底上的至少一个PMOS器件。 NMOS器件的电子通道与第一方向对准。 PMOS器件的空穴通道与形成相对于第一方向的锐角的不同的第二方向对齐。

2. 发明授权

US07816198B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07816198B2
公开(公告)日：2010-10-19
申请号：US11775504
申请日：2007-07-10
申请人： Martin Ostermayr , Winfried Kamp , Anton Huber
发明人： Martin Ostermayr , Winfried Kamp , Anton Huber
IPC分类号： H01L29/94
CPC分类号： H01L21/823807 , H01L27/0207 , H01L27/1104
摘要： A semiconductor device and method of manufacturing thereof. The semiconductor device has at least one NMOS device and at least one PMOS device provided on a substrate. An electron channel of the NMOS device is aligned with a first direction. A hole channel of the PMOS device is aligned with a different second direction that forms an acute angle with respect to the first direction.
摘要翻译：一种半导体器件及其制造方法。半导体器件具有至少一个NMOS器件和设置在衬底上的至少一个PMOS器件。 NMOS器件的电子通道与第一方向对准。 PMOS器件的空穴通道与形成相对于第一方向的锐角的不同的第二方向对齐。

3. 发明授权

US08853791B2 SRAM memory cell having a dogleg shaped gate electrode structure 有权
标题翻译： SRAM存储单元具有狗形栅电极结构
公开(公告)号：US08853791B2
公开(公告)日：2014-10-07
申请号：US11593290
申请日：2006-11-06
申请人： Uwe Paul Schroeder , Martin Ostermayr
发明人： Uwe Paul Schroeder , Martin Ostermayr
IPC分类号： H01L27/07 , G11C11/412 , H01L27/11
CPC分类号： H01L27/1104 , G11C11/412
摘要： A memory cell includes diffusion regions formed in a substrate. Each of the diffusion regions extends along a vertical direction in a layout view at a substrate level. A first gate electrode structure at a gate electrode level is generally dogleg shaped. The first gate electrode structure extends in an oblique direction, turns to a horizontal direction, extends over and crosses the diffusion regions in the horizontal direction. A first contact structure at a contact level is generally rectangular shaped in the layout view of the cell. The first contact structure electrically connects a first source/drain region of the first diffusion region to the first gate electrode structure and the first source/drain region of the second diffusion region. The first contact structure extends from the first source/drain region of the first diffusion region to the first source/drain region of the second diffusion region at the contact level.
摘要翻译：存储单元包括形成在基板中的扩散区域。每个扩散区域在衬底层的布局图中沿垂直方向延伸。门电极级的第一栅极电极结构通常是狗牙形。第一栅电极结构沿倾斜方向延伸，向水平方向延伸，在水平方向上延伸并与扩散区交叉。接触级的第一接触结构在电池的布局视图中通常为矩形。第一接触结构将第一扩散区域的第一源极/漏极区域与第一扩散区域的第一栅极电极结构和第一源极/漏极区域电连接。第一接触结构从第一扩散区的第一源极/漏极区域延伸到第二扩散区域的第一源极/漏极区域处于接触电平。

4. 发明授权

US08546916B2 Capacitors and methods of manufacture thereof 有权
标题翻译：电容器及其制造方法
公开(公告)号：US08546916B2
公开(公告)日：2013-10-01
申请号：US12127576
申请日：2008-05-27
申请人： Martin Ostermayr , Richard Lindsay
发明人： Martin Ostermayr , Richard Lindsay
IPC分类号： H01L21/02
CPC分类号： H01L28/91 , H01L27/11 , H01L27/1104 , H01L29/94
摘要： Semiconductor devices, capacitors, and methods of manufacture thereof are disclosed. In one embodiment, a method of fabricating a capacitor includes forming a first material over a workpiece, and patterning the first material, forming a first capacitor plate in a first region of the workpiece and forming a first element in a second region of the workpiece. A second material is formed over the workpiece and over the patterned first material. The second material is patterned, forming a capacitor dielectric and a second capacitor plate in the first region of the workpiece over the first capacitor plate and forming a second element in a third region of the workpiece.
摘要翻译：公开了半导体器件，电容器及其制造方法。在一个实施例中，制造电容器的方法包括在工件上形成第一材料，并对第一材料进行构图，在工件的第一区域中形成第一电容器板，并在工件的第二区域中形成第一元件。第二材料形成在工件上面和图案化的第一材料上。图案化第二材料，在第一电容器板上的工件的第一区域中形成电容器电介质和第二电容器板，并在工件的第三区域中形成第二元件。

5. 发明授权

US08223573B2 Method and device for controlling a memory access and correspondingly configured semiconductor memory 有权
标题翻译：用于控制存储器存取和相应配置的半导体存储器的方法和装置
公开(公告)号：US08223573B2
公开(公告)日：2012-07-17
申请号：US12393386
申请日：2009-02-26
申请人： Siegmar Koeppe , Martin Ostermayr
发明人： Siegmar Koeppe , Martin Ostermayr
IPC分类号： G11C7/14
CPC分类号： G11C8/08 , G11C11/417 , Y10T29/49002
摘要： Method and device for controlling a memory access and correspondingly configured semiconductor memoryA method and a device for controlling a memory access of a memory comprising memory cells are described. A completion of the memory access is determined by means of at least one dummy bit line. The at least one dummy bit line is connected to a plurality of memory cells of the memory cells of the memory such that a content of the at least one memory cell can be read out via the at least one dummy bit line. The at least one memory cell can be set to a predetermined potential. Each of said plurality of memory cells is connected to the at least one dummy bit line and to at least one dummy word line such that each of said plurality of memory cells can be set to the predetermined potential by means of the at least one dummy bit line and by means of the at least one dummy word line.
摘要翻译：用于控制存储器访问的方法和设备以及对应配置的半导体存储器描述了一种用于控制包括存储器单元的存储器的存储器访问的方法和设备。通过至少一个虚拟位线来确定存储器访问的完成。至少一个虚拟位线连接到存储器的存储器单元的多个存储器单元，使得可以经由至少一个虚拟位线读出至少一个存储单元的内容。可以将至少一个存储单元设置为预定电位。所述多个存储器单元中的每一个连接到所述至少一个虚拟位线和至少一个虚拟字线，使得所述多个存储器单元中的每一个可以通过所述至少一个虚拟位被设置为预定电位并且借助于至少一个虚拟字线。

6. 发明申请

US20050243637A1 Method for programming a memory arrangement and programmed memory arrangement 有权
标题翻译：用于编程存储器布置和编程存储器布置的方法
公开(公告)号：US20050243637A1
公开(公告)日：2005-11-03
申请号：US11115031
申请日：2005-04-26
申请人： Yannick Martelloni , Martin Ostermayr
发明人： Yannick Martelloni , Martin Ostermayr
IPC分类号： G11C8/00 , G11C17/08 , G11C17/12
CPC分类号： G11C17/12
摘要： A read-only memory arrangement and method for programming the memory arrangement are provided. The memory arrangement includes memory cells, which each have a transistor with two contacts and a control terminal, address lines, bit lines and a potential line. A combination of one of the address lines and one of the bit lines is uniquely assigned to each memory cell. The control terminal of each transistor is connected to the address line assigned to the respective memory cell. To program a memory cell into a first memory state, one of the contacts of the transistor of the memory cell is connected to the assigned bit line and the other of the contacts is connected to the potential line. To program a memory cell into a second memory state, no connections are established between the contacts of the transistor and either the assigned bit line or the potential line.
摘要翻译：提供了一种用于编程存储器装置的只读存储器布置和方法。存储器装置包括存储单元，每个存储单元具有具有两个触点的晶体管和控制端子，地址线，位线和电位线。地址线之一和位线之一的组合被唯一地分配给每个存储单元。每个晶体管的控制端连接到分配给相应存储单元的地址线。为了将存储器单元编程到第一存储器状态，存储单元的晶体管的一个触点连接到分配的位线，并且另一个触点连接到电位线。为了将存储器单元编程为第二存储器状态，在晶体管的触点与分配的位线或电位线之间不建立连接。

7. 发明授权

US08531907B2 Semiconductor memory device and method 有权
标题翻译：半导体存储器件及方法
公开(公告)号：US08531907B2
公开(公告)日：2013-09-10
申请号：US13016798
申请日：2011-01-28
申请人： Martin Ostermayr , Robert Chi-Foon Wong
发明人： Martin Ostermayr , Robert Chi-Foon Wong
IPC分类号： G11C8/00 , G11C7/00
CPC分类号： G11C11/412
摘要： In an embodiment, a method of operating a memory cell coupled to a first port and to a second port includes determining if a first port is requesting to access the memory cell and determining if a second port is requesting to access the memory cell. Based on the determining, if the first port and the second port are simultaneously requesting to access the memory cell, the second port is deactivated, the memory cell is accessed from the first port, and an accessed memory state is propagated from the first port to circuitry associated with the second port.
摘要翻译：在一个实施例中，操作耦合到第一端口和第二端口的存储器单元的方法包括确定第一端口是否请求访问存储器单元并且确定第二端口是否请求访问存储器单元。基于确定，如果第一端口和第二端口同时请求访问存储器单元，则停用第二端口，从第一端口访问存储器单元，并且将访问的存储器状态从第一端口传播到与第二个端口相关联的电路。

8. 发明授权

US08518820B2 Methods for forming contacts in semiconductor devices 有权
标题翻译：在半导体器件中形成触点的方法
公开(公告)号：US08518820B2
公开(公告)日：2013-08-27
申请号：US13301196
申请日：2011-11-21
申请人： Roberto Schiwon , Klaus Herold , Jenny Lian , Sajan Marokkey , Martin Ostermayr
发明人： Roberto Schiwon , Klaus Herold , Jenny Lian , Sajan Marokkey , Martin Ostermayr
IPC分类号： H01L21/4763
CPC分类号： H01L27/105 , G03F1/00 , G03F7/0035 , H01L21/0274 , H01L21/31144 , H01L21/76816 , H01L27/0207 , H01L27/1116
摘要： Mask sets, layout design, and methods for forming contacts in devices are described. In one embodiment, a semiconductor device includes a plurality of contacts disposed over a substrate, the plurality of contacts being disposed as rows and columns on an orthogonal grid, each row of the plurality of contacts is spaced from an neighboring row of the plurality of contacts by a first distance, and each column of the plurality of contacts is spaced from an neighboring column of the plurality of contacts by a second distance.
摘要翻译：描述了用于在设备中形成触点的掩模套，布局设计和方法。在一个实施例中，半导体器件包括设置在衬底上的多个触点，多个触点被布置为正交格栅上的行和列，多个触点的每一行与多个触点的相邻行间隔开并且所述多个触点中的每一列与所述多个触点的相邻列间隔开第二距离。

9. 发明授权

US07995366B2 Homogenous cell array 有权
标题翻译：均质细胞阵列
公开(公告)号：US07995366B2
公开(公告)日：2011-08-09
申请号：US12551062
申请日：2009-08-31
申请人： Martin Ostermayr , Ettore Amirante , Peter Huber
发明人： Martin Ostermayr , Ettore Amirante , Peter Huber
IPC分类号： G11C11/40
CPC分类号： H01L27/1104 , G11C5/025 , H01L27/0207 , H01L27/11807
摘要： A system for terminating a homogenous cell array is disclosed. A preferred embodiment comprises a plurality of homogenous cells arranged in rows and columns to form the homogenous cell array, wherein a first homogenous cell of each column is electrically differently connected than a rest of the homogenous cells of the column.
摘要翻译：公开了一种用于终止均匀单元阵列的系统。优选的实施方案包括以行和列排列以形成均匀的电池阵列的多个均质电池，其中每列的第一均匀电池与所述塔的其余均匀电池电气不同地连接。

10. 发明申请

US20100187611A1 Contacts in Semiconductor Devices 审中-公开
标题翻译：半导体器件联系人
公开(公告)号：US20100187611A1
公开(公告)日：2010-07-29
申请号：US12360599
申请日：2009-01-27
申请人： Roberto Schiwon , Klaus Herold , Jenny Lian , Sajan Marokkey , Martin Ostermayr
发明人： Roberto Schiwon , Klaus Herold , Jenny Lian , Sajan Marokkey , Martin Ostermayr
IPC分类号： H01L27/11 , H01L21/04 , H01L23/48
CPC分类号： H01L27/105 , G03F1/00 , G03F7/0035 , H01L21/0274 , H01L21/31144 , H01L21/76816 , H01L27/0207 , H01L27/1116
摘要： Mask sets, layout design, and methods for forming contacts in devices are described. In one embodiment, a semiconductor device includes a plurality of contacts disposed over a substrate, the plurality of contacts being disposed as rows and columns on an orthogonal grid, each row of the plurality of contacts is spaced from an neighboring row of the plurality of contacts by a first distance, and each column of the plurality of contacts is spaced from an neighboring column of the plurality of contacts by a second distance.
摘要翻译：描述了用于在设备中形成触点的掩模套，布局设计和方法。在一个实施例中，半导体器件包括设置在衬底上的多个触点，多个触点被布置为正交格栅上的行和列，多个触点的每一行与多个触点的相邻行间隔开并且所述多个触点中的每一列与所述多个触点的相邻列间隔开第二距离。

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