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1. 发明申请

US20110151142A1 PECVD MULTI-STEP PROCESSING WITH CONTINUOUS PLASMA 审中-公开
标题翻译： PECVD多步加工连续等离子体
公开(公告)号：US20110151142A1
公开(公告)日：2011-06-23
申请号：US12969333
申请日：2010-12-15
申请人： Martin Jay Seamons , Sum-Yee Betty Tang , Michael H. Lin , Patrick Reilly , Sudha Rathi
发明人： Martin Jay Seamons , Sum-Yee Betty Tang , Michael H. Lin , Patrick Reilly , Sudha Rathi
IPC分类号： H05H1/24
CPC分类号： C23C16/45523 , C23C16/4401
摘要： Embodiments of the present invention provide methods for reducing defects during multi-layer deposition. In one embodiment, the method includes exposing the substrate to a first gas mixture and an inert gas in the presence of a plasma to deposit a first material layer on the substrate, terminating the first gas mixture when a desired thickness of the first material is achieved while still maintaining the plasma and flowing the inert gas, and exposing the substrate to the inert gas and a second gas mixture that are compatible with the first gas mixture in the presence of the plasma to deposit a second material layer over the first material layer in the same processing chamber, wherein the first material layer and the second material layer are different from each other.
摘要翻译：本发明的实施例提供了在多层沉积期间减少缺陷的方法。在一个实施例中，该方法包括在存在等离子体的情况下将衬底暴露于第一气体混合物和惰性气体，以在衬底上沉积第一材料层，当达到所需的第一材料厚度时终止第一气体混合物同时仍保持等离子体并使惰性气体流动，并将衬底暴露于惰性气体和在存在等离子体的情况下与第一气体混合物相容的第二气体混合物以在第一材料层上沉积第二材料层相同的处理室，其中第一材料层和第二材料层彼此不同。

2. 发明申请

US20070207275A1 Enhancement of remote plasma source clean for dielectric films 审中-公开
标题翻译：电介质薄膜远程等离子体源清洁的增强
公开(公告)号：US20070207275A1
公开(公告)日：2007-09-06
申请号：US11508544
申请日：2006-08-23
申请人： Thomas Nowak , Kang Sub Yim , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Vu Ngoc Tran Nguyen , Dennis Singleton , Martin Jay Seamons , Karthik Janakiraman , Ganesh Balasubramanian , Mohamed Ayoub , Wendy H. Yeh , Alexandros T. Demos , Hichem M'Saad
发明人： Thomas Nowak , Kang Sub Yim , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Vu Ngoc Tran Nguyen , Dennis Singleton , Martin Jay Seamons , Karthik Janakiraman , Ganesh Balasubramanian , Mohamed Ayoub , Wendy H. Yeh , Alexandros T. Demos , Hichem M'Saad
IPC分类号： H05H1/24
CPC分类号： C23C16/4405 , B08B7/0035 , H01J37/32357 , H01J37/32862
摘要： Methods for cleaning semiconductor processing chambers used to process carbon-containing films, such as amorphous carbon films, barrier films comprising silicon and carbon, and low dielectric constant films including silicon, oxygen, and carbon are provided. The methods include using a remote plasma source to generate reactive species that clean interior surfaces of a processing chamber in the absence of RF power in the chamber. The reactive species are generated from an oxygen-containing gas, such as O2, and/or a halogen-containing gas, such as NF3. An oxygen-based ashing process may also be used to remove carbon deposits from the interior surfaces of the chamber before the chamber is exposed to the reactive species from the remote plasma source.
摘要翻译：提供了用于处理用于处理含碳膜的半导体处理室的方法，例如非晶碳膜，包含硅和碳的阻挡膜以及包括硅，氧和碳的低介电常数膜。这些方法包括使用远程等离子体源来产生在腔室中没有RF功率的情况下清洁处理室的内表面的反应物质。反应性物质由含氧气体（例如O 2）和/或含卤素气体如NF 3 N产生。在室暴露于来自远程等离子体源的反应物质之前，还可以使用氧基灰化方法从室的内表面去除碳沉积物。

3. 发明授权

US07407893B2 Liquid precursors for the CVD deposition of amorphous carbon films 有权
标题翻译：用于CVD沉积无定形碳膜的液体前体
公开(公告)号：US07407893B2
公开(公告)日：2008-08-05
申请号：US11065464
申请日：2005-02-24
申请人： Martin Jay Seamons , Wendy H. Yeh , Sudha S. R. Rathi , Deenesh Padhi , Andy (Hsin Chiao) Luan , Sum-Yee Betty Tang , Priya Kulkarni , Visweswaren Sivaramakrishnan , Bok Hoen Kim , Hichem M'Saad , Yuxiang May Wang , Michael Chiu Kwan
发明人： Martin Jay Seamons , Wendy H. Yeh , Sudha S. R. Rathi , Deenesh Padhi , Andy (Hsin Chiao) Luan , Sum-Yee Betty Tang , Priya Kulkarni , Visweswaren Sivaramakrishnan , Bok Hoen Kim , Hichem M'Saad , Yuxiang May Wang , Michael Chiu Kwan
IPC分类号： H01L21/31 , H01L21/461
CPC分类号： C23C16/505 , H01L21/3146 , H01L21/76801 , H01L21/76802 , H01L21/7681 , H01L21/76829
摘要： Methods are provided for depositing amorphous carbon materials. In one aspect, the invention provides a method for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas into the processing chamber, wherein the processing gas comprises a carrier gas, hydrogen, and one or more precursor compounds, generating a plasma of the processing gas by applying power from a dual-frequency RF source, and depositing an amorphous carbon layer on the substrate.
摘要翻译：提供了沉积无定形碳材料的方法。一方面，本发明提供了一种处理衬底的方法，包括将衬底定位在处理室中，将处理气体引入处理室，其中处理气体包括载气，氢气和一种或多种前体化合物，产生处理气体的等离子体，通过从双频RF源施加电力，以及在基板上沉积无定形碳层。

4. 发明申请

US20100239979A1 GRADED ARC FOR HIGH NA AND IMMERSION LITHOGRAPHY 有权
标题翻译：用于高精度和倾斜平面的分级弧
公开(公告)号：US20100239979A1
公开(公告)日：2010-09-23
申请号：US12797406
申请日：2010-06-09
申请人： Wendy H. Yeh , Martin J. Seamons , Matthew Spuller , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Sudha Rathi
发明人： Wendy H. Yeh , Martin J. Seamons , Matthew Spuller , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Sudha Rathi
IPC分类号： G03F7/004 , G03F7/20
CPC分类号： G03F7/091 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.
摘要翻译：提供了使用渐变抗反射涂层形成装置的方法。在基板上形成一个或多个非晶碳层。在一个或多个非晶碳层上形成抗反射涂层（ARC），其中ARC层具有在ARC层的厚度上变化的吸收系数。在ARC层上形成能量敏感的抗蚀剂材料。通过将能量敏感的抗蚀剂材料暴露于图案化的辐射，将图案的图像引入到能量敏感抗蚀剂材料层中。开发了引入能量敏感抗蚀剂材料层的图案的图像。

5. 发明授权

US08125034B2 Graded ARC for high NA and immersion lithography 有权
标题翻译：分级ARC用于高NA和浸没光刻
公开(公告)号：US08125034B2
公开(公告)日：2012-02-28
申请号：US12797406
申请日：2010-06-09
申请人： Wendy H. Yeh , Martin J. Seamons , Matthew Spuller , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Sudha Rathi
发明人： Wendy H. Yeh , Martin J. Seamons , Matthew Spuller , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Sudha Rathi
IPC分类号： H01L23/48
CPC分类号： G03F7/091 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.
摘要翻译：提供了使用渐变抗反射涂层形成装置的方法。在基板上形成一个或多个非晶碳层。在一个或多个非晶碳层上形成抗反射涂层（ARC），其中ARC层具有在ARC层的厚度上变化的吸收系数。在ARC层上形成能量敏感的抗蚀剂材料。通过将能量敏感的抗蚀剂材料暴露于图案化的辐射，将图案的图像引入到能量敏感抗蚀剂材料层中。开发了引入能量敏感抗蚀剂材料层的图案的图像。

6. 发明授权

US07776516B2 Graded ARC for high NA and immersion lithography 有权
标题翻译：分级ARC用于高NA和浸没光刻
公开(公告)号：US07776516B2
公开(公告)日：2010-08-17
申请号：US11488528
申请日：2006-07-18
申请人： Wendy H. Yeh , Martin J. Seamons , Matthew Spuller , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Sudha Rathi
发明人： Wendy H. Yeh , Martin J. Seamons , Matthew Spuller , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Sudha Rathi
IPC分类号： G03F7/26
CPC分类号： G03F7/091 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.
摘要翻译：提供了使用渐变抗反射涂层形成装置的方法。在基板上形成一个或多个非晶碳层。在一个或多个非晶碳层上形成抗反射涂层（ARC），其中ARC层具有在ARC层的厚度上变化的吸收系数。在ARC层上形成能量敏感的抗蚀剂材料。通过将能量敏感的抗蚀剂材料暴露于图案化的辐射，将图案的图像引入到能量敏感抗蚀剂材料层中。开发了引入能量敏感抗蚀剂材料层的图案的图像。

7. 发明申请

US20080020319A1 Graded ARC for high na and immersion lithography 有权
标题翻译：分级ARC用于高na和浸没式光刻
公开(公告)号：US20080020319A1
公开(公告)日：2008-01-24
申请号：US11488528
申请日：2006-07-18
申请人： Wendy H. Yeh , Martin J. Seamons , Matthew Spuller , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Sudha Rathi
发明人： Wendy H. Yeh , Martin J. Seamons , Matthew Spuller , Sum-Yee Betty Tang , Kwangduk Douglas Lee , Sudha Rathi
IPC分类号： G03C1/00
CPC分类号： G03F7/091 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.
摘要翻译：提供了使用渐变抗反射涂层形成装置的方法。在基板上形成一个或多个非晶碳层。在一个或多个非晶碳层上形成抗反射涂层（ARC），其中ARC层具有在ARC层的厚度上变化的吸收系数。在ARC层上形成能量敏感的抗蚀剂材料。通过将能量敏感的抗蚀剂材料暴露于图案化的辐射，将图案的图像引入到能量敏感抗蚀剂材料层中。开发了引入能量敏感抗蚀剂材料层的图案的图像。

8. 发明授权

US06380096B2 In-situ integrated oxide etch process particularly useful for copper dual damascene 失效
标题翻译：原位一体化氧化物蚀刻工艺特别适用于铜双镶嵌
公开(公告)号：US06380096B2
公开(公告)日：2002-04-30
申请号：US09201590
申请日：1998-11-30
申请人： Hoiman Hung , Joseph P Caulfield , Sum-Yee Betty Tang , Jian Ding , Tianzong Xu
发明人： Hoiman Hung , Joseph P Caulfield , Sum-Yee Betty Tang , Jian Ding , Tianzong Xu
IPC分类号： H01L21302
CPC分类号： H01L21/02063 , H01L21/31116 , H01L21/76802 , H01L21/76808 , Y10S438/906 , Y10S438/954
摘要： An integrated in situ oxide etch process particularly useful for a counterbore dual-damascene structure over copper having in one inter-layer dielectric level a lower nitride stop layer, a lower oxide dielectric, a lower nitride stop layer, an upper oxide dielectric layer, and an anti-reflective coating (ARC). The process is divided into a counterbore etch and a trench etch with photolithography for each, and each step is preferably performed in a high-density plasma reactor having an inductively coupled plasma source primarily generating the plasma and a capacitively coupled pedestal supporting the wafer and producing the bias power. The counterbore etch preferably includes at least four substeps of opening the ARC, etching through the upper oxide and nitride layers, selectively etching the lower oxide layer but stopping on the lower nitride layer, and a post-etch treatment for removing residue. The trench etch preferably includes the five substeps of opening the ARC, etching through the upper oxide layer but stopping on the upper nitride layers, a first post-etch treatment for removing residue, a nitride removal of the exposed portions of the upper and lower nitride layers, and a second post-etch treatment for remaining further residues. The oxide etches selective to nitride are accomplished using a fluorocarbon chemistry with high bias and a high temperature for a silicon-based scavenger for fluorine placed next to the plasma. The nitride etches and removal are accomplished by adding an oxygen-containing gas to a fluorocarbon. The final nitride removal is accomplished with very low bias power to increase selectivity to nitride and reduce sputtering of the underlying copper. The post-etch treatments are oxygen plasmas with zero bias power.
摘要翻译：一种集成的原位氧化物蚀刻工艺，特别适用于铜上的沉孔双镶嵌结构，具有一层间电介质层，一层较低的氮化物阻挡层，一层较低的氧化物介电层，一层较低的氮化物阻挡层，抗反射涂层（ARC）。该工艺分别用光刻法分为沉孔蚀刻和沟槽蚀刻，并且每个步骤优选在具有主要产生等离子体的电感耦合等离子体源的高密度等离子体反应器和支撑晶片的电容耦合基座并且产生偏置力。沉孔蚀刻优选包括打开ARC的至少四个子步骤，蚀刻通过上部氧化物和氮化物层，选择性地蚀刻低氧化物层但停止在下部氮化物层上，以及用于去除残留物的蚀刻后处理。沟槽蚀刻优选包括打开ARC的五个子步骤，蚀刻穿过上部氧化物层但停止在上部氮化物层上，第一次蚀刻后处理以除去残余物，去除上部和下部氮化物的暴露部分的氮化物层，以及用于剩余另外的残余物的第二次蚀刻后处理。对氮化物的选择性的氧化物蚀刻是使用氟离子化学方法实现的，该化合物具有高偏压和高温，用于放置在等离子体旁边的用于氟的硅基清除剂。通过向碳氟化合物中加入含氧气体来实现氮化物蚀刻和去除。最终的氮化物去除通过非常低的偏置功率实现，以增加对氮化物的选择性并减少底层铜的溅射。蚀刻后处理是具有零偏压功率的氧等离子体。

9. 发明授权

US06762127B2 Etch process for dielectric materials comprising oxidized organo silane materials 失效
标题翻译：包括氧化有机硅烷材料的电介质材料的蚀刻工艺
公开(公告)号：US06762127B2
公开(公告)日：2004-07-13
申请号：US09938432
申请日：2001-08-23
申请人： Yves Pierre Boiteux , Hui Chen , Ivano Gregoratto , Chang-Lin Hsieh , Hoiman Hung , Sum-Yee Betty Tang
发明人： Yves Pierre Boiteux , Hui Chen , Ivano Gregoratto , Chang-Lin Hsieh , Hoiman Hung , Sum-Yee Betty Tang
IPC分类号： H01L21304
CPC分类号： H01L21/76808 , H01L21/02126 , H01L21/02164 , H01L21/022 , H01L21/02211 , H01L21/02274 , H01L21/31116 , H01L21/31633 , H01L21/76802 , H01L21/76807 , H01L2221/1036
摘要： The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH2F2/Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material (1004) deposited on a layer of silicon oxide (1002) were etched according to the novel technique, forming relatively narrow trenches (1010, 1012, 1014, 1016, 1030, 1032, 1034 and 1036) and wider trenches (1020, 1022, 1040 and 1042). The technique is also suitable for forming dual damascene structures (1152, 1154 and 1156). In additional embodiments, manufacturing systems (1410) are provided for fabricating IC structures of the present invention. These systems include a controller (1400) that is adapted for interacting with a plurality of fabricating stations (1420, 1422, 1424, 1426 and 1428).
摘要翻译：本发明提供一种用于蚀刻C掺杂氧化硅层的新颖蚀刻技术，例如部分氧化的有机硅烷材料。这种在低偏压和低至中压下使用CH2F2 / Ar化学的技术为氧化硅提供了高蚀刻选择性，并提高了对有机光致抗蚀剂的选择性。根据新技术蚀刻包括沉积在氧化硅层（1002）上的部分氧化的有机硅烷材料层（1004）的结构，形成相对窄的沟槽（1010,1012,1014,1016,1030,1032,1034和 1036）和较宽的沟槽（1020,1022,1040和1042）。该技术也适用于形成双镶嵌结构（1152,1154和1156）。在另外的实施例中，提供制造系统（1410）用于制造本发明的IC结构。这些系统包括适于与多个制造站（1420,1422,1424,1426和1428）相互作用的控制器（1400）。

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