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1. 发明授权

US07372383B2 Method for calibrating a digital/analog converter and digital/analog converter 有权
标题翻译：校准数字/模拟转换器和数/模转换器的方法
公开(公告)号：US07372383B2
公开(公告)日：2008-05-13
申请号：US11403470
申请日：2006-04-13
申请人： Martin Clara , Antonio Di Giandomenico , Wolfgang Klatzer , Luca Gori
发明人： Martin Clara , Antonio Di Giandomenico , Wolfgang Klatzer , Luca Gori
IPC分类号： H03M3/00
CPC分类号： H03M1/0614 , H03M1/1057 , H03M1/74
摘要： A digital/analog converter comprises a converter array comprised of a plurality of converter cells and a device for self-calibration of the converter cells. The device for self-calibration comprises at least one reference cell with a reference value and a control device for controlling a calibration process. The control device calibrates successively, within a respective calibration period, respective of the converter cells to values corresponding to the reference value and adjusts respective calibration periods for a calibration cycle, within which the converter cells are to be calibrated. At least two different of the respective calibration periods differ within at least two calibration cycles.
摘要翻译：数字/模拟转换器包括由多个转换器单元组成的转换器阵列和用于转换器单元的自校准的装置。用于自校准的装置包括具有参考值的至少一个参考单元和用于控制校准过程的控制装置。控制装置在相应的校准周期内将转换器单元的各个相应地校准到对应于参考值的值，并且调整校准周期的相应校准周期，在校准周期内，转换器单元将被校准。至少两个校准周期中至少两个不同的校准周期在至少两个校准周期内不同。

2. 发明授权

US07688236B2 Integrated circuit comprising a plurality of digital-to-analog converters, sigma-delta modulator circuit, and method of calibrating a plurality of multibit digital-to-analog converters 有权
标题翻译：包括多个数模转换器，Σ-Δ调制器电路以及校准多个数模转换器的方法的集成电路
公开(公告)号：US07688236B2
公开(公告)日：2010-03-30
申请号：US11865539
申请日：2007-10-01
申请人： Antonio Di Giandomenico , Martin Clara , David San Segundo Bello , Wolfgang Klatzer , Luca Gori , Andreas Wiesbauer
发明人： Antonio Di Giandomenico , Martin Clara , David San Segundo Bello , Wolfgang Klatzer , Luca Gori , Andreas Wiesbauer
IPC分类号： H03M1/10
CPC分类号： H03M1/1033 , H03M1/742 , H03M3/386 , H03M3/424 , H03M3/454
摘要： In an integrated circuit including a first multibit digital-to-analog converter and a second multibit digital-to-analog converter, a calibration circuit is provided which is shared between the first and second digital-to-analog converters.
摘要翻译：在包括第一多位数模转换器和第二多位数模转换器的集成电路中，提供了在第一和第二数模转换器之间共享的校准电路。

3. 发明申请

US20090085784A1 Integrated Circuit Comprising a Plurality of Digital-to-Analog Converters, Sigma-Delta Modulator Circuit, and Method of Calibrating a Plurality of Multibit Digital-to-Analog Converters 有权
标题翻译：包含多个数模转换器的集成电路，Σ-Δ调制器电路和校准多个数字 - 模拟转换器的方法
公开(公告)号：US20090085784A1
公开(公告)日：2009-04-02
申请号：US11865539
申请日：2007-10-01
申请人： Antonio Di Giandomenico , Martin Clara , David San Segundo Bello , Wolfgang Klatzer , Luca Gori , Andreas Wiesbauer
发明人： Antonio Di Giandomenico , Martin Clara , David San Segundo Bello , Wolfgang Klatzer , Luca Gori , Andreas Wiesbauer
IPC分类号： H03M1/66 , H03M3/04
CPC分类号： H03M1/1033 , H03M1/742 , H03M3/386 , H03M3/424 , H03M3/454
摘要： In an integrated circuit including a first multibit digital-to-analog converter and a second multibit digital-to-analog converter, a calibration circuit is provided which is shared between the first and second digital-to-analog converters.
摘要翻译：在包括第一多位数模转换器和第二多位数模转换器的集成电路中，提供了在第一和第二数模转换器之间共享的校准电路。

4. 发明申请

US20060232455A1 Method for calibrating a digital/analog converter and digital/analog converter 有权
标题翻译：校准数字/模拟转换器和数/模转换器的方法
公开(公告)号：US20060232455A1
公开(公告)日：2006-10-19
申请号：US11403470
申请日：2006-04-13
申请人： Martin Clara , Antonio Di Giandomenico , Wolfgang Klatzer , Luca Gori
发明人： Martin Clara , Antonio Di Giandomenico , Wolfgang Klatzer , Luca Gori
IPC分类号： H03M1/10
CPC分类号： H03M1/0614 , H03M1/1057 , H03M1/74
摘要： A digital/analog converter comprises a converter array comprised of a plurality of converter cells and a device for self-calibration of the converter cells. The device for self-calibration comprises at least one reference cell with a reference value and a control device for controlling a calibration process. The control device calibrates successively, within a respective calibration period, respective of the converter cells to values corresponding to the reference value and adjusts respective calibration periods for a calibration cycle, within which the converter cells are to be calibrated. At least two different of the respective calibration periods differ within at least two calibration cycles.
摘要翻译：数字/模拟转换器包括由多个转换器单元组成的转换器阵列和用于转换器单元的自校准的装置。用于自校准的装置包括具有参考值的至少一个参考单元和用于控制校准过程的控制装置。控制装置在相应的校准周期内将转换器单元的各个相应地校准到对应于参考值的值，并且调整校准周期的相应校准周期，在校准周期内，转换器单元将被校准。至少两个校准周期中至少两个不同的校准周期在至少两个校准周期内不同。

5. 发明授权

US07486214B1 Tuning methods for loop-filters of continuous-time sigma-delta modulators 有权
标题翻译：连续时间Σ-Δ调制器的环路滤波器的调谐方法
公开(公告)号：US07486214B1
公开(公告)日：2009-02-03
申请号：US11850000
申请日：2007-09-04
申请人： Antonio Di Giandomenico , David San Segundo Bello , Andreas Wiesbauer , Fabio Ballarin , Martin Clara
发明人： Antonio Di Giandomenico , David San Segundo Bello , Andreas Wiesbauer , Fabio Ballarin , Martin Clara
IPC分类号： H03M3/00
CPC分类号： H03M3/386 , H03M3/458
摘要： Techniques for tuning filters of modulation circuits are described herein.
摘要翻译：本文描述了用于调谐电路的调谐滤波器的技术。

6. 发明授权

US07327193B2 Method for setting an amplifier, and corresponding amplifier circuit 有权
标题翻译：放大器设置方法及相应的放大电路
公开(公告)号：US07327193B2
公开(公告)日：2008-02-05
申请号：US11230284
申请日：2005-09-19
申请人： Martin Clara , Antonio Di Giandomenico , Klaus Kolhaupt , Andreas Weiebauer
发明人： Martin Clara , Antonio Di Giandomenico , Klaus Kolhaupt , Andreas Weiebauer
IPC分类号： H03F3/45
CPC分类号： H03F1/34 , H03F3/45085 , H03F3/45475 , H03F3/45659 , H03F2203/45726
摘要： An amplifier and method of setting the amplifier is presented. The amplifier is set by setting a mean value between voltage values at first and second outputs of the amplifier. The mean value is pulled towards a certain voltage potential. A circuit node is coupled to the first and to the second output. The circuit node is connected, via at least one resistor and a respective switch, to the certain voltage potential assigned to the respective resistor.
摘要翻译：提出了放大器和放大器设置方法。通过设置放大器的第一和第二输出端的电压值之间的平均值来设置放大器。平均值被拉向某一电压电位。电路节点耦合到第一和第二输出端。电路节点经由至少一个电阻器和相应的开关连接到分配给相应电阻器的一定电压电位。

7. 发明授权

US07576670B2 Sigma-delta analog-digital converter for an xDSL multistandard input stage 失效
标题翻译：用于xDSL多标准输入级的Sigma-delta模数转换器
公开(公告)号：US07576670B2
公开(公告)日：2009-08-18
申请号：US11661627
申请日：2004-09-02
申请人： Martin Clara , Antonio Di Giandomenico , Joerg Hauptmann , Andreas Wiesbauer
发明人： Martin Clara , Antonio Di Giandomenico , Joerg Hauptmann , Andreas Wiesbauer
IPC分类号： H03M3/00
CPC分类号： H03M3/394 , H03M3/406 , H03M3/424 , H03M3/452
摘要： The invention relates to a sigma-delta analogue/digital converter for an xDSL multi-standard input stage for converting an xDSL signal into a digital output signal, where the sigma-delta analogue/digital converter (1) has: an analogue loop filter (6) which filters an analogue difference signal between the xDSL signal to be converted and a feedback signal in order to produce a filter output signal; a quantizer which quantizes the filter output signal from the analogue loop filter (6) in order to produce the digital output signal; a first digital/analogue converter (16) which converts the digital output signal into the analogue feedback signal; where the analogue loop filter (6) has at least two resonator filter stages (6a, 6b) which respectively comprise a first integrator (6a-1; 6b-1) and a second integrator (6a-2; 6b-2) connected in series therewith, where the second integrator (6a-2; 6b-2) can be connected to the first integrator (6a-1, 6b-1) by means of a controllable feedback switch (6a-3, 6b-3) in order to close a local feedback loop, where the integrator outputs can respectively be connected by means of a controllable switch (25) to a signal input of an adder (27) which adds the output signals from the integrators in order to produce the filter output signal.
摘要翻译：本发明涉及一种用于xDSL多标准输入级的Σ-Δ模拟/数字转换器，用于将xDSL信号转换成数字输出信号，其中Σ-Δ模拟/数字转换器（1）具有：模拟环路滤波器 6），其对要转换的xDSL信号和反馈信号之间的模拟差分信号进行滤波，以产生滤波器输出信号; 量化器，其量化来自模拟环路滤波器（6）的滤波器输出信号，以产生数字输出信号; 第一数字/模拟转换器（16），其将数字输出信号转换成模拟反馈信号; 其中模拟环路滤波器（6）具有至少两个分别包括第一积分器（6a-1; 6b-1）和第二积分器（6a-2; 6b-2）的谐振器滤波器级（6a，6b）其中第二积分器（6a-2; 6b-2）可以通过可控反馈开关（6a-3,6b-3）按顺序连接到第一积分器（6a-1,6b-1）以闭合局部反馈回路，其中积分器输出可以分别通过可控开关（25）连接到加法器（27）的信号输入端，加法器（27）的信号输入相加来自积分器的输出信号，以产生滤波器输出信号。

8. 发明授权

US07928800B2 Programmable compensation network for operational amplifiers 有权
标题翻译：运算放大器的可编程补偿网络
公开(公告)号：US07928800B2
公开(公告)日：2011-04-19
申请号：US12327739
申请日：2008-12-03
申请人： Fabio Ballarin , Alfonso D'Andretta , Martin Clara , Antonio Di Giandomenico , Dario Giotta , Andreas Wiesbauer
发明人： Fabio Ballarin , Alfonso D'Andretta , Martin Clara , Antonio Di Giandomenico , Dario Giotta , Andreas Wiesbauer
IPC分类号： H03F1/36
CPC分类号： H03F3/45475 , H03F3/45183 , H03F2203/45528
摘要： Systems and methods for implementing a programmable network for a multimode conditionally stable operational amplifier are disclosed.
摘要翻译：公开了用于实现用于多模有条件稳定的运算放大器的可编程网络的系统和方法。

9. 发明授权

US07796072B2 Multiple mode sigma-delta modulator 有权
标题翻译：多模式Σ-Δ调制器
公开(公告)号：US07796072B2
公开(公告)日：2010-09-14
申请号：US12255038
申请日：2008-10-21
申请人： Antonio Di Giandomenico , David San Segundo Bello , Andreas Wiesbauer , Fabio Ballarin , Martin Clara
发明人： Antonio Di Giandomenico , David San Segundo Bello , Andreas Wiesbauer , Fabio Ballarin , Martin Clara
IPC分类号： H03M3/00
CPC分类号： H03M3/386 , H03M3/458
摘要： Modulation circuits for operating in at least a first and second mode are described herein.
摘要翻译：至少在第一和第二模式下操作的调制电路在此描述。

10. 发明申请

US20080297385A1 Sigma-Delta Analog-Digital Converter For An Xdsl Multistandard Input Stage 失效
标题翻译：用于Xdsl多标准输入级的Sigma-Delta模拟数字转换器
公开(公告)号：US20080297385A1
公开(公告)日：2008-12-04
申请号：US11661627
申请日：2004-09-02
申请人： Martin Clara , Antonio Di Giandomenico , Joerg Hauptmann , Andreas Wiesbauer
发明人： Martin Clara , Antonio Di Giandomenico , Joerg Hauptmann , Andreas Wiesbauer
IPC分类号： H03M3/04
CPC分类号： H03M3/394 , H03M3/406 , H03M3/424 , H03M3/452
摘要： The invention relates to a sigma-delta analogue/digital converter for an xDSL multi-standard input stage for converting an xDSL signal into a digital output signal, where the sigma-delta analogue/digital converter (1) has: an analogue loop filter (6) which filters an analogue difference signal between the xDSL signal to be converted and a feedback signal in order to produce a filter output signal; a quantizer which quantizes the filter output signal from the analogue loop filter (6) in order to produce the digital output signal; a first digital/analogue converter (16) which converts the digital output signal into the analogue feedback signal; where the analogue loop filter (6) has at least two resonator filter stages (6a, 6b) which respectively comprise a first integrator (6a-1; 6b-1) and a second integrator (6a-2; 6b-2) connected in series therewith, where the second integrator (6a-2; 6b-2) can be connected to the first integrator (6a-1, 6b-1) by means of a controllable feedback switch (6a-3, 6b-3) in order to close a local feedback loop, where the integrator outputs can respectively be connected by means of a controllable switch (25) to a signal input of an adder (27) which adds the output signals from the integrators in order to produce the filter output signal.
摘要翻译：本发明涉及一种用于xDSL多标准输入级的Σ-Δ模拟/数字转换器，用于将xDSL信号转换成数字输出信号，其中Σ-Δ模拟/数字转换器（1）具有：模拟环路滤波器 6），其对要转换的xDSL信号和反馈信号之间的模拟差分信号进行滤波，以产生滤波器输出信号; 量化器，其量化来自模拟环路滤波器（6）的滤波器输出信号，以产生数字输出信号; 第一数字/模拟转换器（16），其将数字输出信号转换成模拟反馈信号; 其中模拟环路滤波器（6）具有至少两个分别包括第一积分器（6a-1; 6b-1）和第二积分器（6a-2; 6b-2）的谐振器滤波器级（6a，6b）其中第二积分器（6a-2; 6b-2）可以通过可控反馈开关（6a-3,6b-3）按顺序连接到第一积分器（6a-1,6b-1）以闭合局部反馈回路，其中积分器输出可以分别通过可控开关（25）连接到加法器（27）的信号输入端，加法器（27）的信号输入相加来自积分器的输出信号，以产生滤波器输出信号。

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