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1. 发明授权

US08378736B2 Low noise charge pump method and apparatus 有权
公开(公告)号：US08378736B2
公开(公告)日：2013-02-19
申请号：US12799583
申请日：2010-04-27
申请人： Mark L. Burgener , Dylan J. Kelly , James S. Cable
发明人： Mark L. Burgener , Dylan J. Kelly , James S. Cable
IPC分类号： H02M3/18 , G05F3/16 , H03B5/00
CPC分类号： H03K3/013 , H02M3/07 , H02M3/073 , H03K3/0315
摘要： A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.

2. 发明授权

US07613442B1 Switch circuit and method of switching radio frequency signals 有权
标题翻译：开关电路及射频信号切换方法
公开(公告)号：US07613442B1
公开(公告)日：2009-11-03
申请号：US11127520
申请日：2005-05-11
申请人： Dylan J. Kelly , Mark L. Burgener , James S. Cable
发明人： Dylan J. Kelly , Mark L. Burgener , James S. Cable
IPC分类号： H04B1/28 , H01L29/76 , H04Q7/20 , H04M1/00
CPC分类号： H03K17/063 , H03K17/693
摘要： A novel RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. Several embodiments of the charge pump, level shifting, voltage divider, and RF buffer circuits are described. The RF switch provides improvements in insertion loss, switch isolation, and switch compression. An improved voltage reducing circuit is described. The improved voltage reducing circuit limits voltages applied to selected nodes within the integrated circuit.
摘要翻译：描述了用于切换RF信号的新型RF开关电路和方法。 RF开关电路采用绝缘体上硅（SOI）技术制造。 RF开关包括用于交替地将RF输入信号耦合到公共RF节点的成对的开关和分流晶体管组。描述了完全集成的RF开关，其包括与RF开关元件集成在一起的数字控制逻辑和负电压发生器。在一个实施例中，完全集成的RF开关包括内置振荡器，电荷泵电路，CMOS逻辑电路，电平转换和分压器电路以及RF缓冲电路。描述了电荷泵，电平转换，分压器和RF缓冲电路的几个实施例。 RF开关提供插入损耗，开关隔离和开关压缩的改进。描述了改进的电压降低电路。改进的电压降低电路限制施加到集成电路内的选定节点的电压。

3. 发明申请

US20120169398A1 Method and Apparatus for Use in Improving Linearity of MOSFETs Using an Accumulated Charge Sink 有权
标题翻译：使用累积电荷槽改善MOSFET的线性度的方法和装置
公开(公告)号：US20120169398A1
公开(公告)日：2012-07-05
申请号：US13412529
申请日：2012-03-05
申请人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
发明人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
IPC分类号： H03K17/687
CPC分类号： H03K17/162 , H01L29/0649 , H01L29/1095 , H01L29/78609 , H01L29/78615 , H01L29/78681 , H01L29/78684 , H03K17/687 , H03K2217/0018
摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOT MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
摘要翻译：公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷吸收器消除，去除或以其他方式控制累积电荷，从而降低寄生偏离态源极至漏极间电容的非线性的SOT MOSFET。在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

4. 发明授权

US08129787B2 Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink 有权
标题翻译：用于提高使用累积电荷宿的MOSFET的线性度的方法和装置
公开(公告)号：US08129787B2
公开(公告)日：2012-03-06
申请号：US13053211
申请日：2011-03-22
申请人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
发明人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
IPC分类号： H01L27/12
CPC分类号： H03K17/162 , H01L29/0649 , H01L29/1095 , H01L29/78609 , H01L29/78615 , H01L29/78681 , H01L29/78684 , H03K17/687 , H03K2217/0018
摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
摘要翻译：公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷宿消除，去除或以其他方式控制累积电荷，从而降低寄生偏离态源极至漏极间电容的非线性的SOI MOSFET。在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

5. 发明申请

US20110169550A1 Method and Apparatus for Use in Improving Linearity of MOSFETs Using an Accumulated Charge Sink 有权
标题翻译：使用累积电荷槽改善MOSFET的线性度的方法和装置
公开(公告)号：US20110169550A1
公开(公告)日：2011-07-14
申请号：US13053211
申请日：2011-03-22
申请人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
发明人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
IPC分类号： H03K17/687 , H01L29/78 , H03K3/01
CPC分类号： H03K17/162 , H01L29/0649 , H01L29/1095 , H01L29/78609 , H01L29/78615 , H01L29/78681 , H01L29/78684 , H03K17/687 , H03K2217/0018
摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
摘要翻译：公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷吸收器消除，去除或以其他方式控制累积电荷，从而降低寄生偏离态源极至漏极间电容的非线性的SOI MOSFET。在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

6. 发明授权

US07910993B2 Method and apparatus for use in improving linearity of MOSFET's using an accumulated charge sink 有权
标题翻译：用于提高使用累积电荷接收器的MOSFET的线性度的方法和装置
公开(公告)号：US07910993B2
公开(公告)日：2011-03-22
申请号：US11484370
申请日：2006-07-10
申请人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
发明人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
IPC分类号： H01L27/12
CPC分类号： H03K17/162 , H01L29/0649 , H01L29/1095 , H01L29/78609 , H01L29/78615 , H01L29/78681 , H01L29/78684 , H03K17/687 , H03K2217/0018
摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
摘要翻译：公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷宿消除，去除或以其他方式控制累积电荷，从而降低寄生偏置电源 - 漏极电容的非线性的SOI MOSFET。在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

7. 发明授权

US07796969B2 Symmetrically and asymmetrically stacked transistor group RF switch 有权
标题翻译：对称和非对称堆叠的晶体管组RF开关
公开(公告)号：US07796969B2
公开(公告)日：2010-09-14
申请号：US11347014
申请日：2006-02-03
申请人： Dylan J. Kelly , Mark L. Burgener
发明人： Dylan J. Kelly , Mark L. Burgener
IPC分类号： H04B1/24 , H01L29/76 , H04Q7/20 , H04M1/00
CPC分类号： H03K17/6871 , H02M3/073 , H03K17/063 , H03K17/693
摘要： A silicon-on-insulator (SOI) RF switch adapted for improved power handling capability using a reduced number of transistors is described. In one embodiment, an RF switch includes pairs of switching and shunting stacked transistor groupings to selectively couple RF signals between a plurality of input/output nodes and a common RF node. The switching and shunting stacked transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. In one embodiment, the transistor groupings are “symmetrically” stacked in the RF switch (i.e., the transistor groupings all comprise an identical number of transistors). In another embodiment, the transistor groupings are “asymmetrically” stacked in the RF switch (i.e., at least one transistor grouping comprises a number of transistors that is unequal to the number of transistors comprising at least one other transistor grouping). The stacked configuration of the transistor groupings enable the RF switch to withstand RF signals of varying and increased power levels. The asymmetrically stacked transistor grouping RF switch facilitates area-efficient implementation of the RF switch in an integrated circuit. Maximum input and output signal power levels can be withstood using a reduced number of stacked transistors.
摘要翻译：描述了适用于使用减少数量的晶体管来改善功率处理能力的绝缘体上硅（SOI）RF开关。在一个实施例中，RF开关包括成对的开关和分流堆叠晶体管组，以选择性地耦合多个输入/输出节点与公共RF节点之间的RF信号。开关和分流堆叠晶体管组包括以“堆叠”或串联配置连接在一起的一个或多个MOSFET晶体管。在一个实施例中，晶体管组在RF开关中被“对称地”堆叠（即，晶体管组都包括相同数量的晶体管）。在另一个实施例中，晶体管组在RF开关中被“不对称地”堆叠（即，至少一个晶体管组包括不等于包含至少一个其它晶体管组的晶体管数量的多个晶体管）。晶体管组的堆叠配置使得RF开关能够承受变化和增加的功率水平的RF信号。不对称堆叠的晶体管分组RF开关有助于集成电路中的RF开关的区域有效的实现。使用减少数量的堆叠晶体管可以承受最大的输入和输出信号功率电平。

8. 发明申请

US20110227637A1 Method and Apparatus Improving Gate Oxide Reliability by Controlling Accumulated Charge 有权
标题翻译：方法和装置通过控制累积电荷来提高栅氧化物的可靠性
公开(公告)号：US20110227637A1
公开(公告)日：2011-09-22
申请号：US13028144
申请日：2011-02-15
申请人： Michael A. Stuber , Christopher N. Brindle , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Mark L. Burgener , Alexander Dribinsky , Tae Youn Kim
发明人： Michael A. Stuber , Christopher N. Brindle , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Mark L. Burgener , Alexander Dribinsky , Tae Youn Kim
IPC分类号： G05F1/10 , H01L29/772
CPC分类号： H01L29/78615 , H01L27/1203 , H01L29/4908 , H01L29/78651 , H01L29/78654 , H01L29/78657 , H03K17/162
摘要： A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.
摘要翻译：公开了一种用于使用累积电荷控制（ACC）技术来改善绝缘体上半导体（SOI）金属氧化物 - 硅场效应晶体管（MOSFET）器件的栅极氧化可靠性的方法和装置。该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。在一个实施例中，电路包括以累积电荷状态运行的MOSFET，以及用于控制可操作地耦合到SOI MOSFET的累积电荷的装置。首先确定不受控制的累积电荷对SOI MOSFET的栅极氧化物的时间依赖介电击穿（TDDB）的影响。第二次确定SOI MOSFET的栅极氧化物的受控累积电荷对TDDB的影响。 SOI MOSFET适于具有响应于第一和第二确定的选择的平均时间分辨率，并且使用用于可操作地耦合到SOI MOSFET的累积电荷控制的技术来操作电路。在一个实施例中，累积的电荷控制技术包括使用可操作地耦合到SOI MOSFET体的累积电荷宿。

9. 发明授权

US07890891B2 Method and apparatus improving gate oxide reliability by controlling accumulated charge 有权
标题翻译：通过控制累积电荷提高栅极氧化可靠性的方法和装置
公开(公告)号：US07890891B2
公开(公告)日：2011-02-15
申请号：US11520912
申请日：2006-09-14
申请人： Michael A. Stuber , Christopher N. Brindle , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener , Alexander Dribinsky , Tae Youn Kim
发明人： Michael A. Stuber , Christopher N. Brindle , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener , Alexander Dribinsky , Tae Youn Kim
IPC分类号： G06F17/50
CPC分类号： H01L29/78615 , H01L27/1203 , H01L29/4908 , H01L29/78651 , H01L29/78654 , H01L29/78657 , H03K17/162
摘要： A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.
摘要翻译：公开了一种用于使用累积电荷控制（ACC）技术来改善绝缘体上半导体（SOI）金属氧化物 - 硅场效应晶体管（MOSFET）器件的栅极氧化可靠性的方法和装置。该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。在一个实施例中，电路包括以累积电荷状态运行的MOSFET，以及用于控制可操作地耦合到SOI MOSFET的累积电荷的装置。首先确定不受控制的累积电荷对SOI MOSFET的栅极氧化物的时间依赖介电击穿（TDDB）的影响。第二次确定SOI MOSFET的栅极氧化物的受控累积电荷对TDDB的影响。 SOI MOSFET适于具有响应于第一和第二确定的选择的平均时间分辨率，并且使用用于可操作地耦合到SOI MOSFET的累积电荷控制的技术来操作电路。在一个实施例中，累积的电荷控制技术包括使用可操作地耦合到SOI MOSFET体的累积电荷宿。

10. 发明授权

US08405147B2 Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink 有权
标题翻译：用于提高使用累积电荷宿的MOSFET的线性度的方法和装置
公开(公告)号：US08405147B2
公开(公告)日：2013-03-26
申请号：US13412529
申请日：2012-03-05
申请人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
发明人： Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
IPC分类号： H04B1/28 , H01L29/76 , H01L7/20 , H04M1/00
CPC分类号： H03K17/162 , H01L29/0649 , H01L29/1095 , H01L29/78609 , H01L29/78615 , H01L29/78681 , H01L29/78684 , H03K17/687 , H03K2217/0018
摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOT MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
摘要翻译：公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷宿消除，去除或以其他方式控制累积电荷，从而降低寄生偏离态源极至漏极间电容的非线性的SOT MOSFET。在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

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