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    • 2. 发明授权
    • Semiconductor device with current confinement structure
    • 具有电流限制结构的半导体器件
    • US06509580B2
    • 2003-01-21
    • US09858677
    • 2001-05-16
    • Paul Marshall Charles
    • Paul Marshall Charles
    • H01L31072
    • H01L33/145B82Y20/00H01S5/12H01S5/2226H01S5/2275H01S5/3434
    • The present invention relates to a semiconductor device with one or more current confinement regions and to a method of manufacturing such a device, particularly buried heterostructure light emitting devices such as semiconductor lasers and light emitting diodes. The device comprises an active layer, a current conduction region, one or more current confinement regions adjacent the current conduction region. The current conduction region and current confinement region are arranged to channel an applied electric current to the active layer. The or each current confinement region includes both a metal-doped current blocking structure and a p-n junction current blocking structure. The p-n current blocking structure is between the current conduction region and the metal-doped current blocking structure.
    • 本发明涉及具有一个或多个电流限制区域的半导体器件以及制造这种器件的方法,特别是掩埋的异质结构发光器件如半导体激光器和发光二极管。 器件包括有源层,电流传导区域,与电流传导区域相邻的一个或多个电流限制区域。 电流传导区域和电流限制区域被布置成将施加的电流传送到有源层。 该或每个电流限制区域包括金属掺杂电流阻挡结构和p-n结电流阻挡结构。 p-n电流阻挡结构在电流传导区域和金属掺杂电流阻挡结构之间。
    • 5. 发明授权
    • Semiconductor device cleave initiation
    • 半导体器件切割引发
    • US06335559B1
    • 2002-01-01
    • US09349253
    • 1999-07-08
    • Paul Marshall Charles
    • Paul Marshall Charles
    • H01L2348
    • H01L31/18H01L21/78H01L33/005H01L2924/0002H01S5/0202H01L2924/00
    • The present invention relates to a method of etching a semiconductor wafer (100), particularly of a compound semiconductor, in order to facilitate cleaving of devices (200) from the wafer (100) , and to devices (200) cleaved by such a method. A semiconductor device (200) is cleaved from a wafer (100) and comprises a substrate (106) and grown upon the substrate (106) one or more layers (108, 110, 112, 116, 122) , the cleaves (150, 151, 153, 154) thereby defining two pairs of parallel edges (201, 202; 203; 204) of the device (200). Each of the cleaves is guided by a groove (163, 164; 166, 266) etched through the grown layers (108, 110, 112, 116, 122) and partly into the substrate (106).
    • 本发明涉及一种蚀刻半导体晶片(100),特别是化合物半导体的方法,以便于从晶片(100)切割器件(200),以及通过这种方法切割的器件(200) 。 半导体器件(200)从晶片(100)切割并且包括衬底(106)并且在衬底(106)上生长一个或多个层(108,110,112,116,122),所述劈裂(150, 从而限定设备(200)的两对平行边缘(201,202; 203; 204)。 每个裂缝由通过生长层(108,110,112,116,122)蚀刻的凹槽(163,164,166,266)引导,并且部分地被蚀刻到衬底(106)中。
    • 6. 发明授权
    • Fabrication of semiconductor devices
    • 半导体器件的制造
    • US06289030B1
    • 2001-09-11
    • US09015010
    • 1998-01-28
    • Paul Marshall Charles
    • Paul Marshall Charles
    • G01S528
    • H01L31/02161H01S5/0203H01S5/028H01S5/0281H01S5/0282H01S5/0425
    • A method of fabricating a semiconductor optical device is provided comprising the steps of depositing planar layers of semiconductor material to form a semiconductor wafer having an optically active region, etching through the optically active region to form a plurality of facets, and simultaneously coating at least one facet and an upper surface of the semiconductor wafer with a coating layer having a thickness and composition such that, during operation of the semiconductor device, the coating layer acts both as a facet coating and as a wafer surface coating. Where the coating layer comprises a dielectric, the layer acts both as an anti-reflection facet coating and as a passivating layer. Where the coating layer comprises a metal, the layer acts both as a high-reflectivity facet coating and as an electrical contacting layer. In a first embodiment the semiconductor device comprises a laser and in a second embodiment comprises a photodetector.
    • 提供一种制造半导体光学器件的方法,包括以下步骤:沉积半导体材料的平面层以形成具有光学活性区域的半导体晶片,通过光学活性区域蚀刻以形成多个刻面,同时涂覆至少一个 小面和半导体晶片的上表面,其具有具有厚度和组成的涂层,使得在半导体器件的操作期间,涂层既作为小面涂层又用作晶片表面涂层。 当涂层包含电介质时,该层既作为抗反射面涂层又用作钝化层。 当涂层包含金属时,该层既作为高反射性面涂层又作为电接触层。 在第一实施例中,半导体器件包括激光器,并且在第二实施例中包括光电检测器。