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1. 发明授权

US06998834B2 Real-time time drift adjustment for a TDR step stimulus 失效
标题翻译： TDR步进刺激的实时时间漂移调整
公开(公告)号：US06998834B2
公开(公告)日：2006-02-14
申请号：US10852924
申请日：2004-05-24
申请人： Maria Agoston , Kenneth J. Lester
发明人： Maria Agoston , Kenneth J. Lester
IPC分类号： G01R13/14 , G01R35/00 , G01R13/00
CPC分类号： G01R27/04 , G01R31/2841
摘要： A method for reducing drift in a step stimulus from a sampling system, such as an oscilloscope, is described having an initial step of setting a calibration repetition rate. A step stimulus stabilization calibration is performed to acquire a reference mid-crossing time and the current mid-crossing time. Acquisition cycles of TDR/TDT waveform samples are acquired equal to the repetition rate with the initial strobe delay interval in the sampling system being adjusted by the difference between the reference mid-crossing time and the current mid-crossing time. The step stimulus stabilization calibration is performed again to acquire a new current mid-crossing time and initial strobe delay interval and more acquisition cycles of TDR waveform samples are acquired equal to the repetition rate. The process continues until a stop command is activated for the sampling system.
摘要翻译：描述了一种用于减少来自采样系统（例如示波器）的步进激励中的漂移的方法，其具有设置校准重复率的初始步骤。执行阶跃刺激稳定校准以获取参考中交时间和当前中交时间。获取TDR / TDT波形样本的采集周期等于重复率，采样系统中的初始选通延迟间隔由参考中跨时间与当前中交时间之间的差值进行调整。再次执行阶跃刺激稳定校准以获取新的当前中交时间和初始选通延迟间隔，并获取等于重复率的TDR波形样本的更多采集周期。该过程一直持续到采样系统的停止命令被激活为止。

2. 发明授权

US06522983B1 Timebase calibration method for an equivalent time sampling digitizing instrument 有权
标题翻译：时基采样数字化仪的时基校准方法
公开(公告)号：US06522983B1
公开(公告)日：2003-02-18
申请号：US09799742
申请日：2001-03-05
申请人： Laszlo Dobos , Kenneth J. Lester
发明人： Laszlo Dobos , Kenneth J. Lester
IPC分类号： G01D1800
CPC分类号： G01R13/02 , G01R13/345 , G01R35/002 , H03M1/1255
摘要： A method of calibrating a timebase in a digitizing instrument estimates the frequency of the clock signal from the clock generator that clocks a coarse delay counter in a strobe generator. The dynamic range of the interpolator in the strobe generator is defined in digital-to-analog converter code values as a function of the clock signal period. A linear horizontal look-up table of equally spaced digital-to-analog converter code values is generated over the defined dynamic range of the interpolator. Residual nonlinearities of the interpolator over the defined dynamic range of the interpolator are characterized and scaled to digital-to-analog converter code values. The digital-to-analog converter code values of the characterized residual anomalies are combined with the digital-to-analog converter code values of the linear horizontal look-up table to generate a horizontal look-up table having DAC code value compensating for the nonlinearities of the interpolator.
摘要翻译：在数字化仪器中校准时基的方法估计来自在选通发生器中对粗略延迟计数器进行计时的时钟发生器的时钟信号的频率。选通发生器中的内插器的动态范围是以数字到模拟转换器代码值作为时钟信号周期的函数来定义的。在内插器的定义的动态范围上生成等间隔数字 - 模拟转换器代码值的线性水平查找表。在内插器的限定的动态范围上的内插器的残余非线性被表征并且被缩放到数模转换器代码值。表征的残余异常的数模转换器代码值与线性水平查找表的数模转换器代码值组合，以产生具有补偿非线性的DAC代码值的水平查找表的内插器。

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