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1. 发明授权

US08433532B2 Digital oscilloscope module 有权
标题翻译：数字示波器模块
公开(公告)号：US08433532B2
公开(公告)日：2013-04-30
申请号：US12548162
申请日：2009-08-26
申请人： Marco LeBrun
发明人： Marco LeBrun
IPC分类号： G01R13/02 , G06F19/00
CPC分类号： G01R13/0218 , H04L12/403
摘要： The present invention provides a digital data acquisition module, such as a digital oscilloscope, that includes a synchronous random access memory (RAM), a digital signal processing unit, and a master control unit. The digital signal processing unit is coupled to the synchronous RAM and includes at least one analog-to-digital (A/D) converter that digitizes an analog signal, and a digital signal processor that includes a dual-port RAM, a plurality of processing blocks and a communications interface. The plurality of processing blocks process the digitized analog signal data, store the processed signal data in the synchronous RAM, create display data from the stored signal data, store the display data in the dual-port RAM. The master control unit is coupled to the digital signal processing unit and includes an internal communications interface coupled to the digital signal processor communications interface, an external communications interface and a central processing unit that receives the display data over the internal communications interface and transmits the display data over the external communications interface.
摘要翻译：本发明提供了一种包括同步随机存取存储器（RAM），数字信号处理单元和主控制单元的诸如数字示波器的数字数据采集模块。数字信号处理单元耦合到同步RAM并且包括至少一个对模拟信号进行数字化的模数（A / D）转换器和包括双端口RAM的数字信号处理器，多个处理块和通信接口。多个处理块处理数字化的模拟信号数据，将经处理的信号数据存储在同步RAM中，根据存储的信号数据创建显示数据，将显示数据存储在双端口RAM中。主控制单元耦合到数字信号处理单元，并且包括耦合到数字信号处理器通信接口的内部通信接口，外部通信接口和中央处理单元，其通过内部通信接口接收显示数据并发送显示器数据通过外部通信接口。

2. 发明授权

US08433543B2 Digital oscilloscope module with glitch detection 有权
标题翻译：具有毛刺检测功能的数字示波器模块
公开(公告)号：US08433543B2
公开(公告)日：2013-04-30
申请号：US12548185
申请日：2009-08-26
申请人： Marco LeBrun
发明人： Marco LeBrun
IPC分类号： H03F1/26 , G06F15/00 , G01R13/00
CPC分类号： G01R13/0263 , G01R13/0218
摘要： The present invention provides a digital oscilloscope with glitch detection, including a synchronous random access memory (RAM), a digital signal processing unit, coupled to the synchronous RAM, and a master control unit coupled to the digital signal processing unit. The digital signal processing unit includes an analog-to-digital (A/D) converter to digitize an analog signal and a digital signal processor. The digital signal processor includes a dual-port RAM, a plurality of processing blocks to process the digitized analog signal data, detect glitches in the digitized analog signal data, store the processed signal data in the synchronous RAM, create display data from the stored signal data, and store the display data in the dual-port RAM, and a communications interface to transmit the stored display data. The master control unit includes an internal communications interface coupled to the digital signal processor communications interface, an external communications interface, and a central processing unit to receive the display data over the internal communications interface and transmit the display data over the external communications interface.
摘要翻译：本发明提供一种具有毛刺检测的数字示波器，包括耦合到同步RAM的同步随机存取存储器（RAM），数字信号处理单元以及耦合到数字信号处理单元的主控制单元。数字信号处理单元包括用于对模拟信号进行数字化的模拟（A / D）转换器和数字信号处理器。数字信号处理器包括双端口RAM，用于处理数字化模拟信号数据的多个处理块，检测数字化模拟信号数据中的毛刺，将经处理的信号数据存储在同步RAM中，从存储的信号中产生显示数据数据并将显示数据存储在双端口RAM中，以及通信接口来传送所存储的显示数据。主控制单元包括耦合到数字信号处理器通信接口的内部通信接口，外部通信接口和中央处理单元，用于通过内部通信接口接收显示数据，并通过外部通信接口发送显示数据。

3. 发明申请

US20100057388A1 Digital Oscilloscope Module 有权
标题翻译：数字示波器模块
公开(公告)号：US20100057388A1
公开(公告)日：2010-03-04
申请号：US12548162
申请日：2009-08-26
申请人： Marco LeBrun
发明人： Marco LeBrun
IPC分类号： G01R13/00
CPC分类号： G01R13/0218 , H04L12/403
摘要： The present invention provides a digital data acquisition module, such as a digital oscilloscope, that includes a synchronous random access memory (RAM), a digital signal processing unit, and a master control unit. The digital signal processing unit is coupled to the synchronous RAM and includes at least one analog-to-digital (A/D) converter that digitizes an analog signal, and a digital signal processor that includes a dual-port RAM, a plurality of processing blocks and a communications interface. The plurality of processing blocks process the digitized analog signal data, store the processed signal data in the synchronous RAM, create display data from the stored signal data, store the display data in the dual-port RAM. The master control unit is coupled to the digital signal processing unit and includes an internal communications interface coupled to the digital signal processor communications interface, an external communications interface and a central processing unit that receives the display data over the internal communications interface and transmits the display data over the external communications interface.
摘要翻译：本发明提供了一种包括同步随机存取存储器（RAM），数字信号处理单元和主控制单元的诸如数字示波器的数字数据采集模块。数字信号处理单元耦合到同步RAM，并且包括至少一个数字化模拟信号的模数（A / D）转换器和包括双端口RAM的数字信号处理器，多个处理块和通信接口。多个处理块处理数字化的模拟信号数据，将经处理的信号数据存储在同步RAM中，根据存储的信号数据创建显示数据，将显示数据存储在双端口RAM中。主控制单元耦合到数字信号处理单元，并且包括耦合到数字信号处理器通信接口的内部通信接口，外部通信接口和中央处理单元，其通过内部通信接口接收显示数据并发送显示器数据通过外部通信接口。

4. 发明申请

US20100052653A1 Digital Oscilloscope Module with Glitch Detection 有权
标题翻译：具有毛刺检测功能的数字示波器模块
公开(公告)号：US20100052653A1
公开(公告)日：2010-03-04
申请号：US12548185
申请日：2009-08-26
申请人： Marco LeBrun
发明人： Marco LeBrun
IPC分类号： G01R13/02
CPC分类号： G01R13/0263 , G01R13/0218
摘要： The present invention provides a digital oscilloscope with glitch detection, including a synchronous random access memory (RAM), a digital signal processing unit, coupled to the synchronous RAM, and a master control unit coupled to the digital signal processing unit. The digital signal processing unit includes an analog-to-digital (A/D) converter to digitize an analog signal and a digital signal processor. The digital signal processor includes a dual-port RAM, a plurality of processing blocks to process the digitized analog signal data, detect glitches in the digitized analog signal data, store the processed signal data in the synchronous RAM, create display data from the stored signal data, and store the display data in the dual-port RAM, and a communications interface to transmit the stored display data. The master control unit includes an internal communications interface coupled to the digital signal processor communications interface, an external communications interface, and a central processing unit to receive the display data over the internal communications interface and transmit the display data over the external communications interface.
摘要翻译：本发明提供一种具有毛刺检测的数字示波器，包括耦合到同步RAM的同步随机存取存储器（RAM），数字信号处理单元以及耦合到数字信号处理单元的主控制单元。数字信号处理单元包括用于对模拟信号进行数字化的模拟（A / D）转换器和数字信号处理器。数字信号处理器包括双端口RAM，用于处理数字化模拟信号数据的多个处理块，检测数字化模拟信号数据中的毛刺，将经处理的信号数据存储在同步RAM中，从存储的信号中产生显示数据数据并将显示数据存储在双端口RAM中，以及通信接口来传送所存储的显示数据。主控制单元包括耦合到数字信号处理器通信接口的内部通信接口，外部通信接口和中央处理单元，用于通过内部通信接口接收显示数据，并通过外部通信接口发送显示数据。

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