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1. 发明授权

US07042325B2 Planar transformer arrangement 有权
公开(公告)号：US07042325B2
公开(公告)日：2006-05-09
申请号：US10452679
申请日：2003-05-30
申请人： Marco Giandalia , Massimo Grasso , Marco Passoni
发明人： Marco Giandalia , Massimo Grasso , Marco Passoni
IPC分类号： H01F5/00
CPC分类号： H01F27/323 , H01F17/0013 , H01F27/2804 , H01F27/345 , H01F2017/0093 , H01F2019/085 , H01F2027/2819
摘要： A planar transformer arrangement and method provide isolation between an input signal and an output signal. The planar transformer arrangement includes a planar medium having a first layer, a second layer, and a dielectric interlayer arranged between the first and second layers; at least one meandering primary winding arranged on the first layer of the planar medium, a current flow being induced within the primary winding in accordance with the input signal; at least one meandering secondary winding arranged on the second layer of the planar medium, the primary and secondary windings forming a planar transformer, whereby a voltage is induced across the secondary winding in accordance with the current flow within the primary winding; and a mode elimination arrangement configured to produce a compensated voltage by compensating for a common mode interference on the voltage induced across the secondary winding, the mode elimination arrangement being further configured to generate the output signal in accordance with the compensated voltage; wherein the dielectric interlayer of the planar medium provides a voltage isolation between the primary and secondary windings.

2. 发明申请

US20060109072A1 Planar transformer arrangement 有权
标题翻译：平面变压器布置
公开(公告)号：US20060109072A1
公开(公告)日：2006-05-25
申请号：US11324556
申请日：2006-01-03
申请人： Marco Giandalia , Massimo Grasso , Marco Passoni
发明人： Marco Giandalia , Massimo Grasso , Marco Passoni
IPC分类号： H01F5/00
CPC分类号： H01F27/323 , H01F17/0013 , H01F27/2804 , H01F27/345 , H01F2017/0093 , H01F2019/085 , H01F2027/2819
摘要： A planar transformer arrangement and method provide isolation between an input signal and an output signal. The planar transformer arrangement includes a planar medium having a first layer, a second layer, and a dielectric interlayer arranged between the first and second layers; at least one meandering primary winding arranged on the first layer of the planar medium, a current flow being induced within the primary winding in accordance with the input signal; at least one meandering secondary winding arranged on the second layer of the planar medium, the primary and secondary windings forming a planar transformer, whereby a voltage is induced across the secondary winding in accordance with the current flow within the primary winding; and a mode elimination arrangement configured to produce a compensated voltage by compensating for a common mode interference on the voltage induced across the secondary winding, the mode elimination arrangement being further configured to generate the output signal in accordance with the compensated voltage; wherein the dielectric interlayer of the planar medium provides a voltage isolation between the primary and secondary windings.
摘要翻译：平面变压器布置和方法提供输入信号和输出信号之间的隔离。平面变压器布置包括平面介质，其具有布置在第一层和第二层之间的第一层，第二层和介电中间层; 布置在所述平面介质的所述第一层上的至少一个曲折的初级绕组，根据所述输入信号在所述初级绕组内感应出电流; 至少一个曲折的次级绕组布置在所述平面介质的第二层上，所述初级和次级绕组形成平面变压器，由此根据所述初级绕组内的电流流动在所述次级绕组上感应出电压; 以及模式消除装置，其被配置为通过补偿对所述次级绕组两端感应的电压的共模干扰来产生补偿电压，所述模式消除装置还被配置为根据所述补偿电压产生所述输出信号; 其中平面介质的电介质中间层提供初级和次级绕组之间的电压隔离。

3. 发明授权

US07864018B2 Planar transformer arrangement 有权
标题翻译：平面变压器布置
公开(公告)号：US07864018B2
公开(公告)日：2011-01-04
申请号：US12165749
申请日：2008-07-01
申请人： Marco Giandalia , Massimo Grasso , Marco Passoni
发明人： Marco Giandalia , Massimo Grasso , Marco Passoni
IPC分类号： H01F5/00
CPC分类号： H01F27/323 , H01F17/0013 , H01F27/2804 , H01F27/345 , H01F2017/0093 , H01F2019/085 , H01F2027/2819
摘要： A planar transformer arrangement and method provide isolation between an input signal and an output signal. The planar transformer arrangement includes a planar medium having a first layer, a second layer, and a dielectric interlayer arranged between the first and second layers; at least one meandering primary winding arranged on the first layer of the planar medium, a current flow being induced within the primary winding in accordance with the input signal; at least one meandering secondary winding arranged on the second layer of the planar medium, the primary and secondary windings forming a planar transformer, whereby a voltage is induced across the secondary winding in accordance with the current flow within the primary winding; and a mode elimination arrangement configured to produce a compensated voltage by compensating for a common mode interference on the voltage induced across the secondary winding, the mode elimination arrangement being further configured to generate the output signal in accordance with the compensated voltage; wherein the dielectric interlayer of the planar medium provides a voltage isolation between the primary and secondary windings.
摘要翻译：平面变压器布置和方法提供输入信号和输出信号之间的隔离。平面变压器布置包括平面介质，其具有布置在第一层和第二层之间的第一层，第二层和介电中间层; 布置在所述平面介质的所述第一层上的至少一个曲折的初级绕组，根据所述输入信号在所述初级绕组内感应出电流; 至少一个曲折的次级绕组布置在所述平面介质的第二层上，所述初级和次级绕组形成平面变压器，由此根据所述初级绕组内的电流流动在所述次级绕组上感应出电压; 以及模式消除装置，其被配置为通过补偿对所述次级绕组两端感应的电压的共模干扰来产生补偿电压，所述模式消除装置还被配置为根据所述补偿电压产生所述输出信号; 其中平面介质的电介质中间层提供初级和次级绕组之间的电压隔离。

4. 发明申请

US20080266043A1 PLANAR TRANSFORMER ARRANGEMENT 有权
标题翻译：平面变压器布置
公开(公告)号：US20080266043A1
公开(公告)日：2008-10-30
申请号：US12165749
申请日：2008-07-01
申请人： Marco Giandalia , Massimo Grasso , Marco Passoni
发明人： Marco Giandalia , Massimo Grasso , Marco Passoni
IPC分类号： H01F5/00
CPC分类号： H01F27/323 , H01F17/0013 , H01F27/2804 , H01F27/345 , H01F2017/0093 , H01F2019/085 , H01F2027/2819
摘要： A planar transformer arrangement and method provide isolation between an input signal and an output signal. The planar transformer arrangement includes a planar medium having a first layer, a second layer, and a dielectric interlayer arranged between the first and second layers; at least one meandering primary winding arranged on the first layer of the planar medium, a current flow being induced within the primary winding in accordance with the input signal; at least one meandering secondary winding arranged on the second layer of the planar medium, the primary and secondary windings forming a planar transformer, whereby a voltage is induced across the secondary winding in accordance with the current flow within the primary winding; and a mode elimination arrangement configured to produce a compensated voltage by compensating for a common mode interference on the voltage induced across the secondary winding, the mode elimination arrangement being further configured to generate the output signal in accordance with the compensated voltage; wherein the dielectric interlayer of the planar medium provides a voltage isolation between the primary and secondary windings.
摘要翻译：平面变压器布置和方法提供输入信号和输出信号之间的隔离。平面变压器布置包括平面介质，其具有布置在第一层和第二层之间的第一层，第二层和介电中间层; 布置在所述平面介质的所述第一层上的至少一个曲折的初级绕组，根据所述输入信号在所述初级绕组内感应出电流; 至少一个曲折的次级绕组布置在所述平面介质的第二层上，所述初级和次级绕组形成平面变压器，由此根据所述初级绕组内的电流流动在所述次级绕组上感应出电压; 以及模式消除装置，其被配置为通过补偿对所述次级绕组两端感应的电压的共模干扰来产生补偿电压，所述模式消除装置还被配置为根据所述补偿电压产生所述输出信号; 其中平面介质的电介质中间层提供初级和次级绕组之间的电压隔离。

5. 发明授权

US07414507B2 Planar transformer arrangement 有权
标题翻译：平面变压器布置
公开(公告)号：US07414507B2
公开(公告)日：2008-08-19
申请号：US11324556
申请日：2006-01-03
申请人： Marco Giandalia , Massimo Grasso , Marco Passoni
发明人： Marco Giandalia , Massimo Grasso , Marco Passoni
IPC分类号： H01F5/00
CPC分类号： H01F27/323 , H01F17/0013 , H01F27/2804 , H01F27/345 , H01F2017/0093 , H01F2019/085 , H01F2027/2819
摘要： A planar transformer arrangement and method provide isolation between an input signal and an output signal. The planar transformer arrangement includes a planar medium having a first layer, a second layer, and a dielectric interlayer arranged between the first and second layers; at least one meandering primary winding arranged on the first layer of the planar medium, a current flow being induced within the primary winding in accordance with the input signal; at least one meandering secondary winding arranged on the second layer of the planar medium, the primary and secondary windings forming a planar transformer, whereby a voltage is induced across the secondary winding in accordance with the current flow within the primary winding; and a mode elimination arrangement configured to produce a compensated voltage by compensating for a common mode interference on the voltage induced across the secondary winding, the mode elimination arrangement being further configured to generate the output signal in accordance with the compensated voltage; wherein the dielectric interlayer of the planar medium provides a voltage isolation between the primary and secondary windings.
摘要翻译：平面变压器布置和方法提供输入信号和输出信号之间的隔离。平面变压器布置包括平面介质，其具有布置在第一层和第二层之间的第一层，第二层和介电中间层; 布置在所述平面介质的所述第一层上的至少一个曲折的初级绕组，根据所述输入信号在所述初级绕组内感应出电流; 至少一个曲折的次级绕组布置在所述平面介质的第二层上，所述初级和次级绕组形成平面变压器，由此根据所述初级绕组内的电流流动在所述次级绕组上感应出电压; 以及模式消除装置，其被配置为通过补偿对所述次级绕组两端感应的电压的共模干扰来产生补偿电压，所述模式消除装置还被配置为根据所述补偿电压产生所述输出信号; 其中平面介质的电介质中间层提供初级和次级绕组之间的电压隔离。

6. 发明授权

US08013612B2 Ground fault detection circuit for use in high voltage motor drive applications 有权
标题翻译：用于高压电机驱动应用的接地故障检测电路
公开(公告)号：US08013612B2
公开(公告)日：2011-09-06
申请号：US12249116
申请日：2008-10-10
申请人： Sergio Morini , Marco Giandalia , David Respigo , Stefano Ruzza , Massimo Grasso
发明人： Sergio Morini , Marco Giandalia , David Respigo , Stefano Ruzza , Massimo Grasso
IPC分类号： G01R31/02
CPC分类号： G01R31/025 , G01R31/34 , G01R31/42
摘要： An integrated ground fault detection circuit in accordance with an embodiment of the present application includes a shunt resistor provided on a positive rail of a DC bus, a high voltage pocket including a sensory circuit connected to the shunt resistor and operable to detect a fault condition indicating a short circuit and a transmitter section operable to continuously transmit a fault condition signal indicating the fault condition and a low voltage pocket including a receiver operable to receive the fault condition signal from the sensory circuit and a logic unit, connected to the receiver, and operable to provide a fault output signal indicating the presence of a fault condition based on the fault condition signal.
摘要翻译：根据本申请的实施例的集成接地故障检测电路包括设置在DC总线的正极轨上的分流电阻器，包括连接到分流电阻器的感觉电路的高压口袋，并且可操作以检测指示短路和发送器部分，其可操作以连续发送指示故障状况的故障状态信号;以及低压口袋，包括可接收来自感觉电路的故障状态信号的接收器和连接到接收器的逻辑单元，并且可操作基于故障状态信号提供指示存在故障状况的故障输出信号。

7. 发明申请

US20090102488A1 GROUND FAULT DETECTION CIRCUIT FOR USE IN HIGH VOLTAGE MOTOR DRIVE APPLICATIONS 有权
标题翻译：用于高压电动机驱动应用的接地故障检测电路
公开(公告)号：US20090102488A1
公开(公告)日：2009-04-23
申请号：US12249116
申请日：2008-10-10
申请人： Sergio Morini , Marco Giandalia , Davide Respigo , Stefano Ruzza , Massimo Grasso
发明人： Sergio Morini , Marco Giandalia , Davide Respigo , Stefano Ruzza , Massimo Grasso
IPC分类号： G01R31/08
CPC分类号： G01R31/025 , G01R31/34 , G01R31/42
摘要： An integrated ground fault detection circuit in accordance with an embodiment of the present application includes a shunt resistor provided on a positive rail of a DC bus, a high voltage pocket including a sensory circuit connected to the shunt resistor and operable to detect a fault condition indicating a short circuit and a transmitter section operable to continuously transmit a fault condition signal indicating the fault condition and a low voltage pocket including a receiver operable to receive the fault condition signal from the sensory circuit and a logic unit, connected to the receiver, and operable to provide a fault output signal indicating the presence of a fault condition based on the fault condition signal.
摘要翻译：根据本申请的实施例的集成接地故障检测电路包括设置在DC总线的正极上的分流电阻器，包括连接到分流电阻器的感觉电路的高压口袋，并且可操作以检测指示短路和发送器部分，其可操作以连续发送指示故障状况的故障状态信号;以及低压口袋，包括可接收来自感觉电路的故障状态信号的接收器和连接到接收器的逻辑单元，并且可操作基于故障状态信号提供指示存在故障状况的故障输出信号。

8. 发明申请

US20070063661A1 PROTECTION CIRCUIT FOR PERMANENT MAGNET SYNCHRONOUS MOTOR IN FILED WEAKENING OPERATION 有权
标题翻译：永磁同步电机保护电路在弱化运行中的应用
公开(公告)号：US20070063661A1
公开(公告)日：2007-03-22
申请号：US11533508
申请日：2006-09-20
申请人： Giovanni Galli , Massimo Grasso , Cesare Bocchiola
发明人： Giovanni Galli , Massimo Grasso , Cesare Bocchiola
IPC分类号： H02P5/00
CPC分类号： H03K17/6877 , H02M1/32 , H02M7/5387 , H02M2001/0006 , H02P3/06 , H02P3/22 , H02P6/24 , H03K2017/6875 , Y10T307/615 , Y10T307/625
摘要： A safety circuit for providing protection against failures that impact safety of an inverter circuit driving a Permanent Magnet Synchronous Motor (PMSM) including high and low side switches connected in a bridge and driven by a gate driver circuit during operation of the PMSM in a field weakening mode, the gate driver circuit including stages for driving the high and low side switches, the safety circuit comprising a main power supply and a back-up power supply for supplying voltage to the gate driver circuit driving the switches of the bridge of the inverter circuit, wherein if the main power supply fails to deliver adequate power to the gate driver circuit, the back-up power supply provides power to the gate driver circuit to allow the gate driver circuit to turn ON the low side switches and turn OFF the high side switches.
摘要翻译：一种安全电路，用于提供防止影响驱动永磁同步电动机（PMSM）的逆变器电路的安全性的安全电路，该永磁同步电动机（PMSM）包括连接在桥中的高侧和低侧开关，并在PMSM的弱磁场运行期间由栅极驱动电路驱动模式，栅极驱动器电路包括用于驱动高低侧开关的级，安全电路包括主电源和用于向驱动逆变器电路的桥的开关的栅极驱动电路提供电压的备用电源其中，如果所述主电源不能向所述栅极驱动电路输送足够的电力，所述备用电源向所述栅极驱动电路提供电力，以允许所述栅极驱动电路接通所述低压侧开关并且关闭所述高压侧开关。

9. 发明授权

US07135891B2 Current sense shunt resistor circuit 有权
标题翻译：电流检测分流电阻电路
公开(公告)号：US07135891B2
公开(公告)日：2006-11-14
申请号：US11208821
申请日：2005-08-22
申请人： Massimo Grasso , Aldo Torti , Andrea Merello , Jonas Aleksandravicius
发明人： Massimo Grasso , Aldo Torti , Andrea Merello , Jonas Aleksandravicius
IPC分类号： H03K5/22
CPC分类号： G01R19/0092 , G01R1/203
摘要： Current through a wire is sensed with a shunt resistor and a sense resistor in a current divider circuit. The values of the shunt resistor and sense resistor are related to provide a specified gain ratio to increase a dynamic range of current measurement. The sense resistor is a trimmable resistor, the configuration of which can be discerned from a look-up table based on a level of precision needed for current measurement. The two resistors can also be related by thermal coefficients to improve linearity of current measurements.
摘要翻译：通过分流电路中的分流电阻和检测电阻来检测通过导线的电流。分流电阻和检测电阻的值与提供规定的增益比相关联，以增加电流测量的动态范围。检测电阻是可调节的电阻器，其配置可以基于电流测量所需的精度水平从查找表中辨别出来。两个电阻也可以通过热系数相关联，以提高电流测量的线性度。

10. 发明申请

US20060033556A1 Start-up circuit for providing a start-up voltage to an application circuit 有权
标题翻译：启动电路，用于向应用电路提供启动电压
公开(公告)号：US20060033556A1
公开(公告)日：2006-02-16
申请号：US11199841
申请日：2005-08-09
申请人： Massimo Grasso , Sergio Morini
发明人： Massimo Grasso , Sergio Morini
IPC分类号： G05F1/10
CPC分类号： H02M3/335 , H02M1/36 , Y10S323/901
摘要： A startup circuit for providing a startup voltage from a high voltage DC bus voltage to an application circuit comprising an integrated circuit package for at least a control circuit for driving at least one power switch of the application circuit; a dropping resistor in the integrated circuit package having a first terminal for coupling to the high voltage DC bus and for dropping the high voltage DC bus voltage to a reduced voltage level at a second terminal; further comprising a low voltage regulator in the package coupled to the second terminal for providing a startup regulated low voltage DC output at a preset level for powering at least one part of the application circuit during startup of the application circuit. The application circuit may be, for example, a switching mode power supply.
摘要翻译：一种用于将高压DC总线电压的启动电压提供给应用电路的启动电路，所述应用电路包括至少用于驱动所述应用电路的至少一个电源开关的控制电路的集成电路封装; 所述集成电路封装中的降压电阻器具有用于耦合到所述高压DC总线的第一端子和用于在所述第二端子处将所述高压DC总线电压降低到降低的电压电平; 还包括在所述封装中的与所述第二端子耦合的低压调节器，用于提供预设电平的起动调节低压DC输出，以在所述应用电路启动期间为所述施加电路的至少一部分供电。应用电路可以是例如开关模式电源。

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