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    • 2. 发明申请
    • Systems and Methods for Temperature Measurement Using N-Factor Coefficient Correction
    • 使用N因子系数校正进行温度测量的系统和方法
    • US20080259989A1
    • 2008-10-23
    • US11738595
    • 2007-04-23
    • Jerry L. DoorenbosMarco A. Gardner
    • Jerry L. DoorenbosMarco A. Gardner
    • G01K7/00G01K15/00
    • G01K7/01G01K15/00G01K2219/00
    • Various systems and methods for temperature measurement are disclosed. For example, some embodiments of the present invention provide temperature measurement systems. Such temperature measurement systems include a variable current source and a diode connected transistor. The variable current source is capable of applying two or more distinct currents to the diode connected transistor. The currents result in a different base-emitter voltage on the diode connected transistor. The systems further include an n-factor coefficient register and an analog to digital converter. The analog to digital converter is operable to receive two of the base-emitter voltages created by applying the different currents, and to provide a digital output based at least in part on a value stored in the n-factor coefficient register and the two base-emitter voltages.
    • 公开了用于温度测量的各种系统和方法。 例如,本发明的一些实施例提供温度测量系统。 这种温度测量系统包括可变电流源和二极管连接的晶体管。 可变电流源能够向二极管连接的晶体管施加两个或更多个不同的电流。 电流导致二极管连接晶体管上的基极 - 发射极电压不同。 该系统还包括一个n因子系数寄存器和一个模数转换器。 模数转换器可操作以接收通过施加不同电流产生的两个基极 - 发射极电压,并且至少部分地基于存储在n因子系数寄存器中的值和两个基极 - 发射极电压。
    • 3. 发明授权
    • Systems and methods for temperature measurement using n-factor coefficient correction
    • 使用n因子系数校正的温度测量系统和方法
    • US07648271B2
    • 2010-01-19
    • US11738595
    • 2007-04-23
    • Jerry L. DoorenbosMarco A. Gardner
    • Jerry L. DoorenbosMarco A. Gardner
    • G01K7/00G01K15/00
    • G01K7/01G01K15/00G01K2219/00
    • Various systems and methods for temperature measurement are disclosed. For example, some embodiments of the present invention provide temperature measurement systems. Such temperature measurement systems include a variable current source and a diode connected transistor. The variable current source is capable of applying two or more distinct currents to the diode connected transistor. The currents result in a different base-emitter voltage on the diode connected transistor. The systems further include an n-factor coefficient register and an analog to digital converter. The analog to digital converter is operable to receive two of the base-emitter voltages created by applying the different currents, and to provide a digital output based at least in part on a value stored in the n-factor coefficient register and the two base-emitter voltages.
    • 公开了用于温度测量的各种系统和方法。 例如,本发明的一些实施例提供温度测量系统。 这种温度测量系统包括可变电流源和二极管连接的晶体管。 可变电流源能够向二极管连接的晶体管施加两个或更多个不同的电流。 电流导致二极管连接晶体管上的基极 - 发射极电压不同。 该系统还包括一个n因子系数寄存器和一个模数转换器。 模数转换器可操作以接收通过施加不同电流产生的两个基极 - 发射极电压,并且至少部分地基于存储在n因子系数寄存器中的值和两个基极 - 发射极电压。
    • 5. 发明申请
    • Systems and Methods for PWM Clocking in a Temperature Measurement Circuit
    • 温度测量电路中PWM时钟的系统和方法
    • US20080259997A1
    • 2008-10-23
    • US11738571
    • 2007-04-23
    • Marco A. GardnerJerry L. Doorenbos
    • Marco A. GardnerJerry L. Doorenbos
    • G01K7/01H03M1/12
    • G01K7/01H03M1/1245
    • Various systems and methods for pulse width modulated clocking in a temperature measurement are disclosed. For example, some embodiments of the present invention provide temperature measurement systems with a variable current source, a transistor, and a pulse width modulation circuit. The variable current source is operable to provide a first current and a second current that are applied to the transistor. A first base-emitter voltage occurs on the transistor when the first current is applied, and a second base-emitter voltage occurs on the transistor when the second current is applied. The first base emitter voltage is associated with a first sample period, and a second base-emitter voltage is associated with a second sample period. The pulse width modulation circuit provides a pulse width modulated clock including a combination of the aforementioned first period and second period.
    • 公开了用于温度测量中的脉宽调制时钟的各种系统和方法。 例如,本发明的一些实施例提供具有可变电流源,晶体管和脉宽调制电路的温度测量系统。 可变电流源可操作以提供施加到晶体管的第一电流和第二电流。 当施加第一电流时,在晶体管上发生第一基极 - 发射极电压,并且当施加第二电流时,晶体管上出现第二基极 - 发射极电压。 第一基极发射极电压与第一采样周期相关联,并且第二基极 - 发射极电压与第二采样周期相关联。 脉冲宽度调制电路提供包括上述第一周期和第二周期的组合的脉宽调制时钟。
    • 6. 发明授权
    • Systems and methods for PWM clocking in a temperature measurement circuit
    • 温度测量电路中PWM时钟的系统和方法
    • US07637658B2
    • 2009-12-29
    • US11738571
    • 2007-04-23
    • Marco A. GardnerJerry L. Doorenbos
    • Marco A. GardnerJerry L. Doorenbos
    • G01K7/00
    • G01K7/01H03M1/1245
    • Various systems and methods for pulse width modulated clocking in a temperature measurement are disclosed. For example, some embodiments of the present invention provide temperature measurement systems with a variable current source, a transistor, and a pulse width modulation circuit. The variable current source is operable to provide a first current and a second current that are applied to the transistor. A first base-emitter voltage occurs on the transistor when the first current is applied, and a second base-emitter voltage occurs on the transistor when the second current is applied. The first base emitter voltage is associated with a first sample period, and a second base-emitter voltage is associated with a second sample period. The pulse width modulation circuit provides a pulse width modulated clock including a combination of the aforementioned first period and second period.
    • 公开了用于温度测量中的脉宽调制时钟的各种系统和方法。 例如,本发明的一些实施例提供具有可变电流源,晶体管和脉宽调制电路的温度测量系统。 可变电流源可操作以提供施加到晶体管的第一电流和第二电流。 当施加第一电流时,在晶体管上发生第一基极 - 发射极电压,并且当施加第二电流时,晶体管上出现第二基极 - 发射极电压。 第一基极发射极电压与第一采样周期相关联,并且第二基极 - 发射极电压与第二采样周期相关联。 脉冲宽度调制电路提供包括上述第一周期和第二周期的组合的脉宽调制时钟。
    • 7. 发明授权
    • Systems and methods for resistance compensation in a temperature measurement circuit
    • 温度测量电路中电阻补偿的系统和方法
    • US07524109B2
    • 2009-04-28
    • US11738584
    • 2007-04-23
    • Marco A. GardnerJerry L. Doorenbos
    • Marco A. GardnerJerry L. Doorenbos
    • G01K7/00
    • G01K7/01G01K15/00
    • Various systems and methods for temperature measurement are disclosed. For example, some embodiments of the present invention provide methods for temperature measurement that include exciting a provided transistor with at least four sequential input signals of different magnitudes. In response, the transistor exhibits a sequence of output signals corresponding to the four sequential input signals. The sequence of output signals is sensed using a different gain for each of the output signals included in the sequence of output signals, and the output signals included in the sequence of output signals are combined such that the combined output signals eliminates a resistance error. The combined output signals are then used to calculate a temperature of the transistor.
    • 公开了用于温度测量的各种系统和方法。 例如,本发明的一些实施例提供了用于温度测量的方法,其包括用至少四个具有不同幅度的顺序输入信号激励所提供的晶体管。 作为响应,晶体管表现出对应于四个顺序输入信号的输出信号序列。 输出信号的序列使用包括在输出信号序列中的每个输出信号的不同的增益来检测,并且包括在输出信号序列中的输出信号被组合,使得组合的输出信号消除了电阻误差。 然后,组合的输出信号用于计算晶体管的温度。
    • 8. 发明授权
    • Reduced pin count scan chain implementation
    • 减少引脚数扫描链实现
    • US07380185B2
    • 2008-05-27
    • US11311833
    • 2005-12-19
    • Jerry L. DoorenbosDimitar TrifonovMarco A. Gardner
    • Jerry L. DoorenbosDimitar TrifonovMarco A. Gardner
    • G01R31/28
    • G01R31/318536G01R31/3172
    • The synchronous logic device with reduced pin count scan chain includes: more than two flip/flops coupled to form a shift register for receiving a scan data input signal; a combinational logic circuit for receiving device inputs, generating flip/flop inputs for the more than two flip/flops, and generating an output signal; a first multiplexer for providing a clock signal to the more than two flip/flops during a test mode; a second multiplexer for selecting between a test mode output from the shift register and the output signal from the combinational logic circuit, and for providing a scan data output signal; and wherein the scan data input signal and the scan data output signal share an input/output pin.
    • 具有减少的引脚数扫描链的同步逻辑器件包括:多于两个触发器,耦合以形成用于接收扫描数据输入信号的移位寄存器; 用于接收设备输入的组合逻辑电路,为多于两个的触发器产生触发器/触发器输入,并产生输出信号; 第一复用器,用于在测试模式期间向多于两个触发器提供时钟信号; 第二多路复用器,用于在从移位寄存器输出的测试模式和来自组合逻辑电路的输出信号之间进行选择,并用于提供扫描数据输出信号; 并且其中所述扫描数据输入信号和所述扫描数据输出信号共享输入/输出引脚。
    • 9. 发明授权
    • Identification address configuration circuit and method without use of dedicated address pins
    • 识别地址配置电路和方法,不使用专用地址引脚
    • US08806083B2
    • 2014-08-12
    • US11803465
    • 2007-05-15
    • Jerry L. Doorenbos
    • Jerry L. Doorenbos
    • G06F3/00G06F13/38
    • G06F13/385G06F13/4291
    • An identification address of a sensor interface device is configured in response to the order of connection of first (DXP1) and second (DXN1) package pins to electrodes of a sensor (Q0). A sensor signal processing circuit (23) has first and second inputs coupled through the first and second pins to the sensor for converting a parameter sensed by the sensor to a different representation. A current is forced through the first pin to produce either a high or low voltage on the first pin depending on the order of connection of the first and second pins to the electrodes of the sensor. A voltage on the first pin is compared with a reference voltage to produce a comparison signal which is mapped to produce the identification address.
    • 响应于第一(DXP1)和第二(DXN1)封装引脚到传感器(Q0)的电极的连接顺序来配置传感器接口装置的识别地址。 传感器信号处理电路(23)具有通过第一和第二引脚耦合到传感器的第一和第二输入,用于将由传感器感测的参数转换成不同的表示。 根据第一和第二引脚与传感器的电极的连接顺序,迫使电流通过第一引脚产生第一引脚上的高电压或低电压。 将第一引脚上的电压与参考电压进行比较,以产生映射以产生识别地址的比较信号。
    • 10. 发明申请
    • Integrating/SAR ADC and method with low integrator swing and low complexity
    • 集成/ SAR ADC和低积分摆幅和低复杂度的方法
    • US20080258959A1
    • 2008-10-23
    • US12072968
    • 2008-02-29
    • Dimitar T. TrifonovJerry L. Doorenbos
    • Dimitar T. TrifonovJerry L. Doorenbos
    • H03M1/12
    • H03M1/145H03M1/46H03M3/46
    • A reconfigurable circuit (10) includes an integrator (30) having switches (SW1-6) for selectively coupling input capacitors (C0,1,2,3,6,7) and integrating capacitors (C4,5) to terminals of the integrator (30) for operation of a hybrid delta-sigma/SAR ADC (400) so as to create a reference voltage value (Vref) equal to the sum of a first voltage (ΔVbe) and a second voltage (Vbe). A first integration is performed to reduce the integrator output voltage swing. A residue (Vresidue) of the integrator is multiplied by 2. Then the second voltage (Vbe) is integrated in a first direction if a comparator (22) coupled to the integrator changes state or in an opposite direction if the comparator does not change state. The first voltage (ΔVbe) is integrated in a direction that causes the integrator output voltage (Vout) to equal either 2×Vresidue−Vref or 2×Vresidue+Vref.
    • 可重新配置电路(10)包括具有用于选择性地将输入电容器(C 0,1,2,3,6,7)和积分电容器(C 4,5)耦合到端子的开关(SW1-6)的积分器(30) 用于操作混合Δ-Σ/ SAR ADC(400)的积分器(30),以便产生等于第一电压(DeltaVbe)和第二电压(Vbe)之和的参考电压值(Vref)。 执行第一次积分以减小积分器输出电压摆幅。 如果比较器(22)耦合到积分器,则如果比较器不改变状态,则将第二电压(Vbe)积分在第一方向上。如果比较器(22)耦合到积分器,则将积分器的残差(Vresidue)乘以2.然后, 。 第一电压(DeltaVbe)集成在使积分器输出电压(Vout)等于2xVresidue-Vref或2xVresidue + Vref的方向上。