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1. 发明授权

US07005626B2 Ultra low voltage CMOS image sensor architecture 有权
标题翻译：超低电压CMOS图像传感器架构
公开(公告)号：US07005626B2
公开(公告)日：2006-02-28
申请号：US10219260
申请日：2002-08-16
申请人： Mansun Chan , Chen Xu , Wing-Hung Ki
发明人： Mansun Chan , Chen Xu , Wing-Hung Ki
IPC分类号： H01L27/14
CPC分类号： H01L27/14643 , H01L27/14632
摘要： A pixel element for an image sensor comprising, a photodiode and a reset transistor connected to an input node, wherein said reset transistor is a PMOSFET connected between said input node and the supply voltage, and wherein said pixel further comprises parallel complementary signal paths.
摘要翻译：一种用于图像传感器的像素元件，包括连接到输入节点的光电二极管和复位晶体管，其中所述复位晶体管是连接在所述输入节点和所述电源电压之间的PMOSFET，并且其中所述像素还包括并行互补信号路径。

2. 发明授权

US07897901B2 Ultra low voltage CMOS image sensor architecture 有权
标题翻译：超低电压CMOS图像传感器架构
公开(公告)号：US07897901B2
公开(公告)日：2011-03-01
申请号：US12059402
申请日：2008-03-31
申请人： Man Sun John Chan , Chen Xu , Wing Hung Ki
发明人： Man Sun John Chan , Chen Xu , Wing Hung Ki
IPC分类号： H01L27/00 , H01J40/14
CPC分类号： H01L27/14632 , H01L27/14612 , H01L27/14643
摘要： A pixel element for an image sensor comprising, a photodiode and a reset transistor coupled to an input node, wherein said reset transistor is a PMOSFET coupled between said input node and the supply voltage, and wherein said pixel further comprises parallel complementary signal paths.
摘要翻译：一种用于图像传感器的像素元件，包括耦合到输入节点的光电二极管和复位晶体管，其中所述复位晶体管是耦合在所述输入节点和所述电源电压之间的PMOSFET，并且其中所述像素还包括并行互补信号路径。

3. 发明授权

US07858912B2 Ultra low voltage CMOS image sensor architecture 有权
标题翻译：超低电压CMOS图像传感器架构
公开(公告)号：US07858912B2
公开(公告)日：2010-12-28
申请号：US11340676
申请日：2006-01-27
申请人： Man Sun Chan , Chen Xu , Wing Hung Ki
发明人： Man Sun Chan , Chen Xu , Wing Hung Ki
IPC分类号： H01L27/00 , H01J40/14
CPC分类号： H01L27/14632 , H01L27/14612 , H01L27/14643
摘要： An optical sensor has at least one pixel that generates an output voltage that changes at a rate dependent on the light intensity incident on the pixel. The time for the pixel output voltage to change from a first predefined level to a second predefined level is measured, so as to produce an output indicative of the incident light intensity.
摘要翻译：光学传感器具有产生以取决于入射在像素上的光强度的速率变化的输出电压的至少一个像素。测量像素输出电压从第一预定电平变为第二预定电平的时间，以产生表示入射光强度的输出。

4. 发明申请

US20080237447A1 ULTRA LOW VOLTAGE CMOS IMAGE SENSOR ARCHITECTURE 有权
标题翻译：超低电压CMOS图像传感器架构
公开(公告)号：US20080237447A1
公开(公告)日：2008-10-02
申请号：US12059402
申请日：2008-03-31
申请人： Man Sun Chan , Chen Xu , Wing Hung Ki
发明人： Man Sun Chan , Chen Xu , Wing Hung Ki
IPC分类号： H01L27/14
CPC分类号： H01L27/14632 , H01L27/14612 , H01L27/14643
摘要： An optical sensor has at least one pixel that generates an output voltage that changes at a rate dependent on the light intensity incident on the pixel. The time for the pixel output voltage to change from a first predefined level to a second predefined level is measured, so as to produce an output indicative of the incident light intensity.
摘要翻译：光学传感器具有产生以取决于入射在像素上的光强度的速率变化的输出电压的至少一个像素。测量像素输出电压从第一预定电平变为第二预定电平的时间，以产生表示入射光强度的输出。

5. 发明授权

US08405747B2 Analog row black level calibration for CMOS image sensor 有权
标题翻译： CMOS图像传感器的模拟行黑电平校准
公开(公告)号：US08405747B2
公开(公告)日：2013-03-26
申请号：US13029905
申请日：2011-02-17
申请人： Yaowu Mo , Chen Xu
发明人： Yaowu Mo , Chen Xu
IPC分类号： H04N9/64 , G03F3/08
CPC分类号： H04N5/361 , H04N5/3658 , H04N5/378
摘要： A CMOS image sensor includes an image pixel array, a dark pixel array, data bit liens, reference bit lines, a driver, comparators, and analog-to-digital converter (“ADC”) circuits. The image pixel array generates analog image signals in response to incident light. The dark pixel array generates analog black reference signals for analog black level calibration of the analog image signals. In one embodiment, the data bit lines each coupled to a different column of image pixels of the image pixel array and the reference bit lines each coupled to a different column of black reference pixels within the dark pixel array. The driver is coupled to the reference bit lines to drive an analog black reference signal. The comparators each couple to one of the data bit lines and each coupled to an output of the driver and offset the analog image signals with the analog black reference signals in an analog domain. The ADC circuits each coupled to an output of a comparator.
摘要翻译： CMOS图像传感器包括图像像素阵列，暗像素阵列，数据位留置，参考位线，驱动器，比较器和模数转换器（ADC）电路。图像像素阵列响应于入射光产生模拟图像信号。暗像素阵列产生用于模拟图像信号的模拟黑电平校准的模拟黑参考信号。在一个实施例中，每个耦合到图像像素阵列的不同列的图像像素的数据位线和每个耦合到暗像素阵列内的不同列的黑色参考像素的参考位线。驱动器耦合到参考位线以驱动模拟黑色参考信号。比较器每个耦合到数据位线中的一个，并且每个耦合到驱动器的输出，并且以模拟域中的模拟黑色参考信号偏移模拟图像信号。 ADC电路各自耦合到比较器的输出端。

6. 发明授权

US08390712B2 Image sensing pixels with feedback loops for imaging systems 有权
标题翻译：具有用于成像系统的反馈回路的图像感测像素
公开(公告)号：US08390712B2
公开(公告)日：2013-03-05
申请号：US12963525
申请日：2010-12-08
申请人： Chen Xu , Yaowu Mo
发明人： Chen Xu , Yaowu Mo
IPC分类号： H04N3/14 , H01L27/00
CPC分类号： H04N5/3745 , H01L27/14609
摘要： An imaging system may include an image sensor array formed from imaging pixels with feedback loops. Each imaging pixel may include an amplifier transistor that is controlled by a voltage on a floating diffusion node and may include a feedback transistor connected between the floating diffusion node and column readout circuitry. The amplifier transistor, together with a current source in the image sensor array, may form a common-source amplifier that inversely amplifies the voltage on the floating diffusion node and provides control signals to the feedback transistor. The common-source amplifier and the feedback transistor may create a feedback loop during image readout operations and during image reset operations that clamps the voltage on the floating diffusion node.
摘要翻译：成像系统可以包括由具有反馈回路的成像像素形成的图像传感器阵列。每个成像像素可以包括由浮动扩散节点上的电压控制的放大器晶体管，并且可以包括连接在浮动扩散节点和列读出电路之间的反馈晶体管。放大器晶体管与图像传感器阵列中的电流源一起可以形成公共源放大器，其反向放大浮动扩散节点上的电压并向反馈晶体管提供控制信号。共源放大器和反馈晶体管可以在图像读出操作期间和在将浮动扩散节点上的电压钳位的图像复位操作期间产生反馈回路。

7. 发明授权

US08349393B2 Silver plating in electronics manufacture 有权
公开(公告)号：US08349393B2
公开(公告)日：2013-01-08
申请号：US10902398
申请日：2004-07-29
申请人： Yung-Herng Yau , Thomas B. Richardson , Joseph A. Abys , Karl F. Wengenroth , Anthony Fiore , Chen Xu , Chonglun Fan , John Fudala
发明人： Yung-Herng Yau , Thomas B. Richardson , Joseph A. Abys , Karl F. Wengenroth , Anthony Fiore , Chen Xu , Chonglun Fan , John Fudala
IPC分类号： B05D5/00
CPC分类号： H05K1/09 , C09D1/00 , C23C18/16 , C23C18/1614 , C23C18/1616 , C23C18/1633 , C23C18/1683 , C23C18/1687 , C23C18/42 , C23C18/44 , C23C18/54 , C23C22/06 , C23C22/58 , C25D3/46 , C25D3/56 , C25D3/64 , H05K3/244 , H05K3/422 , H05K2203/0257 , H05K2203/073 , Y10S205/916
摘要： Compositions and methods for silver plating onto metal surfaces such as PWBs in electronics manufacture to produce a silver plating which is greater than 80 atomic % silver, tarnish resistant, and has good solderability.

8. 发明申请

US20120304136A1 Clock Tree Planning for an ASIC 有权
标题翻译：时钟树规划ASIC
公开(公告)号：US20120304136A1
公开(公告)日：2012-11-29
申请号：US13478272
申请日：2012-05-23
申请人： Liang Ge , Suoming Pu , Chen Xu , Bo Yu
发明人： Liang Ge , Suoming Pu , Chen Xu , Bo Yu
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F2217/62
摘要： The present invention discloses a method and system for clock tree planning for an ASIC, the method comprising: determining a netlist and a timing constraint file of the ASIC; creating a sequential device undirected graph for sequential devices in the netlist according to connection relationships of the sequential devices in the netlist and timing constraint relationships of the sequential devices in the timing constraint file; grouping the sequential devices in the netlist according to the sequential device undirected graph, such that the sequential devices in one group do not have a timing constraint relationship with the sequential devices in another group. The ASIC design method improved by using this method will reduce the design cycle from weeks to days, and enable designer to quickly plan the clock tree, thus reducing the design time and improving the design efficiency.
摘要翻译：本发明公开了一种用于ASIC的时钟树规划方法和系统，所述方法包括：确定所述ASIC的网表和定时约束文件; 根据网表中的顺序设备的连接关系和时序约束文件中的顺序设备的时序约束关系，为网表中的顺序设备创建顺序设备无向图; 根据顺序设备无向图对网表中的顺序设备进行分组，使得一组中的顺序设备不具有与另一组中的顺序设备的时序约束关系。通过使用这种方法改进的ASIC设计方法可以将设计周期从几周缩短到几天，使设计人员能够快速规划时钟树，从而缩短设计时间，提高设计效率。

9. 发明申请

US20120285834A1 COMPOSITE COATINGS FOR WHISKER REDUCTION 有权
标题翻译：复合涂料减少
公开(公告)号：US20120285834A1
公开(公告)日：2012-11-15
申请号：US13556522
申请日：2012-07-24
申请人： Joseph A. Abys , Jingye Li , Edward J. Kudrak, JR. , Chen Xu
发明人： Joseph A. Abys , Jingye Li , Edward J. Kudrak, JR. , Chen Xu
IPC分类号： C25D15/00
CPC分类号： C25D15/02 , C25D3/30 , H01R13/03
摘要： There is provided a method and composition for applying a wear resistant composite coating onto a metal surface of an electrical component. The method comprises contacting the metal surface with an electrolytic plating composition comprising (a) a source of tin ions and (b) non-metallic particles, and applying an external source of electrons to the electrolytic plating composition to thereby electrolytically deposit the composite coating onto the metal surface, wherein the composite coating comprises tin metal and the non-metallic particles.
摘要翻译：提供了一种将耐磨复合涂层施加到电气部件的金属表面上的方法和组合物。该方法包括使金属表面与包含（a）锡离子源和（b）非金属颗粒的电解电镀组合物接触，并将外部电子源施加到电解镀覆组合物，从而将复合涂层电解沉积到金属表面，其中复合涂层包括锡金属和非金属颗粒。

10. 发明申请

US20120212657A1 ANALOG ROW BLACK LEVEL CALIBRATION FOR CMOS IMAGE SENSOR 有权
标题翻译： CMOS图像传感器的模拟黑色水平校准
公开(公告)号：US20120212657A1
公开(公告)日：2012-08-23
申请号：US13029905
申请日：2011-02-17
申请人： Yaowu Mo , Chen Xu
发明人： Yaowu Mo , Chen Xu
IPC分类号： H04N5/335
CPC分类号： H04N5/361 , H04N5/3658 , H04N5/378
摘要： A CMOS image sensor includes an image pixel array, a dark pixel array, data bit liens, reference bit lines, a driver, comparators, and analog-to-digital converter (“ADC”) circuits. The image pixel array generates analog image signals in response to incident light. The dark pixel array generates analog black reference signals for analog black level calibration of the analog image signals. In one embodiment, the data bit lines each coupled to a different column of image pixels of the image pixel array and the reference bit lines each coupled to a different column of black reference pixels within the dark pixel array. The driver is coupled to the reference bit lines to drive an analog black reference signal. The comparators each couple to one of the data bit lines and each coupled to an output of the driver and offset the analog image signals with the analog black reference signals in an analog domain. The ADC circuits each coupled to an output of a comparator.
摘要翻译： CMOS图像传感器包括图像像素阵列，暗像素阵列，数据位留置，参考位线，驱动器，比较器和模数转换器（“ADC”）电路。图像像素阵列响应于入射光产生模拟图像信号。暗像素阵列产生用于模拟图像信号的模拟黑电平校准的模拟黑参考信号。在一个实施例中，每个耦合到图像像素阵列的不同列的图像像素的数据位线和每个耦合到暗像素阵列内的不同列的黑色参考像素的参考位线。驱动器耦合到参考位线以驱动模拟黑色参考信号。比较器每个耦合到数据位线中的一个，并且每个耦合到驱动器的输出，并且以模拟域中的模拟黑色参考信号偏移模拟图像信号。 ADC电路各自耦合到比较器的输出端。

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