会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • Temperature sensor
    • 温度感应器
    • US20050063120A1
    • 2005-03-24
    • US10668010
    • 2003-09-22
    • Manoj SinhaGlen Hush
    • Manoj SinhaGlen Hush
    • G01K7/01G01K15/00H02H5/04
    • G01K15/00G01K7/01
    • A temperature sensor is comprised of a device adapted to provide a first signal having a parameter responsive to temperature. A generator provides a reference signal having a parameter that is substantially consistent over a preselected temperature range. A comparator is electrically coupled to the device and the generator and is adapted to provide a second signal in response to the parameter of the first signal differing from the parameter of the reference signal. A digital filter is coupled to the comparator and is adapted to provide a third signal in response to receiving the second signal for a preselected duration of time.
    • 温度传感器包括适于提供具有响应于温度的参数的第一信号的装置。 发电机提供具有在预选温度范围内基本一致的参数的参考信号。 比较器电耦合到设备和发生器,并且适于响应于与参考信号的参数不同的第一信号的参数来提供第二信号。 数字滤波器耦合到比较器,并且适于提供第三信号以响应于在预选的持续时间内接收第二信号。
    • 9. 发明授权
    • Differential charge transfer sense amplifier
    • 差分电荷传输读出放大器
    • US06751141B1
    • 2004-06-15
    • US10305703
    • 2002-11-26
    • Atila AlvandpourManoj SinhaRam K. Krishnamurthy
    • Atila AlvandpourManoj SinhaRam K. Krishnamurthy
    • G11C702
    • G11C7/065G11C7/12
    • A sense amplifier for reading memory cells in a SRAM, the sense amplifier comprising two gate-biased pMOSFETs, each corresponding to a selected bitline. The gates of the two gate-biased pMOSFETs have their gates biased to a bias voltage, their sources coupled to the selected bitlines via column-select transistors, and their drains coupled via pass transistors to the two ports of two cross-coupled inverters, the cross-coupled inverters forming a latch. After a selected bitline pair has been pre-charged and the pre-charge phase ends, one of the two gate-biased pMOSFETs quickly goes into its subthreshold region as one of the bitlines discharges through its corresponding memory cell, thereby cutting off the bitline's capacitance from the sense amplifier. When the pass transistors are enabled, the other of the two pMOSFETs allows a significant bitline charge to transfer via its corresponding pass transistor to its corresponding port, whereas a relatively much smaller charge is transferred to the other port. This charge transfer scheme allows a differential voltage to quickly develop at the ports, thereby providing a fast latch and read operation with reduced power consumption. Bitline voltage swing may also be reduced to reduce power consumption.
    • 一种用于读取SRAM中的存储单元的读出放大器,读出放大器包括两个栅极偏置的pMOSFET,每个对应于选定的位线。 两个栅极偏置的pMOSFET的栅极将其栅极偏置到偏置电压,其源极通过列选择晶体管耦合到所选位线,并且其漏极通过传输晶体管耦合到两个交叉耦合的反相器的两个端口, 交叉耦合的逆变器形成锁存器。 在选择的位线对已被预充电并且预充电阶段结束之后,两个栅极偏置的pMOSFET中的一个快速进入其亚阈值区域,其中一个位线通过其相应的存储单元放电,从而切断位线的电容 从感测放大器。 当通过晶体管使能时,两个pMOSFET中的另一个允许显着的位线电荷通过其对应的传输晶体管传输到其相应的端口,而相对较小的电荷被传送到另一个端口。 该电荷转移方案允许在端口处快速产生差分电压,从而以降低的功率消耗提供快速锁存和读取操作。 位线电压摆幅也可以降低以降低功耗。