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1. 发明授权

US06790737B2 Method for fabricating thin metal layers from the liquid phase 失效
标题翻译：从液相制造薄金属层的方法
公开(公告)号：US06790737B2
公开(公告)日：2004-09-14
申请号：US10390872
申请日：2003-03-17
申请人： Manfred Schneegans , Wolfgang Jaeger , Michael Rogalli
发明人： Manfred Schneegans , Wolfgang Jaeger , Michael Rogalli
IPC分类号： H01L2120
CPC分类号： H01L27/1087 , H01L21/288
摘要： A method for producing metal layers on surfaces of semiconductor substrates includes the step of providing a semiconductor substrate having a surface. In this case, a precursor compound of a metal to be deposited is condensed out on the semiconductor surface and subsequently decomposed thermally. The method makes it possible to fill trenches with a high aspect ratio, it being possible to effectively suppress the formation of voids.
摘要翻译：在半导体衬底的表面上制造金属层的方法包括提供具有表面的半导体衬底的步骤。在这种情况下，要沉积的金属的前体化合物在半导体表面上冷凝，随后热分解。该方法使得可以以高纵横比填充沟槽，可以有效地抑制空隙的形成。

2. 发明授权

US06958256B2 Process for the back-surface grinding of wafers 失效
标题翻译：晶圆背面研磨工艺
公开(公告)号：US06958256B2
公开(公告)日：2005-10-25
申请号：US10696866
申请日：2003-10-30
申请人： Michael Rogalli , Manfred Schneegans
发明人： Michael Rogalli , Manfred Schneegans
IPC分类号： C09J7/02 , B24B7/22 , B24B41/06 , C09J11/06 , C09J133/00 , C09J163/00 , C09J167/00 , C09J171/00 , C09J175/04 , H01L20060101 , H01L21/00 , H01L21/30 , H01L21/302 , H01L21/304 , H01L21/461 , H01L21/58 , H01L21/68 , H01L21/78
CPC分类号： B24B7/228 , B24B41/06 , H01L21/304 , H01L21/6836 , H01L2221/68327
摘要： The present invention relates to a process for the back-surface grinding of wafers using films which have a support layer, which is known per se, and an adhesion layer which can be polymerized in steps, and to films which include such an adhesion layer which can be polymerized in steps, and to the use thereof.
摘要翻译：本发明涉及一种使用薄膜进行背面研磨的方法，所述薄膜具有本身已知的支撑层，以及可以分阶段聚合的粘合层，以及包括这种粘合层可以分阶段聚合，并使用它们。

3. 发明授权

US08709876B2 Electronic device 有权
标题翻译：电子设备
公开(公告)号：US08709876B2
公开(公告)日：2014-04-29
申请号：US13610268
申请日：2012-09-11
申请人： Manfred Schneegans , Holger Torwesten
发明人： Manfred Schneegans , Holger Torwesten
IPC分类号： H01L21/00
CPC分类号： H01L23/53238 , H01L24/03 , H01L2224/0361 , H01L2224/03912 , H01L2224/05655 , H01L2224/05664 , H01L2224/05669 , H01L2224/11906 , H01L2924/01005 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/05042 , H01L2924/19042 , H01L2924/00014
摘要： An electronic device is disclosed. In one embodiment, the electronic device includes a substrate, a plurality of conducting lines formed on a first conducting material that is disposed on the substrate, and a layer of a second conducting material disposed on the plurality of conducting lines. The conducting lines include a top face and a side face. The layer of the second conducting material includes a first thickness disposed on each of the top faces and a second thickness disposed on each of the side faces. To this end, the first thickness is greater than the second thickness.
摘要翻译：公开了一种电子设备。在一个实施例中，电子设备包括衬底，形成在设置在衬底上的第一导电材料上的多条导电线和设置在多条导线上的第二导电材料层。导线包括顶面和侧面。第二导电材料的层包括设置在每个顶面上的第一厚度和设置在每个侧面上的第二厚度。为此，第一厚度大于第二厚度。

4. 发明授权

US08156643B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08156643B2
公开(公告)日：2012-04-17
申请号：US13008928
申请日：2011-01-19
申请人： Manfred Schneegans , Markus Leicht , Stefan Woehlert , Edmund Riedl
发明人： Manfred Schneegans , Markus Leicht , Stefan Woehlert , Edmund Riedl
IPC分类号： H01L21/58
CPC分类号： H01L24/85 , H01L24/45 , H01L24/48 , H01L2224/05611 , H01L2224/37147 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45611 , H01L2224/45647 , H01L2224/48091 , H01L2224/48227 , H01L2224/4847 , H01L2224/48475 , H01L2224/48611 , H01L2224/48711 , H01L2224/48799 , H01L2224/85051 , H01L2224/85205 , H01L2224/85411 , H01L2224/85815 , H01L2224/85825 , H01L2924/00011 , H01L2924/01005 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/15747 , H01L2924/19042 , H01L2924/20751 , Y10T29/49144 , H01L2924/00014 , H01L2924/00 , H01L2224/48811 , H01L2924/013 , H01L2924/01006
摘要： A method of electrically interconnecting a semiconductor chip to another electronic device including providing a carrier including contact pins and a chip attached to the carrier, the chip having a copper contact pad that faces away from the carrier, extending a copper electrical connector between the contact pins and the contact pad, and diffusion soldering the copper electrical connector to the active area with a solder material including tin to form a solder connection including a contiguous bronze coating disposed between and in direct contact with both the copper electrical connector and the contact pad.
摘要翻译：一种将半导体芯片电连接到另一个电子设备的方法，包括提供包括接触引脚和附接到载体的芯片的载体，所述芯片具有背离载体的铜接触焊盘，在接触引脚之间延伸铜电连接器以及接触焊盘，并且使用包括锡的焊料材料将铜电连接器扩散焊接到有源区域，以形成包括布置在铜电连接器和接触焊盘两者之间并且与铜电连接器和接触焊盘两者直接接触的连续青铜镀层的焊料连接。

5. 发明申请

US20110269073A1 METHOD FOR APPLYING A RESIST LAYER, USES OF ADHESIVE MATERIALS, AND ADHESIVE MATERIALS AND RESIST LAYER 有权
标题翻译：耐腐蚀层的使用方法，粘合材料的使用以及粘合材料和耐腐蚀层
公开(公告)号：US20110269073A1
公开(公告)日：2011-11-03
申请号：US13178710
申请日：2011-07-08
申请人： Werner Krõninger , Manfred Schneegans
发明人： Werner Krõninger , Manfred Schneegans
IPC分类号： G03F7/004
CPC分类号： G03F7/32 , G03F7/16 , G03F7/161 , G03F7/34
摘要： A method in which a resist layer is applied to a base layer is disclosed. The resist layer includes an adhesive material, and the adhesive force of the adhesive material decreases or increases during an irradiation process. Residues of the resist layer may be stripped using the disclosed method.
摘要翻译：公开了将抗蚀剂层施加到基底层的方法。抗蚀剂层包括粘合剂材料，并且粘合剂材料的粘合力在照射过程中降低或增加。可以使用所公开的方法剥离抗蚀剂层的残留物。

6. 发明授权

US07911026B2 Chip carrier with reduced interference signal sensitivity 有权
标题翻译：具有降低干扰信号灵敏度的芯片载体
公开(公告)号：US07911026B2
公开(公告)日：2011-03-22
申请号：US11618172
申请日：2006-12-29
申请人： Florian Binder , Thomas Haneder , Judith Lehmann , Manfred Schneegans , Grit Sommer
发明人： Florian Binder , Thomas Haneder , Judith Lehmann , Manfred Schneegans , Grit Sommer
IPC分类号： H01L21/02
CPC分类号： H01L23/49827 , H01L23/50 , H01L23/66 , H01L2223/6616 , H01L2224/05026 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/0102 , H01L2924/09701 , H01L2924/15311 , H05K1/162 , H05K3/4602 , H01L2224/05599
摘要： Carrier including: a substrate having a first interface with first contact holes, and a second interface, which lies opposite the first interface, with second contact holes. The substrate includes a substrate body and electrically conductive contact channels formed therein, wherein each of the contact channels electrically conductively connects a first contact hole to a second contact hole. The carrier also includes a front-side wiring layer arranged on the first interface and; has a first front-side metallization layer formed therein such that it includes a first capacitor electrode for electrically connecting microelectronic devices and/or circuits to a first pole of a signal or supply voltage. The first capacitor electrode, at least partly via a capacitor dielectric formed in the carrier, couples capacitively to electrically conductive regions of a second front-side metallization layer and/or the substrate which at least partly form a second capacitor electrode for electrically connecting the microelectronic devices and/or circuits to a second pole of the signal or supply voltage.
摘要翻译：载体包括：具有与第一接触孔的第一界面的基底和与第一界面相对的第二界面与第二接触孔。基板包括基板主体和形成在其中的导电接触通道，其中每个接触通道将第一接触孔电连接到第二接触孔。载体还包括布置在第一界面上的前侧布线层，具有形成在其中的第一前侧金属化层，使得其包括用于将微电子器件和/或电路电连接到信号或电源电压的第一极的第一电容器电极。至少部分地经由形成在载体中的电容器电介质的第一电容器电极电容耦合到第二前侧金属化层和/或衬底的导电区域，该区域至少部分地形成第二电容器电极，用于电连接微电子设备和/或电路连接到信号或电源电压的第二极点。

7. 发明授权

US07674689B2 Method of making an integrated circuit including singulating a semiconductor wafer 有权
标题翻译：制造包括单片化半导体晶片的集成电路的方法
公开(公告)号：US07674689B2
公开(公告)日：2010-03-09
申请号：US11858437
申请日：2007-09-20
申请人： Manfred Schneegans , Werner Kroninger
发明人： Manfred Schneegans , Werner Kroninger
IPC分类号： H01L21/46
CPC分类号： H01L21/78
摘要： A method of making an integrated circuit includes providing a semiconductor wafer having a first surface and a second surface opposite the first surface, at least one of the first surface and the second surface including a metallization layer deposited onto the surface. The method additionally includes forming a first trench in the semiconductor wafer extending from one of the first surface and the second surface toward an other of the first surface and the second surface. The method further includes sawing a second trench in the other surface until the second trench communicates with the first trench, thus singulating the integrated circuit from the semiconductor wafer.
摘要翻译：制造集成电路的方法包括提供具有第一表面和与第一表面相对的第二表面的半导体晶片，第一表面和第二表面中的至少一个包括沉积在表面上的金属化层。该方法还包括在半导体晶片中形成从第一表面和第二表面中的一个向第一表面和第二表面中的另一个延伸的第一沟槽。该方法还包括锯切另一表面中的第二沟槽，直到第二沟槽与第一沟槽连通，从而从半导体晶片分离集成电路。

8. 发明申请

US20080305428A1 METHOD FOR APPLYING A RESIST LAYER, USES OF ADHESIVE MATERIALS, AND ADHESIVE MATERIALS AND RESIST LAYER 有权
标题翻译：耐腐蚀层的使用方法，粘合材料的使用以及粘合材料和耐腐蚀层
公开(公告)号：US20080305428A1
公开(公告)日：2008-12-11
申请号：US11943145
申请日：2007-11-20
申请人： Werner Kroninger , Manfred Schneegans
发明人： Werner Kroninger , Manfred Schneegans
IPC分类号： G03F7/11
CPC分类号： G03F7/32 , G03F7/16 , G03F7/161 , G03F7/34
摘要： A method in which a resist layer is applied to a base layer is disclosed. The resist layer includes an adhesive material, and the adhesive force of the adhesive material decreases or increases during an irradiation process. Residues of the resist layer may be stripped using the disclosed method.
摘要翻译：公开了将抗蚀剂层施加到基底层的方法。抗蚀剂层包括粘合剂材料，并且粘合剂材料的粘合力在照射过程中降低或增加。可以使用所公开的方法剥离抗蚀剂层的残留物。

9. 发明申请

US20060035458A1 Semiconductor element 审中-公开
标题翻译：半导体元件
公开(公告)号：US20060035458A1
公开(公告)日：2006-02-16
申请号：US11191150
申请日：2005-07-26
申请人： Peter Nelle , Renate Hofmann , Jorg Busch , Alfred Edtmair , Manfred Schneegans , Matthias Stecher
发明人： Peter Nelle , Renate Hofmann , Jorg Busch , Alfred Edtmair , Manfred Schneegans , Matthias Stecher
IPC分类号： H01L21/4763
CPC分类号： H01L21/76838 , H01L21/7685 , H01L23/3192 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53266 , H01L24/02 , H01L24/05 , H01L24/48 , H01L2224/04042 , H01L2224/05639 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/4847 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/04941 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The invention relates to a semiconductor component having a semiconductor body (1), to which a metallization (10), which is formed from metallization layers (11, 13, 15, 17) and separating layers (12, 14, 16, 18) arranged alternately in succession, a dielectric (2) and a molding compound (3) joined to the dielectric (2) are applied alternately in succession.
摘要翻译：本发明涉及具有半导体主体（1）的半导体部件，金属化层（10）由金属化层（11,13,15,17）和分离层（12,14,16,18）形成，交替地交替地交替地交替地施加与电介质（2）接合的电介质（2）和模塑料（3）。

10. 发明授权

US06919269B2 Production method for a semiconductor component 有权
标题翻译：半导体部件的制造方法
公开(公告)号：US06919269B2
公开(公告)日：2005-07-19
申请号：US10477620
申请日：2002-04-11
申请人： Manfred Schneegans , Wolfgang Jäger , Ulrike Bewersdorff-Sarlette , Stephan Wege
发明人： Manfred Schneegans , Wolfgang Jäger , Ulrike Bewersdorff-Sarlette , Stephan Wege
IPC分类号： H01L21/28 , H01L21/321 , H01L29/49 , H01L21/44
CPC分类号： H01L29/4933 , H01L21/28061 , H01L21/321
摘要： A method for fabricating a semiconductor component includes: deposition of a polysilicon layer on a substrate, deposition of a precursor layer on the polysilicon layer, and deposition of a protective layer on the precursor layer. A crystalline transformation occurs in the precursor layer at a first temperature to form an electrode layer. The layers are patterned to form an electrode stack, and the polysilicon layer is oxidized at a second temperature such that no crystalline transformation occurs in the electrode layer.
摘要翻译：一种用于制造半导体部件的方法包括：在衬底上沉积多晶硅层，在多晶硅层上沉积前体层，以及在前体层上沉积保护层。在第一温度下在前体层中发生结晶转变以形成电极层。图案化层以形成电极堆叠，并且多晶硅层在第二温度下被氧化，使得在电极层中不发生结晶转变。

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