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1. 发明申请

US20090206940A1 POLAR SIGNAL GENERATOR 有权
标题翻译：极信号发生器
公开(公告)号：US20090206940A1
公开(公告)日：2009-08-20
申请号：US12304310
申请日：2007-06-06
申请人： Manel Collados Asensio , Nenad Pavlovic , Vojkan Vidojkovic , Paulus T.M. Van Zeijl
发明人： Manel Collados Asensio , Nenad Pavlovic , Vojkan Vidojkovic , Paulus T.M. Van Zeijl
IPC分类号： H03C5/00
CPC分类号： H03C3/40 , H03C5/00
摘要： The present invention relates to a polar signal generator and method of deriving phase and amplitude components from in-phase (I) and quadrature-phase (Q) components of an input signal, wherein the I and Q components are generated at a first sampling frequency based on the input signal, and are then up-sampled in accordance with a predetermined first interpolation factor (N), to generate up-sampled I and Q components at a second sampling frequency higher than the first sampling frequency. The up-sampled I and Q components are converted into the phase and amplitude components, wherein the converting step is operated at the second sampling frequency. Moreover, the phase and amplitude components can be further up-sampled, optionally by different sampling frequencies, to a third and a fourth sampling frequency. Thereby, I-Q generation and cartesian-to-polar transformation can be performed at lower frequencies, which reduces power consumption.
摘要翻译：本发明涉及极性信号发生器和从输入信号的同相（I）和正交相（Q）分量中导出相位和幅度分量的方法，其中I和Q分量以第一采样频率基于输入信号，然后根据预定的第一内插因子（N）进行上采样，以在高于第一采样频率的第二采样频率产生上采样的I和Q分量。上采样的I和Q分量被转换成相位和幅度分量，其中转换步骤以第二采样频率运行。此外，相位和幅度分量可以进一步上采样，可选地由不同的采样频率上升到第三和第四采样频率。因此，可以以较低的频率执行I-Q生成和笛卡尔极坐标变换，这降低了功耗。

2. 发明授权

US08872596B2 Polar signal generator 有权
标题翻译：极地信号发生器
公开(公告)号：US08872596B2
公开(公告)日：2014-10-28
申请号：US12304310
申请日：2007-06-06
申请人： Manel Collados Asensio , Nenad Pavlovic , Vojkan Vidojkovic , Paulus T. M. Van Zeijl
发明人： Manel Collados Asensio , Nenad Pavlovic , Vojkan Vidojkovic , Paulus T. M. Van Zeijl
IPC分类号： H03C3/38 , H03C5/00 , H03C3/40
CPC分类号： H03C3/40 , H03C5/00
摘要： The present invention relates to a polar signal generator and method of deriving phase and amplitude components from in-phase (I) and quadrature-phase (Q) components of an input signal, wherein the I and Q components are generated at a first sampling frequency based on the input signal, and are then up-sampled in accordance with a predetermined first interpolation factor (N), to generate up-sampled I and Q components at a second sampling frequency higher than the first sampling frequency. The up-sampled I and Q components are converted into the phase and amplitude components, wherein the converting step is operated at the second sampling frequency. Moreover, the phase and amplitude components can be further up-sampled, optionally by different sampling frequencies, to a third and a fourth sampling frequency. Thereby, I-Q generation and cartesian-to-polar transformation can be performed at lower frequencies, which reduces power consumption.
摘要翻译：本发明涉及极性信号发生器和从输入信号的同相（I）和正交相（Q）分量中导出相位和幅度分量的方法，其中I和Q分量以第一采样频率基于输入信号，然后根据预定的第一内插因子（N）进行上采样，以在高于第一采样频率的第二采样频率产生上采样的I和Q分量。上采样的I和Q分量被转换成相位和幅度分量，其中转换步骤以第二采样频率运行。此外，相位和幅度分量可以进一步上采样，可选地由不同的采样频率上升到第三和第四采样频率。因此，可以以较低的频率执行I-Q生成和笛卡尔极坐标变换，这降低了功耗。

3. 发明授权

US08086189B2 Phase-to-frequency conversion for polar transmitters 有权
标题翻译：极性发射机的相对频率转换
公开(公告)号：US08086189B2
公开(公告)日：2011-12-27
申请号：US12374491
申请日：2007-06-19
申请人： Manel Collados Asensio , Nenad Pavlovic , Vojkan Vidojkovic , Paulus T. M. Van Zeijl
发明人： Manel Collados Asensio , Nenad Pavlovic , Vojkan Vidojkovic , Paulus T. M. Van Zeijl
IPC分类号： H04B1/02 , H04L27/00
CPC分类号： H04L27/361 , H03C5/00
摘要： The present invention relates to a polar transmission method and a polar transmitter for transmitting phase and amplitude components derived from in-phase (I) and quadrature-phase (Q) components of an input signal. A first conversion is provided for converting the in-phase (I) and quadrature-phase (Q) components into the phase and amplitude components at a first sampling rate. Additionally, a second conversion is provided for converting the phase component into a frequency component, wherein the second conversion comprises a rate conversion for converting the first sampling rate into a lower second sampling rate at which the frequency component is provided. Thereby, the second sampling rate can be used as a lower update rate in a digitally controlled oscillator in order to save power or because of speed limitations, while the surplus phase samples obtain due to the higher first sampling rate enable better approximation of the phase component after the digitally controlled oscillator. This better approximation accounts for a cleaner spectrum around the synthesized channel.
摘要翻译：本发明涉及一种用于发送从输入信号的同相（I）和正交相（Q）分量导出的相位和幅度分量的极性传输方法和极性发射器。提供了第一转换，用于以第一采样率将同相（I）和正交相（Q）分量转换成相位和幅度分量。另外，提供了将相位分量转换成频率分量的第二转换，其中第二转换包括用于将第一采样率转换成提供频率分量的较低第二采样率的速率转换。因此，为了节省功率或由于速度限制，第二采样率可以用作数字控制振荡器中的较低更新速率，而由于较高的第一采样率而获得的剩余相位采样使得能够更好地近似相位分量数字控制振荡器后。这个更好的近似解释了合成通道周围更清晰的频谱。

4. 发明授权

US08362932B2 Circuit with a time to digital converter and phase measuring method 有权
标题翻译：电路采用时间数字转换器和相位测量方法
公开(公告)号：US08362932B2
公开(公告)日：2013-01-29
申请号：US13000732
申请日：2009-06-30
申请人： Nenad Pavlovic , Manel Collados Asensio , Xin He , Jan Van Sinderen
发明人： Nenad Pavlovic , Manel Collados Asensio , Xin He , Jan Van Sinderen
IPC分类号： H03M1/48
CPC分类号： H03L7/085 , H03L7/091
摘要： Calibration data for calibrating time to digital conversion is obtained by switching a feed circuit of a time to digital converter between a normal operating mode or a calibration mode. A delay circuit with a delay circuit input and a plurality of taps outputs. A sampling register samples data from the data inputs. The feed circuit provides for selection of transitions of the oscillator signal that control timing of a first active transition at the clock circuit after a transition at the delay circuit input. A control circuit switches the feed circuit between normal operating mode and calibration mode, and controls the feed circuit successively to select a plurality of different transitions to control timing of the first active transition in the calibration mode. The control circuit reads out resulting data from the sampling register for each selection and determines calibration data for the oscillator signal from said data.
摘要翻译：用于校准数字转换时间的校准数据是通过在正常工作模式或校准模式之间切换时间到数字转换器的馈电电路而获得的。具有延迟电路输入和多个抽头输出的延迟电路。采样寄存器从数据输入端采样数据。馈电电路提供选择振荡器信号的转变，其在延迟电路输入的转变之后控制时钟电路处的第一有源跃迁的定时。控制电路在正常操作模式和校准模式之间切换供电电路，并且连续地控制馈电电路以选择多个不同的转变以控制校准模式中的第一主动转换的定时。控制电路从每个选择的采样寄存器读出结果数据，并根据所述数据确定振荡器信号的校准数据。

5. 发明申请

US20120019296A1 Circuit With a Time to Digital Converter and Phase Measuring Method 有权
标题翻译：具有数字转换器和相位测量方法的电路
公开(公告)号：US20120019296A1
公开(公告)日：2012-01-26
申请号：US13000732
申请日：2009-06-30
申请人： Nenad Pavlovic , Manel Collados Asensio , Xin He , Jan Van Sinderen
发明人： Nenad Pavlovic , Manel Collados Asensio , Xin He , Jan Van Sinderen
IPC分类号： H03L7/08
CPC分类号： H03L7/085 , H03L7/091
摘要： Calibration data for calibrating time to digital conversion is obtained by switching a feed circuit (20) of a time to digital converter between a normal operating mode or a calibration mode. A delay circuit (22) with a delay circuit input and a plurality of taps outputs respective, differently delayed versions of a signal from a delay circuit input. A sampling register (24) has data inputs coupled to the taps, and samples data from the data inputs in response to an active transition at a clock input. When in the normal operating mode, the feed circuit (2) feeds an oscillator signal of an oscillator circuit (10) to the delay circuit input and a reference signal to the clock input of the sampling register (24). When in the calibration mode, the feed circuit (20) supplies signals with transitions having timing controlled by the oscillator signal to both the delay circuit input and the clock input. The feed circuit (20) provides for selection of transitions of the oscillator signal that control timing of a first active transition at the clock circuit after a transition at the delay circuit input. A control circuit (28) switches the feed circuit between the normal operating mode and the calibration mode, and controls the feed circuit (20) successively to select a plurality of different transitions to control timing of the first active transition in the calibration mode. The control circuit reads out resulting data from the sampling register (24) for each selection and determine calibration data for the oscillator signal from said data.
摘要翻译：通过在正常操作模式或校准模式之间切换时间到数字转换器的馈电电路（20）来获得校准数字转换时间的校准数据。具有延迟电路输入和多个抽头的延迟电路（22）输出来自延迟电路输入的信号的相应不同延迟的版本。采样寄存器（24）具有耦合到抽头的数据输入，并响应于在时钟输入处的有源转换从数据输入端采样数据。当处于正常工作模式时，馈电电路（2）将振荡器电路（10）的振荡器信号馈送到延迟电路输入端，并将参考信号馈送到采样寄存器（24）的时钟输入端。当处于校准模式时，馈电电路（20）将具有由振荡器信号控制的定时的转换信号提供给延迟电路输入和时钟输入。馈电电路（20）提供选择振荡器信号的转换，该振荡器信号在延迟电路输入的转变之后控制时钟电路处的第一有源跃迁的定时。控制电路（28）在正常操作模式和校准模式之间切换供电电路，并且连续地控制馈电电路（20）以选择多个不同的转变以控制校准模式中的第一主动转换的定时。控制电路从每个选择的采样寄存器（24）中读出结果数据，并根据所述数据确定振荡器信号的校准数据。

6. 发明申请

US20110050344A1 OUTPUT STAGE FOR A DIGITAL RF TRANSMITTER, METHOD FOR PROVIDING AN RF OUTPUT SIGNAL IN A DIGITAL RF TRANSMITTER, AND DIGITAL RF TRANSMITTER 有权
标题翻译：用于数字RF发射机的输出级，用于在数字RF发射机中提供RF输出信号的方法和数字RF发射机
公开(公告)号：US20110050344A1
公开(公告)日：2011-03-03
申请号：US12921572
申请日：2009-03-09
申请人： Xin He , Manel Collados Asensio , Nenad Pavlovic , Jan Van Sinderen
发明人： Xin He , Manel Collados Asensio , Nenad Pavlovic , Jan Van Sinderen
IPC分类号： H03F3/26
CPC分类号： H04B1/0483
摘要： An output stage (1) for a digital RF transmitter is provided. The output stage comprises: an input adapted to receive an input signal (RFin, b7-b0) to be transmitted; a plurality N of power amplification sections (S1, S2, S3, S4); and an output (A, B) providing an output voltage signal. Each of the N power amplification sections (S1, S2, S3, S4) is arranged to receive the input signal (RFin, b7-b0) and comprises a transformer (T1, T2, T3, T4) adapted to provide a respective output signal. Each transformer comprises a primary stage and a secondary stage; the secondary stages of the transformers (T1, T2, T3, T4) of the N power amplification sections (S1, S2, S3, S4) are combined such that a combined output voltage signal of the output stage is provided. The N power amplification sections (S1, S2, S3, S4) are adapted such that the input signal (RFin, b7-b0) is latched by clock signals (clock1, clock2, clock3, clock4) comprising different phases.
摘要翻译：提供了一种用于数字RF发射器的输出级（1）。输出级包括：适于接收要发送的输入信号（RFin，b7-b0）的输入; 多个N个功率放大部分（S1，S2，S3，S4）; 以及提供输出电压信号的输出（A，B）。 N个功率放大部分（S1，S2，S3，S4）中的每一个被布置成接收输入信号（RFin，b7-b0），并且包括适于提供相应输出信号的变压器（T1，T2，T3，T4）。每个变压器包括初级和次级级; N个功率放大部（S1，S2，S3，S4）的变压器（T1，T2，T3，T4）的次级组合，从而提供输出级的组合输出电压信号。 N个功率放大部分（S1，S2，S3，S4）被适配成使得输入信号（RFin，b7-b0）被包括不同相位的时钟信号（clock1，clock2，clock3，clock4）锁存。

7. 发明授权

US08237503B2 Output stage for a digital RF transmitter, method for providing an RF output signal in a digital RF transmitter, and digital RF transmitter 有权
标题翻译：用于数字RF发射器的输出级，用于在数字RF发射器中提供RF输出信号的方法以及数字RF发射器
公开(公告)号：US08237503B2
公开(公告)日：2012-08-07
申请号：US12921572
申请日：2009-03-09
申请人： Xin He , Manel Collados Asensio , Nenad Pavlovic , Jan Van Sinderen
发明人： Xin He , Manel Collados Asensio , Nenad Pavlovic , Jan Van Sinderen
IPC分类号： H03F3/26
CPC分类号： H04B1/0483
摘要： An output stage (1) for a digital RF transmitter is provided. The output stage comprises: an input adapted to receive an input signal (RFin, b7-b0) to be transmitted; a plurality N of power amplification sections (S1, S2, S3, S4); and an output (A, B) providing an output voltage signal. Each of the N power amplification sections (S1, S2, S3, S4) is arranged to receive the input signal (RFin, b7-b0) and comprises a transformer (T1, T2, T3, T4) adapted to provide a respective output signal. Each transformer comprises a primary stage and a secondary stage; the secondary stages of the transformers (T1, T2, T3, T4) of the N power amplification sections (S1, S2, S3, S4) are combined such that a combined output voltage signal of the output stage is provided. The N power amplification sections (S1, S2, S3, S4) are adapted such that the input signal (RFin, b7-b0) is latched by clock signals (clock1, clock2, clock3, clock4) comprising different phases.
摘要翻译：提供了一种用于数字RF发射器的输出级（1）。输出级包括：适于接收要发送的输入信号（RFin，b7-b0）的输入; 多个N个功率放大部分（S1，S2，S3，S4）; 以及提供输出电压信号的输出（A，B）。 N个功率放大部分（S1，S2，S3，S4）中的每一个被布置成接收输入信号（RFin，b7-b0），并且包括适于提供相应输出信号的变压器（T1，T2，T3，T4）。每个变压器包括初级和次级级; N个功率放大部（S1，S2，S3，S4）的变压器（T1，T2，T3，T4）的次级组合，从而提供输出级的组合输出电压信号。 N个功率放大部分（S1，S2，S3，S4）被适配成使得输入信号（RFin，b7-b0）被包括不同相位的时钟信号（clock1，clock2，clock3，clock4）锁存。

8. 发明授权

US08961010B2 C-arm x-ray system and method of compensation for C-arm deformations and oscillations 有权
标题翻译： C臂X射线系统和C臂变形和振荡的补偿方法
公开(公告)号：US08961010B2
公开(公告)日：2015-02-24
申请号：US13761970
申请日：2013-02-07
申请人： Michael Meyer , Nenad Pavlovic
发明人： Michael Meyer , Nenad Pavlovic
IPC分类号： H05G1/02 , A61B6/00
CPC分类号： H05G1/02 , A61B6/4441 , A61B6/4458 , A61B6/547 , A61B6/588
摘要： An x-ray system having a C-arm 1 and an associated method are provided. The x-ray system includes at least one adjustment unit for at least one component of the x-ray system that is actively connected to the C-arm. The at least one adjustment unit compensates for a spatial change in position of the component caused by deformation and/or oscillation of the C-arm.
摘要翻译：提供具有C臂1和相关方法的X射线系统。 x射线系统包括用于X射线系统的至少一个部件的至少一个调节单元，其主动地连接到C形臂。所述至少一个调整单元补偿由所述C形臂的变形和/或振荡引起的所述部件的位置的空间变化。

9. 发明授权

US08472620B2 Generation of device dependent RSA key 失效
标题翻译：生成与设备有关的RSA密钥
公开(公告)号：US08472620B2
公开(公告)日：2013-06-25
申请号：US11763564
申请日：2007-06-15
申请人： Nenad Pavlovic
发明人： Nenad Pavlovic
IPC分类号： H04L9/08 , H04L9/12
CPC分类号： H04L9/302 , H04L2209/80 , H04W12/04
摘要： A portable electronic device for exchanging encrypted data with other electronic devices includes a processor, a memory operatively coupled to the processor, and a prime number generation circuit operatively coupled to the processor and memory. The prime number generation circuit includes logic that generates at least two prime numbers based on unique data stored in the electronic device, wherein said at least two prime numbers are always the same at least two prime numbers. The generated prime numbers then can be used to generate RSA public and private keys within the electronic device.
摘要翻译：用于与其他电子设备交换加密数据的便携式电子设备包括处理器，可操作地耦合到处理器的存储器和可操作地耦合到处理器和存储器的素数生成电路。质数产生电路包括基于存储在电子设备中的唯一数据生成至少两个素数的逻辑，其中所述至少两个素数总是至少两个素数相同。所产生的素数然后可以用于在电子设备内生成RSA公钥和私钥。

10. 发明申请

US20110261914A1 Digital Modulator 有权
标题翻译：数字调制器
公开(公告)号：US20110261914A1
公开(公告)日：2011-10-27
申请号：US13001894
申请日：2009-07-01
申请人： Xin He , Jan Van Sinderen , Manuel Collados Asensio , Nenad Pavlovic
发明人： Xin He , Jan Van Sinderen , Manuel Collados Asensio , Nenad Pavlovic
IPC分类号： H04L7/00
CPC分类号： H03C5/00
摘要： The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.
摘要翻译：本申请涉及一种数字调制器，其包括包括多个单元阵列的输出级和采样级。本申请还涉及包括所述数字调制器，数字调制方法和计算机程序产品的通信设备。更具体地，数字调制器包括包括多个单元阵列的输出级，其中输出级包括被配置为接收载波频率信号的至少一个载波频率信号输入端。数字调制器包括可连接到输出级的采样级，其中采样级被配置为对至少一个数据输入信号进行过采样。数字调制器包括至少一个采样时钟产生装置，其被配置为根据排列的单元阵列的数量和载波频率信号产生至少一个采样时钟信号。

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