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1. 发明申请

US20110037173A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110037173A1
公开(公告)日：2011-02-17
申请号：US12913308
申请日：2010-10-27
申请人： Manabu OHNISHI , Koji TAKEMURA , Noriyuki NAGAI , Hoyeun HUH , Tomoyuki NAKAYAMA , Atsushi DOI
发明人： Manabu OHNISHI , Koji TAKEMURA , Noriyuki NAGAI , Hoyeun HUH , Tomoyuki NAKAYAMA , Atsushi DOI
IPC分类号： H01L23/48
CPC分类号： H01L24/06 , H01L23/3114 , H01L23/50 , H01L2224/0401 , H01L2224/05552 , H01L2224/05555 , H01L2224/06153 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/3011 , H01L2924/00012
摘要： Input/output cells are formed so as to be peripherally arranged adjacent to a corner cell on a surface of a semiconductor chip, and electrode pads are formed on the respective input/output cells. The electrode pads are configured in a zigzag pad arrangement so as to form inner and outer pad arrays. However, of the electrode pads forming the inner pad array, those electrode pads in predetermined areas adjacent to the two sides of the corner cell are not disposed, such that an interconnect pattern of a carrier which is bump-bonded to the semiconductor chip and vias are prevented from becoming complex.
摘要翻译：形成输入/输出单元以便在半导体芯片的表面上与角单元相邻地周边布置，并且在相应的输入/输出单元上形成电极焊盘。电极焊盘被配置成Z字形排列，以形成内部和外部焊盘阵列。然而，在形成内焊盘阵列的电极焊盘中，与角电池两侧相邻的预定区域中的那些电极焊盘没有布置，使得凸起接合到半导体芯片的载体的互连图案和通孔被阻止变得复杂。

2. 发明申请

US20090108446A1 ELECTRODE STRUCTURE FOR SEMICONDUCTOR CHIP 有权
标题翻译：半导体芯片的电极结构
公开(公告)号：US20090108446A1
公开(公告)日：2009-04-30
申请号：US12239119
申请日：2008-09-26
申请人： Noriyuki NAGAI
发明人： Noriyuki NAGAI
IPC分类号： H01L23/48
CPC分类号： H01L24/11 , H01L2224/05001 , H01L2224/05022 , H01L2224/051 , H01L2224/05571 , H01L2224/05572 , H01L2224/05655 , H01L2224/05666 , H01L2224/05684 , H01L2224/13021 , H01L2224/13099 , H01L2224/16 , H01L2924/01015 , H01L2924/01022 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/014 , H01L2924/00014
摘要： The bump electrode 100 of the present invention has a structure in which dummy metals 111 are provided in the uppermost layer portion of a silicon 101 between a pad-form wiring metal 102 and a wiring metal 103 such that an edge of each dummy metal and an edge of the barrier metal 107 are not aligned in a line, and a lot of interfaces are formed between the dummy metals 111 and an interlayer film 140, and therefore expansion of a crack generated due to bump stress concentrated on the under-edge portion 109 below the barrier metal 107 between the pad-form wiring metal 102 and the wiring metal 103 is suppressed.
摘要翻译：本发明的突起电极100具有如下结构：在垫形布线金属102和布线金属103之间的硅101的最上层部分设置有虚拟金属111，使得每个虚拟金属和阻挡金属107的边缘不对齐，并且在虚拟金属111和中间膜140之间形成许多界面，因此由于凸起应力而产生的裂纹扩大集中在下边缘部分109上在垫形布线金属102与布线金属103之间的阻挡金属107的下方被抑制。

3. 发明申请

US20080195767A1 PROCESSING RESPONDING DEVICE, PROCESSING REQUESTING DEVICE AND THEIR METHODS 有权
标题翻译：处理响应设备，处理请求设备及其方法
公开(公告)号：US20080195767A1
公开(公告)日：2008-08-14
申请号：US12020160
申请日：2008-01-25
申请人： Noriyuki NAGAI , Hideaki OGATA
发明人： Noriyuki NAGAI , Hideaki OGATA
IPC分类号： G06F3/00
CPC分类号： H04L41/0213 , G06F3/1293 , H04L69/08
摘要： A user PC 20 prepares a retrieve request by storing a SNMP command and a predetermined processing execution condition into a retrieve request of a SLP and transmits and outputs the prepared retrieve request to a printer 40 and others by multicast. Receiving the retrieve request, the printer 40 obtains and executes the SNMP command stored in the retrieve request of the SLP and processes a response to the retrieve request when the execution result meets the processing execution condition. Thus, the SNMP command is executed by receiving the retrieve request of the SLP and the response to the retrieve request of the SLP is processed corresponding to the execution result, it is not necessary to separately transmit or to obtain the request process of the SLP and the retrieve request of the SNMP through the network and the execution result of the SNMP command may be reflected to the process of the SLP.
摘要翻译：用户PC20通过将SNMP命令和预定的处理执行条件存储到SLP的检索请求中来准备检索请求，并通过多播向打印机40等发送并输出准备的检索请求。接收到检索请求，打印机40获取并执行存储在SLP的检索请求中的SNMP命令，并且当执行结果满足处理执行条件时处理对检索请求的响应。因此，通过接收SLP的检索请求来执行SNMP命令，并且对应于执行结果对SLP的检索请求的响应进行处理，不需要分开地发送或获得SLP的请求处理， SNMP通过网络的检索请求和SNMP命令的执行结果可以反映到SLP的过程中。

4. 发明申请

US20110316153A1 SEMICONDUCTOR DEVICE AND PACKAGE INCLUDING THE SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件和包含半导体器件的封装
公开(公告)号：US20110316153A1
公开(公告)日：2011-12-29
申请号：US13224552
申请日：2011-09-02
申请人： Noriyuki NAGAI , Kiyomi Hagihara
发明人： Noriyuki NAGAI , Kiyomi Hagihara
IPC分类号： H01L23/48
CPC分类号： H01L24/03 , H01L23/3157 , H01L23/3192 , H01L24/05 , H01L24/13 , H01L2224/02125 , H01L2224/0215 , H01L2224/03462 , H01L2224/0401 , H01L2224/05011 , H01L2224/05012 , H01L2224/05013 , H01L2224/05018 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05551 , H01L2224/05552 , H01L2224/05557 , H01L2224/05564 , H01L2224/05569 , H01L2224/05655 , H01L2224/13023 , H01L2224/131 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/014 , H01L2924/30105 , H01L2924/3512 , H01L2924/00014 , H01L2924/05042 , H01L2224/13099 , H01L2224/05099 , H01L2224/13599 , H01L2224/05599 , H01L2224/29099 , H01L2224/29599 , H01L2924/00012
摘要： A semiconductor device includes a semiconductor substrate 1, an interlayer insulating film 2, 3 formed on the semiconductor substrate 1, an electrode pad 4 formed on the interlayer insulating film 2, 3, a protective film 6 which is formed on the interlayer insulating film 2, 3 to cover a peripheral portion of the electrode pad 4, and has a first opening 5 which exposes a center portion of the electrode pad 4, a divider 7 which is formed on the electrode pad 4 exposed from the first opening 5, and divides the first opening 5 into a plurality of second openings 5d, and a barrier metal 8 formed on the protective film 6 to fill the second openings 5d. The divider 7 is interposed between the electrode pad 4 and the barrier metal 8.
摘要翻译：半导体器件包括半导体衬底1，形成在半导体衬底1上的层间绝缘膜2,3，形成在层间绝缘膜2,3上的电极焊盘4，形成在层间绝缘膜2上的保护膜6 ，3覆盖电极焊盘4的周边部分，并且具有暴露电极焊盘4的中心部分的第一开口5，形成在从第一开口5露出的电极焊盘4上的分隔件7，形成多个第二开口5d的第一开口5和形成在保护膜6上以填充第二开口5d的阻挡金属8。分隔器7介于电极焊盘4和阻挡金属8之间。

5. 发明申请

US20100148812A1 SEMICONDUCTOR DEVICE INCLUDING CHIP 有权
标题翻译：半导体器件，包括芯片
公开(公告)号：US20100148812A1
公开(公告)日：2010-06-17
申请号：US12711829
申请日：2010-02-24
申请人： Noriyuki NAGAI , Takatoshi Osumi
发明人： Noriyuki NAGAI , Takatoshi Osumi
IPC分类号： G01R31/02
CPC分类号： H01L21/563 , G01R31/2884 , H01L22/32 , H01L24/06 , H01L24/13 , H01L24/14 , H01L2224/0401 , H01L2224/05012 , H01L2224/05014 , H01L2224/05022 , H01L2224/05124 , H01L2224/05572 , H01L2224/05655 , H01L2224/0603 , H01L2224/06051 , H01L2224/06135 , H01L2224/06155 , H01L2224/06177 , H01L2224/06179 , H01L2224/06515 , H01L2224/131 , H01L2224/13144 , H01L2224/1403 , H01L2224/14135 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81801 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/351 , H01L2924/00014 , H01L2924/01014 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device in which a chip 10 is mounted on a board, includes: a pad group A provided on the chip 10 and electrically connected to an internal circuit in the chip 10; and a test pad pattern B provided on a region of the chip 10 except for a region of the chip 10 where the pad group A is provided. The pad group A includes: pads 12a formed on a principal surface of the chip 10; bumps 16a respectively formed on the pads 12a with a barrier metal layer interposed therebetween, and electrically connected to the board. The test pad pattern B includes: test pads 12b formed on the principal surface of the chip 10; test bumps 16b respectively formed on the test pads 12b with a test barrier metal layer interposed therebetween, and interconnects 11b electrically connecting adjacent ones of the test pads 12b.
摘要翻译：其中芯片10安装在板上的半导体器件包括：设置在芯片10上并电连接到芯片10中的内部电路的焊盘组A. 以及设置在除了设置有焊盘组A的芯片10的区域之外的芯片10的区域上的测试焊盘图案B. 焊盘组A包括：形成在芯片10的主表面上的焊盘12a; 分别形成在焊盘12a上的阻挡金属层之间的突起16a，并且电连接到电路板。测试垫图案B包括：形成在芯片10的主表面上的测试焊盘12b; 分别形成在测试焊盘12b上的测试凸块16b和介于其间的测试阻挡金属层，以及电连接相邻的测试焊盘12b的互连11b。

6. 发明申请

US20090289357A1 SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE USING THE SAME 审中-公开
标题翻译：使用相同的半导体元件和半导体器件
公开(公告)号：US20090289357A1
公开(公告)日：2009-11-26
申请号：US12365542
申请日：2009-02-04
申请人： Hiroaki FUJIMOTO , Noriyuki NAGAI , Tadaaki MIMURA
发明人： Hiroaki FUJIMOTO , Noriyuki NAGAI , Tadaaki MIMURA
IPC分类号： H01L23/498
CPC分类号： H01L23/49838 , H01L23/544 , H01L24/05 , H01L24/06 , H01L24/16 , H01L24/48 , H01L24/49 , H01L2223/54426 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05552 , H01L2224/05554 , H01L2224/05556 , H01L2224/0603 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48105 , H01L2224/48225 , H01L2224/48227 , H01L2224/48229 , H01L2224/48463 , H01L2224/49179 , H01L2224/73204 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/10162 , H01L2924/14 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor element includes: a substrate having an integrated circuit; and a wire connection electrode and a bump connection electrode which are provided on a same main surface of the substrate as electrodes having a same connection function to the integrated circuit. The wire connection electrode is provided in a periphery of the main surface. The bump connection electrode is provided inside the wire connection electrode on the main surface. When a straight line dividing the main surface into two regions is determined, the wire connection electrode and the bump connection electrode are located opposite to each other with respect to the straight line.
摘要翻译：半导体元件包括：具有集成电路的基板; 以及与该集成电路具有相同连接功能的电极设置在与基板相同的主表面上的导线连接电极和凸块连接电极。线连接电极设置在主表面的周边。凸起连接电极设置在主表面上的导线连接电极的内部。当确定将主表面分成两个区域的直线时，导线连接电极和凸块连接电极相对于直线彼此相对。

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