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1. 发明授权

US6032237A Non-volatile memory, memory card and information processing apparatus using the same and method for software write protect control of non-volatile memory 失效
标题翻译：非易失性存储器，存储卡和信息处理设备使用相同的方法和软件写保护非易失性存储器的控制
公开(公告)号：US6032237A
公开(公告)日：2000-02-29
申请号：US100326
申请日：1998-06-19
申请人： Manabu Inoue , Takao Okubo , Shigeru Kadowaki , Satoru Nakanishi , Masamichi Kishi , Shigeru Suzuki , Yasuro Kubota , Hironori Iwasaki
发明人： Manabu Inoue , Takao Okubo , Shigeru Kadowaki , Satoru Nakanishi , Masamichi Kishi , Shigeru Suzuki , Yasuro Kubota , Hironori Iwasaki
IPC分类号： G06F12/14 , G06F21/02 , G11C8/20 , G11C16/02 , G11C16/22 , G11C17/00 , G06F12/16
CPC分类号： G06F12/1441 , G11C16/22 , G11C8/20
摘要： A non-volatile memory, such as a flash memory card, using a rewritable non-volatile memory is provided with an improved write-protect arrangement. The non-volatile memory includes a collectively electrically erasable and writable memory (e.g., a flash memory), a reset IC for generating a power-on reset signal upon turn-on of the power supply, and a card controller for performing control between each flash memory device and a memory card interface. The flash memory is set with a write protect save register written with an address of an area desired to be subjected to write protect, the write protect save register belonging to an attribute area, and a protect range is set from the system. Since the address to be write-protected is itself written in the non-volatile flash memory, the address will continue to be stored, even if the power is turned off. A method for software write protection control is also provided.
摘要翻译：使用可重写非易失性存储器的诸如闪存卡的非易失性存储器具有改进的写保护装置。非易失性存储器包括集体电可擦除和可写存储器（例如，闪速存储器），用于在电源接通时产生上电复位信号的复位IC，以及用于在每个闪存设备和存储卡接口。闪存设置有写保护存储寄存器，写保护寄存器具有希望进行写保护的区域的地址，属于属性区的写保护存储寄存器和保护范围从系统设置。由于要写保护的地址本身被写入非易失性闪存，所以即使电源关闭，地址也将继续存储。还提供了一种用于软件写保护控制的方法。

2. 发明授权

US5845332A Non-volatile memory, memory card and information processing apparatus using the same and method for software write protect control of non-volatile memory 失效
公开(公告)号：US5845332A
公开(公告)日：1998-12-01
申请号：US510074
申请日：1995-08-01
申请人： Manabu Inoue , Takao Okubo , Shigeru Kadowaki , Satoru Nakanishi , Masamichi Kishi , Shigeru Suzuki , Yasuro Kubota , Hironori Iwasaki
发明人： Manabu Inoue , Takao Okubo , Shigeru Kadowaki , Satoru Nakanishi , Masamichi Kishi , Shigeru Suzuki , Yasuro Kubota , Hironori Iwasaki
IPC分类号： G06F12/14 , G06F21/02 , G11C8/20 , G11C16/02 , G11C16/22 , G11C17/00 , G06F12/16
CPC分类号： G06F12/1441 , G11C16/22 , G11C8/20
摘要： A non-volatile memory, such as a flash memory card, using a rewritable non-volatile memory is provided with an improved write-protect arrangement. The non-volatile memory includes a collectively electrically erasable and writable memory (e.g., a flash memory), a reset IC for generating a power-on reset signal upon turn-on of the power supply, and a card controller for performing control between each flash memory device and a memory card interface. The flash memory is set with a write protect save register written with an address of an area desired to be subjected to write protect, the write protect save register belonging to an attribute area, and a protect range is set from the system. Since the address to be write-protected is itself written in the non-volatile flash memory, the address will continue to be stored, even if the power is turned off. A method for software write protection control is also provided.

3. 发明授权

US06275436B1 Flash memory control method and apparatus processing system therewith 有权
公开(公告)号：US06275436B1
公开(公告)日：2001-08-14
申请号：US09577371
申请日：2000-05-23
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
IPC分类号： G11C800
CPC分类号： G11C29/765 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G11C29/789 , G11C29/82
摘要： A control method and system when a flash memory is used. as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address. The control section is responsive to the interface information, the first management information, and the second management information for controlling input/output of data from/to the external system and for temporarily storing write data into the first nonvolatile memory from the external system in the volatile memory and then transferring the write data from the volatile memory to the first nonvolatile memory. The consecutive address generation means and the sector address storage means output the physical sector address and the consecutively generated addresses to the first nonvolatile memory and the volatile memory when data at the physical sector address is output from the first nonvolatile memory or when data at the physical sector address is input to the volatile memory.

4. 发明授权

US5973964A Flash memory control method and information processing system therewith 有权
公开(公告)号：US5973964A
公开(公告)日：1999-10-26
申请号：US182630
申请日：1998-10-30
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
IPC分类号： G06F3/06 , G06F11/14 , G06F12/08 , G11C29/00 , G11C7/00
CPC分类号： G11C29/765 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G11C29/789 , G11C29/82 , G06F2003/0694 , G06F2212/2022 , G06F2212/312
摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller has a control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.

5. 发明授权

US5862083A Information processing system 失效
标题翻译：信息处理系统
公开(公告)号：US5862083A
公开(公告)日：1999-01-19
申请号：US640998
申请日：1996-04-30
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
IPC分类号： G06F3/06 , G06F11/14 , G06F12/08 , G11C29/00 , G11C16/06
CPC分类号： G11C29/765 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G11C29/789 , G11C29/82 , G06F2003/0694 , G06F2212/2022 , G06F2212/312
摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.
摘要翻译：当闪存用作信息处理系统中的半导体盘或主存储器时的控制方法和系统。半导体文件系统包括电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制存储器的控制器和控制控制器的控制部分，其中对应于由访问一个外部系统。第一非易失性存储器存储用于执行操作的外部系统的数据，指示存储数据的物理地址与逻辑地址之间的对应关系的第一管理信息，以及指示第一非易失性存储器的状态的第二管理信息。第二非易失性存储器预先存储从外部系统输入和输出数据所需的接口信息以及数据的只读数据。控制器包括控制装置，用于当数据从第一非易失性存储器输出时或当数据被输入到易失性存储器时，确定形成物理地址的预定高位的物理扇区地址，存储确定的物理扇区地址的装置，以及用于连续地产生由物理扇区地址确定的扇区中的地址的装置。

6. 发明授权

US06421279B1 Flash memory control method and apparatus processing system therewith 有权
标题翻译：闪存控制方法和装置处理系统
公开(公告)号：US06421279B1
公开(公告)日：2002-07-16
申请号：US09927493
申请日：2001-08-13
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
IPC分类号： G11C800
CPC分类号： G11C29/765 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G11C29/789 , G11C29/82
摘要： A semiconductor file system features a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating correspondence between physical and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information. The controller determines a physical sector address. The control section is for controlling input/output of data from/to the external system and for temporarily storing write data into the first nonvolatile memory from the external system in the volatile memory and then transferring the write data from the volatile memory to the first nonvolatile memory.
摘要翻译：半导体文件系统具有电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制器和控制部分，其控制控制器，其中对应于从外部系统指定的逻辑地址的物理地址是访问。第一非易失性存储器存储用于执行操作的外部系统的数据，指示物理和逻辑地址之间的对应关系的第一管理信息以及指示第一非易失性存储器的状态的第二管理信息。第二非易失性存储器先前存储接口信息。控制器确定物理扇区地址。控制部分用于控制来自/外部系统的数据的输入/输出，并用于从易失性存储器中的外部系统暂时将写数据存储到第一非易失性存储器中，然后将写入数据从易失性存储器传送到第一非易失性存储器记忆。

7. 发明授权

US6078520A Flash memory control method and information processing system therewith 有权
标题翻译：闪存控制方法和信息处理系统
公开(公告)号：US6078520A
公开(公告)日：2000-06-20
申请号：US357931
申请日：1999-07-21
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
IPC分类号： G06F11/14 , G06F12/08 , G11C29/00 , G11C17/00
CPC分类号： G11C29/765 , G06F11/1433 , G06F12/08 , G06F12/0802 , G06F12/0866 , G11C29/789 , G11C29/82 , G06F2212/2022 , G06F2212/312
摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller has a control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.
摘要翻译：当闪存用作信息处理系统中的半导体盘或主存储器时的控制方法和系统。半导体文件系统包括电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制存储器的控制器和控制控制器的控制部分，其中对应于由访问一个外部系统。第一非易失性存储器存储用于执行操作的外部系统的数据，指示存储数据的物理地址与逻辑地址之间的对应关系的第一管理信息，以及指示第一非易失性存储器的状态的第二管理信息。第二非易失性存储器预先存储从外部系统输入和输出数据所需的接口信息以及数据的只读数据。控制器具有控制装置，用于当数据从第一非易失性存储器输出时或当数据被输入到易失性存储器时，确定形成物理地址的预定高位的物理扇区地址，用于存储确定的物理扇区地址的装置，以及用于在由所述物理扇区地址确定的扇区中连续生成地址的装置。

8. 发明授权

US5530673A Flash memory control method and information processing system therewith 失效
标题翻译：闪存控制方法和信息处理系统
公开(公告)号：US5530673A
公开(公告)日：1996-06-25
申请号：US225313
申请日：1994-04-08
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
IPC分类号： G06F3/06 , G06F11/14 , G06F12/08 , G11C29/00 , G11C16/06 , G06F12/16
CPC分类号： G11C29/765 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G11C29/789 , G11C29/82 , G06F2003/0694 , G06F2212/2022 , G06F2212/312
摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.
摘要翻译：当闪存用作信息处理系统中的半导体盘或主存储器时的控制方法和系统。半导体文件系统包括电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制存储器的控制器和控制控制器的控制部分，其中对应于由访问一个外部系统。第一非易失性存储器存储用于执行操作的外部系统的数据，指示存储数据的物理地址与逻辑地址之间的对应关系的第一管理信息，以及指示第一非易失性存储器的状态的第二管理信息。第二非易失性存储器预先存储从外部系统输入和输出数据所需的接口信息以及数据的只读数据。控制器包括控制装置，用于当数据从第一非易失性存储器输出时或当数据被输入到易失性存储器时，确定形成物理地址的预定高位的物理扇区地址，存储确定的物理扇区地址的装置，以及用于连续地产生由物理扇区地址确定的扇区中的地址的装置。

9. 发明授权

US06477671B2 Semiconductor memory, memory device, and memory card 失效
标题翻译：半导体存储器，存储器件和存储卡
公开(公告)号：US06477671B2
公开(公告)日：2002-11-05
申请号：US09845350
申请日：2001-05-01
申请人： Masashi Wada , Takao Okubo , Takeshi Furuno
发明人： Masashi Wada , Takao Okubo , Takeshi Furuno
IPC分类号： G11C2900
CPC分类号： G11C29/70 , G11C29/88
摘要： A semiconductor memory (1) comprising a plurality of memory blocks (2 and 3) provided with a lot of memory cells, a data input/output buffer (7), and first control means (11) for controlling the rewriting and reading of data for the memory cells is provided with first storage means (30) for designating part of the defective memory blocks and detection means (32) for detecting the access to a defective memory block designated by the first storage means in accordance with an address signal. In this case, when the detection means detects the access to a defective memory, the first control means inhibits the data rewrite operation for the instruction of the data rewrite operation and inhibits the data output operation of the data input/output buffer for the instruction of the data read operation. The inhibiting function makes it possible to provide a memory device having the compatibility with a non-defective semiconductor memory only by combining semiconductor memories having irremediable defects without fixing the levels of specific address input terminals so as to keep the defective memory blocks non-selective.
摘要翻译：一种半导体存储器（1），包括设置有大量存储单元的多个存储块（2和3），数据输入/输出缓冲器（7）和用于控制数据的重写和读取的第一控制装置（11）为存储单元设置有用于指定部分缺陷存储块的第一存储装置（30）和用于根据地址信号检测由第一存储装置指定的缺陷存储块的存取的检测装置（32）。在这种情况下，当检测装置检测到对缺陷存储器的访问时，第一控制装置禁止用于数据重写操作的指令的数据重写操作，并且禁止数据输入/输出缓冲器的数据输出操作用于指令数据读取操作。禁止功能使得可以仅通过组合具有不可弥补缺陷的半导体存储器来提供具有与无缺陷半导体存储器的兼容性的存储器件，而不固定特定地址输入端子的电平，以便保持有缺陷的存储块非选择性。

10. 发明授权

US5440718A Single semiconductor substrate RAM device utilizing data compressing/expanding mechanism in a multi-microprocessor environment 失效
标题翻译：在多微处理器环境中利用数据压缩/扩展机制的单个半导体衬底RAM器件
公开(公告)号：US5440718A
公开(公告)日：1995-08-08
申请号：US308848
申请日：1994-09-19
申请人： Takehiko Kumagai , Takashi Kikuchi , Takao Okubo , Yasuyuki Fuse
发明人： Takehiko Kumagai , Takashi Kikuchi , Takao Okubo , Yasuyuki Fuse
IPC分类号： G11C11/41 , G11C7/10 , G11C11/40 , G11C11/401 , G06F12/00
CPC分类号： G11C7/1006
摘要： Compressor/expander circuits which are built in a common semiconductor substrate along with a random access memory unit function so as to realize compression/expansion processes merely through the internal data transfer controls between the circuits and the random access memory unit as based on built-in control unit. This endows the temporary storage of data and the compression/expansion processes hereof with continuities, and achieves higher speeds for the compression/expansion processes.
摘要翻译：内置在公共半导体衬底中的随机存取存储器单元的压缩器/扩展器电路仅通过内部数据传送控制来实现压缩/扩展处理，这些控制基于内置的电路和随机存取存储器单元控制单元这使得数据的临时存储和其压缩/扩展过程具有连续性，并且为压缩/扩展过程实现更高的速度。

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