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1. 发明授权

US07208988B2 Clock generator 失效
标题翻译：时钟发生器
公开(公告)号：US07208988B2
公开(公告)日：2007-04-24
申请号：US10684704
申请日：2003-10-15
申请人： Makoto Murata , Yoko Nomaguchi , Shizuka Yokoi
发明人： Makoto Murata , Yoko Nomaguchi , Shizuka Yokoi
IPC分类号： H03L7/06
CPC分类号： G06F1/08 , H03L7/0812 , H03L7/0891
摘要： The clock generator of this invention saves a buffer memory for the data transfer interface, which has conventionally been required, when using a spectrum spread clock in circuits and devices inside a system. The clock generator can easily be applied as the operational clock in a system, and enhances the performance of the system. In the clock generator, the variable delay circuit controls the phase of the reference clock generated by an oscillator. The delay setting circuit is able to vary the setting of the control voltage to the variable delay circuit at each clock cycle, and modulates the phase of the reference clock. The phase modulation means of the delay setting circuit fluctuates the cycle of the output modulation clock to thereby spread the spectrum. Also, the delay setting circuit detects the output states (edges of the clock) of delay elements of the variable delay circuit, and confines the phase difference of the reference clock and the modulated clock within a specified range (for example, half the cycle of the reference clock). Thereby, the clock generator guarantees a certain extent of synchronization in the spectrum spread clock.
摘要翻译：当在系统内的电路和设备中使用频谱扩展时钟时，本发明的时钟发生器保存了传统上需要的数据传输接口的缓冲存储器。时钟发生器可以轻松地应用于系统中的操作时钟，并提高系统的性能。在时钟发生器中，可变延迟电路控制由振荡器产生的参考时钟的相位。延迟设置电路能够在每个时钟周期改变控制电压对可变延迟电路的设置，并调制参考时钟的相位。延迟设定电路的相位调制装置使输出调制时钟的周期波动，从而扩展频谱。此外，延迟设置电路检测可变延迟电路的延迟元件的输出状态（时钟的边沿），并将参考时钟和调制时钟的相位差限制在指定范围内（例如，参考时钟）。因此，时钟发生器在频谱扩展时钟中保证一定程度的同步。

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