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    • 6. 发明申请
    • Back-pressure valve and actuation system
    • 背压阀和致动系统
    • US20050193887A1
    • 2005-09-08
    • US11070076
    • 2005-03-02
    • Takashi KoizumiToshio Kamimura
    • Takashi KoizumiToshio Kamimura
    • B64C13/16F15B11/028F16K17/04F16K31/122F01B1/00
    • F16K31/1226
    • A back-pressure valve comprising a case through which oil passes and in the interior of which a first oil chamber and a second oil chamber are defined, a piston slidably accommodated within the case so as to partition the first oil chamber and the second oil chamber, a spring and a spring which urge the piston in a sliding direction thereof, and a projecting member and a check valve which allow the first oil chamber to communicate with the second oil chamber when the pressure of the oil in the first fluid chamber reaches a predetermined pressure, wherein an area of the piston on which oil pressure is received in the first oil chamber is made lager than an area thereof on which oil pressure is received in the second oil chamber, and wherein part of the piston which is located at an end thereof which is opposite to the other end thereof which faces the first oil chamber is made to communicate with the outside of the case.
    • 一种背压阀,包括油通过的壳体,并且其内部限定有第一油室和第二油室;活塞,其可滑动地容纳在所述壳体内,以将所述第一油室和所述第二油室 ,弹簧和弹簧,其沿滑动方向推动活塞;以及突出构件和止回阀,当第一流体室中的油的压力达到第一油室时,允许第一油室与第二油室连通 预定压力,其中在第一油室中接收油压的活塞的面积比在第二油室中容纳油压的区域大一点,并且其中位于 使其与面对第一油室的另一端相对的端部与壳体的外部连通。
    • 10. 发明授权
    • System with enhanced execution of address-conflicting instructions using
immediate data latch for holding immediate data of a preceding
instruction
    • 系统具有使用立即数据锁存器的地址冲突指令的执行,用于保存先前指令的立即数据
    • US5276822A
    • 1994-01-04
    • US612731
    • 1990-11-14
    • Hidetsugu MaekawaTakashi Koizumi
    • Hidetsugu MaekawaTakashi Koizumi
    • G06F9/38G06F9/26G06F9/28
    • G06F9/30167G06F9/3824
    • An information processor includes an immediate data latch and a pair of multiplexers in an input portion of an adder in a data address generator. The structure controls operation of the multiplexer in accordance with a register conflict detecting control signal and eliminates an idle state of a pipeline by detecting a register conflict between a register for holding immediate data, indicated by a precedent instruction instructing a specific register to store the immediate data, and a register used for calculation of memory addresses to be used for execution of a succeeding load/store instruction. The immediate data latch directly latches an immediate data indicated by the precedent instruction and outputted by an instruction decoding portion. Then, if the register conflict detecting portion detects the register conflict, the immediate data latched by the immediate data latch is used for calculation of memory addresses. This control operation is performed by changing the multiplexer according to the register conflict control signal to input the data from the immediate data latch to the adder.
    • 信息处理器在数据地址发生器中的加法器的输入部分中包括立即数据锁存器和一对多路复用器。 结构根据寄存器冲突检测控制信号控制多路复用器的操作,并且通过检测用于保存即时数据的寄存器之间的寄存器冲突消除流水线的空闲状态,由指示特定寄存器的先前指令指示以存储立即数 数据和用于计算用于执行后续加载/存储指令的存储器地址的寄存器。 立即数据锁存器直接锁存由先前指令指示并由指令解码部分输出的立即数据。 然后,如果寄存器冲突检测部分检测到寄存器冲突,则立即数据锁存器锁存的立即数据被用于计算存储器地址。 该控制操作通过根据寄存器冲突控制信号改变多路复用器来输入从立即数据锁存器到加法器的数据来执行。