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1. 发明授权

US06590286B2 Land grid array semiconductor device 失效
标题翻译：陆格阵列半导体器件
公开(公告)号：US06590286B2
公开(公告)日：2003-07-08
申请号：US09983127
申请日：2001-10-23
申请人： Makio Okada , Yasushi Kasatani , Tomoaki Hashimoto
发明人： Makio Okada , Yasushi Kasatani , Tomoaki Hashimoto
IPC分类号： H01L2348
CPC分类号： H01L24/13 , H01L23/49811 , H01L24/14 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05001 , H01L2224/05022 , H01L2224/05023 , H01L2224/05568 , H01L2224/13016 , H01L2224/13099 , H01L2224/16 , H01L2224/81136 , H01L2224/81193 , H01L2224/8121 , H01L2224/81815 , H01L2924/01004 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H05K1/111 , H05K3/321 , H05K3/3436 , H05K2201/0367 , H05K2201/0949 , H05K2201/09745 , H05K2201/09781 , H05K2203/0465 , H05K2203/048 , Y02P70/613 , H01L2224/05644 , H01L2924/00014 , H01L2224/05655 , H01L2224/05147
摘要： A land grid array semiconductor device provides greater positioning accuracy for an external electrode with respect to a mounting substrate. External electrodes are arranged on one surface of a substrate in area array. The external electrode includes an external electrode pad and an external electrode interconnection. Each external electrode pad includes a first pad layer having a cylindrical shape and a second pad layer covering the surface of the first pad layer and having a conical shape.
摘要翻译：陆地阵列半导体器件相对于安装基板为外部电极提供更大的定位精度。外部电极以区域阵列布置在基板的一个表面上。外部电极包括外部电极焊盘和外部电极互连。每个外部电极焊盘包括具有圆柱形状的第一焊盘层和覆盖第一焊盘层的表面并且具有圆锥形状的第二焊盘层。

2. 发明授权

US5363274A Memory card 失效
标题翻译：存储卡
公开(公告)号：US5363274A
公开(公告)日：1994-11-08
申请号：US836712
申请日：1992-02-19
申请人： Makoto Omori , Jun Ohbuchi , Hajime Maeda , Yasushi Kasatani
发明人： Makoto Omori , Jun Ohbuchi , Hajime Maeda , Yasushi Kasatani
IPC分类号： B42D15/10 , G06K19/077 , H05K1/02 , H05K1/05 , H05K1/09 , H05K1/14 , H05K3/34
CPC分类号： H05K1/0256 , G06K19/077 , H05K1/05 , H05K1/144 , H05K1/09 , H05K2201/10522 , H05K3/3421
摘要： A memory card having no ordinary type circuit board and a reduced thickness. Insulating layers are disposed on reverse surfaces of a pair of metallic panels, and circuit patterns are formed on the insulating layers. A plurality of electronic parts are mounted on the metallic panels by, for example, being soldered to the circuit patterns. The pair of metallic panels on which the electronic parts are mounted are fitted and bonded to openings formed in a frame of the card so that the electronic parts are accommodated inside the frame facing each other.
摘要翻译：不具有普通型电路板和减小厚度的存储卡。绝缘层设置在一对金属板的反面上，电路图案形成在绝缘层上。通过例如焊接到电路图案，将多个电子部件安装在金属板上。安装有电子部件的一对金属板被安装并结合到形成在卡的框架中的开口，使得电子部件容纳在彼此面对的框架内。

3. 发明授权

US06798056B2 Semiconductor module having an upper layer semiconductor package overlying a lower layer semiconductor package 失效
标题翻译：半导体模块具有覆盖在下层半导体封装上的上层半导体封装
公开(公告)号：US06798056B2
公开(公告)日：2004-09-28
申请号：US10231148
申请日：2002-08-30
申请人： Tetsuya Matsuura , Yasushi Kasatani , Kazunari Michii
发明人： Tetsuya Matsuura , Yasushi Kasatani , Kazunari Michii
IPC分类号： H01L2302
CPC分类号： H05K1/181 , H01L25/105 , H01L2225/1005 , H01L2225/1029 , H01L2225/107 , H01L2924/0002 , H05K7/026 , H05K2201/10515 , H05K2201/10689 , Y02P70/611 , H01L2924/00
摘要： A semiconductor module includes a substrate having a pad electrode on a surface, a lower layer semiconductor package mounted on the substrate, and an upper layer semiconductor package mounted on the substrate while arranged in a position substantially overlying the former. The pad electrodes connected to the leads of these semiconductor packages are arranged alternately. The lead has a dambar residual portion. An inner surface of a lead downward portion of the upper layer semiconductor package is positioned outside an outer surface of a lead downward portion of the lower layer semiconductor package.
摘要翻译：半导体模块包括：表面上具有焊盘电极的基板，安装在基板上的下层半导体封装，以及安装在基板上的上层半导体封装，同时布置在基本上覆盖前者的位置。连接到这些半导体封装的引线的焊盘电极交替布置。铅带有残渣部分。上层半导体封装的引线向下部分的内表面位于下层半导体封装的引线向下部分的外表面的外侧。

4. 发明授权

US06717275B2 Semiconductor module 失效
标题翻译：半导体模块
公开(公告)号：US06717275B2
公开(公告)日：2004-04-06
申请号：US10134427
申请日：2002-04-30
申请人： Tetsuya Matsuura , Yasushi Kasatani , Tadashi Ichimasa
发明人： Tetsuya Matsuura , Yasushi Kasatani , Tadashi Ichimasa
IPC分类号： H01L2348
CPC分类号： H05K1/147 , H01L23/5387 , H01L25/105 , H01L2225/1005 , H01L2225/1029 , H01L2225/107 , H01L2924/0002 , H05K1/141 , H05K1/189 , H01L2924/00
摘要： A plurality of substrates are stacked on top of each other. A flexible cable serially connects the substrates. Semiconductor packages are mounted on the surfaces of the substrates. An adhesive material bonds adjoining semiconductor packages and holds the semiconductor packages in place with respect to each other. The bottommost substrate is provided with external leads by which the semiconductor module is mounted on the motherboard.
摘要翻译：多个基板堆叠在彼此的顶部。柔性电缆串联连接基板。半导体封装安装在基板的表面上。粘合剂材料结合邻接的半导体封装并将半导体封装相对于彼此保持在适当的位置。最底层设置有外部引线，半导体模块通过该引线安装在母板上。

5. 发明授权

US5306541A Printed circuit board and terminal board with staggered conductive pads 失效
标题翻译：印刷电路板和带交错导电垫的端子板
公开(公告)号：US5306541A
公开(公告)日：1994-04-26
申请号：US5865
申请日：1993-01-15
申请人： Yasushi Kasatani
发明人： Yasushi Kasatani
IPC分类号： H05K1/11 , H05K1/14 , H05K3/34 , H05K3/36 , B32B23/02
CPC分类号： H05K1/141 , H05K1/117 , H05K2201/049 , H05K2201/09709 , H05K2201/10719 , H05K3/3436 , H05K3/368 , Y10S428/901 , Y10T428/24777 , Y10T428/24802 , Y10T428/24917 , Y10T428/24926 , Y10T428/31678
摘要： A printed circuit board has a staggered array of mounting pads on a surface thereof for supporting a terminal board. A solder material is provided on the staggered array and then a terminal board having a corresponding array of pads is placed on the printed circuit board. The solder material is heated and then cooled, whereby the terminal board is fixed to the printed circuit board without causing an electric short between pads.
摘要翻译：印刷电路板在其表面上具有交错阵列的安装焊盘，用于支撑端子板。在交错阵列上提供焊料，然后在印刷电路板上放置具有对应的焊盘阵列的端子板。焊料材料被加热然后冷却，由此端子板固定到印刷电路板上，而不会在焊盘之间引起电短路。

6. 发明授权

US06617695B1 Semiconductor device and semiconductor module using the same 有权
标题翻译：半导体器件和使用其的半导体模块
公开(公告)号：US06617695B1
公开(公告)日：2003-09-09
申请号：US09704699
申请日：2000-11-03
申请人： Yasushi Kasatani
发明人： Yasushi Kasatani
IPC分类号： H01L2940
CPC分类号： H01L23/49816 , H01L25/105 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2225/1023 , H01L2225/1058 , H01L2225/107 , H01L2924/15311 , H01L2924/1532 , H05K1/141 , H05K1/182 , H05K3/3436 , H05K2201/0949 , H05K2201/09709 , H05K2201/09781 , H05K2201/10734 , H05K2203/1572
摘要： Lands for mounting are located on the upper and lower surfaces of a substrate. External electrodes are exposed at a rear surface of a package body. An IC package is mounted by bonding the lands for mounting to the external electrodes. Lands for external connection are connected to the lands for mounting. The lands for external connection are located outside of the IC package. Solder bumps are connected to one side of the lands for external mounting. Thus, a semiconductor device for a semiconductor module is provided.
摘要翻译：用于安装的地面位于基板的上表面和下表面上。外部电极在封装主体的后表面露出。通过将用于安装的焊盘接合到外部电极来安装IC封装。用于外部连接的地面连接到用于安装的土地。用于外部连接的焊盘位于IC封装外部。焊接凸块连接到焊盘的一侧用于外部安装。因此，提供了一种用于半导体模块的半导体器件。

7. 发明授权

US4868714A IC card including enclosed sliding shutter 失效
标题翻译： IC卡包括封闭滑动快门
公开(公告)号：US4868714A
公开(公告)日：1989-09-19
申请号：US175195
申请日：1988-03-30
申请人： Toshinobu Banjo , Yasuhiro Murasawa , Shigeo Onoda , Yasushi Kasatani
发明人： Toshinobu Banjo , Yasuhiro Murasawa , Shigeo Onoda , Yasushi Kasatani
IPC分类号： B42D15/02 , B42D15/10 , G06K19/07 , G06K19/077 , G11C5/00 , H01R13/453
CPC分类号： H01R13/4534 , G06K19/077
摘要： An IC card having a package in which a semiconductor device is accommodated, a plurality of electrode terminals disposed on a surface of the package near the front end thereof in the direction in which the IC card is inserted into a connector in an external device, a shutter supported on the surface of a front portion of the package for exposing and covering the electrode terminals, the shutter having a width smaller than that of the package as measured in the direction perpendicular to the direction of insertion into the connector, a pair of guide projections formed on the shutter at both-sides thereof to extend into the package, the guide projections functioning to open the shutter by abutting against a pair of shutter receiving pins disposed in the insertion hole of the connector when the package is inserted into the connector, and a pair of guide grooves adapted to guide the guide projections, the guide grooves being formed in both sides of the front portion of the surface of the package to be within the side surfaces thereof, the guide grooves extending from the front side of the package in the insertion direction thereof.
摘要翻译：具有容纳半导体装置的封装的IC卡，在IC卡插入到外部装置的连接器的方向上，在其前端附近设置在封装体的表面附近的多个电极端子，支撑在封装的前部表面上的遮光板用于曝光和覆盖电极端子，该遮板的宽度小于在垂直于插入连接器的方向的方向上测量的包装的宽度;一对导向件突起形成在挡板的两侧以延伸到包装中，引导突起用于当包装被插入连接器时通过抵靠设置在连接器的插入孔中的一对挡板接收销来打开闸门，以及适于引导引导突起的一对引导槽，所述引导槽形成在所述p的表面的前部的两侧所述引导槽沿着所述封装的插入方向从所述封装的前侧延伸。

8. 发明授权

US4864116A Mechanism for connecting an IC card to an external device 失效
标题翻译：将IC卡连接到外部设备的机制
公开(公告)号：US4864116A
公开(公告)日：1989-09-05
申请号：US166362
申请日：1988-03-10
申请人： Toshinobu Banjo , Tetsuya Ueda , Shigeo Onoda , Yasushi Kasatani
发明人： Toshinobu Banjo , Tetsuya Ueda , Shigeo Onoda , Yasushi Kasatani
IPC分类号： G06K7/00 , G06K7/015 , G06K7/06 , G06K19/07 , H01R13/64 , H01R13/642
CPC分类号： G06K7/0047 , H01R12/721 , H01R12/7005 , H01R13/64 , H01R2107/00 , H01R24/62
摘要： A mechanism for connecting an IC card and an external device to each other, having: a plurality of electrode terminals formed on a package of the IC card incorporating a semiconductor device and used to connect the semiconductor device to the external device; at least one engagement recess and/or engagement projection formed on the package of the IC card; and a connector provided in the external device. This connector is provided with an insertion hole, a plurality of electrode-contacting pieces disposed in the insertion hole and capable of contacting the plurality of electrode terminals of the IC card when the IC card is inserted into the connector, and at least one engagement projection and/or engagement recess formed inside the insertion hole and capable of engaging the engagement recess and/or engagement projection formed on the package to enable a particular type of the IC card to be inserted into the connector.
摘要翻译：一种用于将IC卡和外部设备彼此连接的机构，具有：多个电极端子，形成在包含半导体器件的IC卡的封装上，用于将半导体器件连接到外部设备; 形成在所述IC卡的封装上的至少一个接合凹部和/或接合突起; 以及设置在外部设备中的连接器。该连接器设置有插入孔，多个电极接触片设置在插入孔中，并且当IC卡插入到连接器中时能够接触IC卡的多个电极端子，并且至少一个接合突起和/或接合凹槽，其形成在插入孔内部并且能够接合形成在包装上的接合凹部和/或接合突起，以使特定类型的IC卡能够插入到连接器中。

9. 发明授权

US06861370B1 Bump formation method 失效
标题翻译：凹凸形成法
公开(公告)号：US06861370B1
公开(公告)日：2005-03-01
申请号：US10149651
申请日：2000-10-23
申请人： Yasushi Kasatani
发明人： Yasushi Kasatani
IPC分类号： H01L21/60 , H01L23/485 , H01L21/302
CPC分类号： H01L24/13 , H01L24/11 , H01L2224/05001 , H01L2224/05023 , H01L2224/05124 , H01L2224/05155 , H01L2224/05166 , H01L2224/05568 , H01L2224/05644 , H01L2224/1147 , H01L2224/1308 , H01L2224/13084 , H01L2224/131 , H01L2224/13144 , H01L2224/13155 , H01L2224/13166 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/00014 , H01L2224/13099
摘要： A bump formation method and a bump formation apparatus can be gained wherein the reliability of a semiconductor device is enhanced by removing satellites that may be generated by a solder jet-type nozzle. This bump formation method is a method forming a bump on an electrode pad (2) provided on a work piece (1) by using a nozzle (21) of a solder jet system that discharges a molten solder drop (8) and is provided with the coating layer formation step of forming a coating layer (3, 5, 6, 7) having a portion that temporarily protects the work piece (1), the solder drop discharging step of discharging a molten solder drop (8) from the nozzle (21) toward the electrode pad (2) after the coating layer formation step and the coating layer removal step of removing the coating layer (3, 5, 6, 7) in the region other than the region beneath the solder drop formed in the solder drop discharging step.
摘要翻译：可以获得凸起形成方法和凸点形成装置，其中通过去除可由焊料喷射型喷嘴产生的卫星来增强半导体器件的可靠性。这种凸块形成方法是通过使用喷射系统的喷嘴（21），在设置在工件（1）上的电极焊盘（2）上形成凸块的方法，其喷射熔融焊料滴（8）并且设置有所述涂层形成步骤形成具有临时保护所述工件（1）的部分的涂层（3,5,6,7），从所述喷嘴排出熔融焊料滴（8）的所述焊料滴放电步骤（ 21）在涂层形成步骤之后朝向电极焊盘（2）移除涂层去除步骤，除去在焊料中形成的焊料下方的区域以外的区域中的涂层（3,5,6,7）放电步骤。

10. 发明授权

US06670701B2 Semiconductor module and electronic component 失效
标题翻译：半导体模块和电子元件
公开(公告)号：US06670701B2
公开(公告)日：2003-12-30
申请号：US10000031
申请日：2001-12-04
申请人： Tetsuya Matsuura , Yasushi Kasatani , Kazunari Michii , Hajime Maeda
发明人： Tetsuya Matsuura , Yasushi Kasatani , Kazunari Michii , Hajime Maeda
IPC分类号： H01L2302
CPC分类号： H05K1/141 , H01L25/105 , H01L2225/06551 , H01L2225/06555 , H01L2225/06572 , H01L2225/1005 , H01L2225/1029 , H01L2225/107 , H01L2924/15311 , H05K1/144 , H05K1/145 , H05K1/182 , H05K1/183 , H05K3/3436 , H05K2201/045 , H05K2201/049 , H05K2201/09036 , H05K2201/10303 , H05K2201/10378 , H05K2201/10386 , H05K2201/10515 , H05K2201/10689 , H05K2203/1572
摘要： A semiconductor module achieving higher density of the semiconductor module itself as well as of being disposed in an area-efficient manner relative to another electronic component, such as a mother board and the like. The semiconductor module includes a mounting substrate having, on an underside, a solder ball for connecting to an interconnection of a mother board and semiconductor packages mounted in multiple layers on the top side of the mounting substrate and connected to electrodes on the mounting substrate.
摘要翻译：实现半导体模块本身的更高密度以及相对于诸如母板等的其他电子部件以区域有效的方式设置的半导体模块。该半导体模块包括安装基板，其在下侧具有用于连接到母板和安装在安装基板的顶侧上的多层的半导体封装的互连的焊球，并连接到安装基板上的电极。

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