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1. 发明授权

US09064955B2 Split-gate lateral diffused metal oxide semiconductor device 有权
标题翻译：分流栅横向扩散金属氧化物半导体器件
公开(公告)号：US09064955B2
公开(公告)日：2015-06-23
申请号：US14076877
申请日：2013-11-11
申请人： MACRONIX INTERNATIONAL CO., LTD.
发明人： Chien-Wen Chu , Wing-Chor Chan , Shyi-Yuan Wu
IPC分类号： H01L29/78 , H01L29/40 , H01L29/423 , H01L29/06 , H01L29/08
CPC分类号： H01L29/7816 , H01L29/0634 , H01L29/0847 , H01L29/0878 , H01L29/402 , H01L29/404 , H01L29/42368 , H01L29/42376 , H01L29/7835 , H01L29/7838
摘要： A semiconductor device includes a source region, a drain region, and a drift region between the source and drain regions. A split gate is disposed over a portion of the drift region, and between the source and drain regions. The split gate includes first and second gate electrodes separated by a gate oxide layer. A self-aligned RESURF region is disposed within the drift region between the gate and the drain region. PI gate structures including an upper polysilicon layer are disposed near the drain region, such that the upper polysilicon layer can serve as a hard mask for the formation of the double RESURF structure, thereby allowing for self-alignment of the double RESURF structure.
摘要翻译：半导体器件包括源极区域，漏极区域和源极区域与漏极区域之间的漂移区域。分离栅极设置在漂移区域的一部分上，并且在源极和漏极区域之间。分离栅极包括由栅极氧化物层隔开的第一和第二栅电极。自对准RESURF区域设置在栅极和漏极区域之间的漂移区域内。包括上多晶硅层的PI栅极结构设置在漏极区附近，使得上多晶硅层可以用作形成双RESURF结构的硬掩模，从而允许双RESURF结构的自对准。

2. 发明授权

US09691874B2 Manufacturing method of semiconductor structure 有权
公开(公告)号：US09691874B2
公开(公告)日：2017-06-27
申请号：US14641502
申请日：2015-03-09
申请人： MACRONIX INTERNATIONAL CO., LTD.
发明人： Chih-Ling Hung , Chien-Wen Chu , Hsin-Liang Chen , Wing-Chor Chan
IPC分类号： H01L29/66 , H01L29/735 , H01L29/08 , H01L29/10 , H01L29/40
CPC分类号： H01L29/6625 , H01L29/0808 , H01L29/1008 , H01L29/404 , H01L29/735
摘要： A manufacturing method of a semiconductor structure provides a substrate. A well having a first conductive type and a well having a second conductive type are formed in the substrate, respectively. A body region is formed in the well having the second conductive type. A first doped region and a second doped region are formed in the well having the first conductive type and the body region respectively. The first and second doped regions have same polarities, and a dopant concentration of the second doped region is higher than that of the first doped region. A third doped region is formed in the well having the second conductive type and between the first and second doped regions. The third and first doped regions have reverse polarities. A first field plate is formed on a surface region between the second and third doped regions.

3. 发明申请

US20150179754A1 MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE 有权
标题翻译：半导体结构的制造方法
公开(公告)号：US20150179754A1
公开(公告)日：2015-06-25
申请号：US14641502
申请日：2015-03-09
申请人： MACRONIX INTERNATIONAL CO., LTD.
发明人： Chih-Ling Hung , Chien-Wen Chu , Hsin-Liang Chen , Wing-Chor Chan
IPC分类号： H01L29/66 , H01L29/40
CPC分类号： H01L29/6625 , H01L29/0808 , H01L29/1008 , H01L29/404 , H01L29/735
摘要： A semiconductor structure includes a substrate, a first well having a first conductive type, a second well having a second conductive type, a body region, a first doped region, a second doped region, a third doped region and a field plate. The first and second wells are formed in the substrate. The body region is formed in the second well. The first and second doped regions are formed in the first well and the body region, respectively. The second and first doped regions have the same polarities, and the dopant concentration of the second doped region is higher than that of the first doped region. The third doped region is formed in the second well and located between the first and second doped regions. The third and first doped regions have reverse polarities. The field plate is formed on the surface region between the first and second doped regions.
摘要翻译：半导体结构包括衬底，具有第一导电类型的第一阱，具有第二导电类型的第二阱，体区，第一掺杂区，第二掺杂区，第三掺杂区和场板。在衬底中形成第一和第二阱。身体区域形成在第二孔中。第一和第二掺杂区分别形成在第一阱和体区中。第二掺杂区域和第一掺杂区域具有相同的极性，并且第二掺杂区域的掺杂剂浓度高于第一掺杂区域的掺杂剂浓度。第三掺杂区形成在第二阱中并位于第一和第二掺杂区之间。第三和第一掺杂区域具有反向极性。场板形成在第一和第二掺杂区域之间的表面区域上。

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