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1. 发明申请

US20180349147A1 APPARATUS, SYSTEMS, AND METHODS FOR PROVIDING COMPUTATIONAL IMAGING PIPELINE 审中-公开
公开(公告)号：US20180349147A1
公开(公告)日：2018-12-06
申请号：US15900327
申请日：2018-02-20
申请人： Linear Algebra Technologies Limited
发明人： David Moloney , Richard Richmond , David Donohoe , Brendan Barry
IPC分类号： G06F9/38 , G06T1/60 , G06T1/20 , G09G5/36 , G09G5/397
CPC分类号： G06F9/3885 , G06T1/20 , G06T1/60 , G09G5/363 , G09G5/397 , G09G2360/08 , G09G2360/122 , G09G2360/126
摘要： The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.

2. 发明授权

US09270872B2 Apparatus, systems, and methods for removing shading effect from image 有权
标题翻译：用于从图像中去除阴影效果的设备，系统和方法
公开(公告)号：US09270872B2
公开(公告)日：2016-02-23
申请号：US14089908
申请日：2013-11-26
申请人： Linear Algebra Technologies Limited
发明人： David Donohoe
IPC分类号： H04N5/217 , H04N5/357 , H04N9/04 , H04N9/73 , H04N5/235
CPC分类号： H04N5/2173 , H04N5/2351 , H04N5/3572 , H04N9/045 , H04N9/735
摘要： The disclosed subject matter includes an apparatus configured to remove a shading effect from an image. The apparatus can include one or more interfaces configured to provide communication with an imaging module that is configured to capture the image, and a processor, in communication with the one or more interfaces, configured to run a module stored in memory. The module is configured to receive the image captured by the imaging module under a first lighting spectrum, receive a per-unit correction mesh for adjusting images captured by the imaging module under a second lighting spectrum, determine a correction mesh for the image captured under the first lighting spectrum based on the per-unit correction mesh for the second lighting spectrum, and operate the correction mesh on the image to remove the shading effect from the image.
摘要翻译：所公开的主题包括被配置为从图像中去除阴影效果的装置。该装置可以包括被配置为提供与被配置为捕获图像的成像模块的通信的一个或多个接口，以及与所述一个或多个接口通信的处理器，被配置为运行存储在存储器中的模块。模块被配置为在第一光谱下接收由成像模块捕获的图像，接收每单位校正网格以调整在第二光谱下由成像模块捕获的图像，确定针对第二光照下拍摄的图像的校正网格基于用于第二光谱的每单位校正网格的第一光照频谱，并且操作图像上的校正网格以从图像中去除阴影效果。

3. 发明授权

US10360040B2 Apparatus, systems, and methods for providing computational imaging pipeline 有权
公开(公告)号：US10360040B2
公开(公告)日：2019-07-23
申请号：US15900327
申请日：2018-02-20
申请人： Linear Algebra Technologies Limited
发明人： David Moloney , Richard Richmond , David Donohoe , Brendan Barry
IPC分类号： G06F12/00 , G06F9/38 , G09G5/36 , G09G5/397 , G06T1/20 , G06T1/60
摘要： The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.

4. 发明授权

US09146747B2 Apparatus, systems, and methods for providing configurable computational imaging pipeline 有权
标题翻译：用于提供可配置的计算成像管线的装置，系统和方法
公开(公告)号：US09146747B2
公开(公告)日：2015-09-29
申请号：US14082645
申请日：2013-11-18
申请人： Linear Algebra Technologies Limited
发明人： David Moloney , Richard Richmond , David Donohoe , Brendan Barry , Cormac Brick , Ovidiu Andrei Vesa
IPC分类号： G06F15/80 , G06F15/167 , G06F9/38
CPC分类号： G06F9/3885 , G06T1/20 , G06T1/60 , G09G5/363 , G09G5/397 , G09G2360/08 , G09G2360/122 , G09G2360/126
摘要： The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.
摘要翻译：本申请一般涉及并行处理装置。并行处理装置可以包括多个处理元件，存储器子系统和互连系统。存储器子系统可以包括多个存储器片，其中至少一个与多个处理元件之一相关联，并且包括多个随机存取存储器（RAM）片，每片具有单独的读写端口。互连系统被配置为耦合多个处理元件和存储器子系统。互连系统包括局部互连和全局互连。

5. 发明授权

US09196017B2 Apparatus, systems, and methods for removing noise from an image 有权
标题翻译：用于从图像中去除噪声的装置，系统和方法
公开(公告)号：US09196017B2
公开(公告)日：2015-11-24
申请号：US14081462
申请日：2013-11-15
申请人： Linear Algebra Technologies Limited
发明人： David Donohoe , Brendan Barry , David Moloney , Richard Richmond , Fergal Connor
IPC分类号： G06K9/00 , G06T5/00 , H04N5/217
CPC分类号： G06T5/002 , G06T2200/28 , G06T2207/20182 , H04N5/21 , H04N5/217
摘要： The disclosed embodiments include an apparatus implemented in a semiconductor integrated chip. The apparatus is configured to operate a composite function, comprising a first function and a second function, on a first patch of an image. The apparatus includes a first function operator configured to operate the first function on the group of pixel values to provide a first processed group of pixel values. The apparatus also includes a delay system configured to maintain the first processed group of pixel values for a predetermined period of time to provide a delayed processed group of pixel values. The apparatus further includes a second function operator configured to operate a second function on at least a second processed group of pixels and the delayed processed group to determine an output of the composite function.
摘要翻译：所公开的实施例包括在半导体集成芯片中实现的装置。该装置被配置为在图像的第一块上操作包括第一功能和第二功能的复合功能。该装置包括第一功能操作器，其被配置为对该组像素值操作第一功能以提供第一处理的像素值组。该装置还包括延迟系统，其被配置为在预定时间段内保持第一经处理的像素值组以提供延迟处理的像素值组。该装置还包括第二功能操作器，其被配置为在至少第二处理的像素组和延迟处理的组上操作第二功能以确定复合功能的输出。

6. 发明授权

US09934043B2 Apparatus, systems, and methods for providing computational imaging pipeline 有权
公开(公告)号：US09934043B2
公开(公告)日：2018-04-03
申请号：US14082396
申请日：2013-11-18
申请人： Linear Algebra Technologies Limited
发明人： David Moloney , Richard Richmond , David Donohoe , Brendan Barry
IPC分类号： G06F12/00 , G06F9/38 , G09G5/36 , G09G5/397 , G06T1/20 , G06T1/60
CPC分类号： G06F9/3885 , G06T1/20 , G06T1/60 , G09G5/363 , G09G5/397 , G09G2360/08 , G09G2360/122 , G09G2360/126
摘要： The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.

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