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1. 发明授权

US07035960B2 Method for increasing memory in a processor 有权
标题翻译：增加处理器内存的方法
公开(公告)号：US07035960B2
公开(公告)日：2006-04-25
申请号：US10605646
申请日：2003-10-15
申请人： Li-Chun Tu , Ping-Sheng Chen , Pao-Ching Tseng , Hung-Cheng Kuo
发明人： Li-Chun Tu , Ping-Sheng Chen , Pao-Ching Tseng , Hung-Cheng Kuo
IPC分类号： G06F12/00
CPC分类号： G06F12/0623
摘要： A method for increasing the internal memory in a processor. The method includes providing an extended memory in the processor, adding bits to data addresses and register addresses with an address extender, and adding bits to stack addresses with a stack pointer generator so that the processor is capable of accessing memory addresses larger than the bit width of the command set of the processor. The method also includes carrying over the bits when the stack address exceeds the limit of the conventional memory and accessing the stack data exceeding the limit of the conventional memory in the extended memory.
摘要翻译：一种用于增加处理器内部存储器的方法。该方法包括在处理器中提供扩展存储器，向位地址扩展器添加比特到数据地址和寄存器地址，以及使用堆栈指针生成器将位添加到堆栈地址，使得处理器能够访问大于位宽的存储器地址的处理器的命令集。该方法还包括当堆栈地址超过常规存储器的限制并且访问超过扩展存储器中的常规存储器的限制的堆栈数据时承载位。

2. 发明授权

US07111107B2 Microcontroller with dedicated memory bank for servicing interrupts 有权
标题翻译：具有专用存储体的微控制器用于维修中断
公开(公告)号：US07111107B2
公开(公告)日：2006-09-19
申请号：US10707107
申请日：2003-11-20
申请人： Pao-Ching Tseng , Ping-Cheng Sung , Ping-Sheng Chen , Li-Chun Tu
发明人： Pao-Ching Tseng , Ping-Cheng Sung , Ping-Sheng Chen , Li-Chun Tu
IPC分类号： G06F12/00 , G06F11/07
CPC分类号： G06F12/0623
摘要： A microcontroller with expandable memory banks has a microprocessor, a plurality of memory banks with only one page for storing interrupt service routines(ISR), a memory bank control circuit connected to the microprocessor, and a multiplexer for connecting the microprocessor with the plurality of memory banks. The memory bank control circuit generates a selection signal according to an interrupt signal and a microprocessor interrupt service routine execution end signal. The multiplexer outputs a page selection signal from the microprocessor or outputs a predetermined page selection signal according to the output signal from the memory bank control circuit.
摘要翻译：具有可扩展存储体的微控制器具有微处理器，多个存储体仅具有一页用于存储中断服务程序（ISR），连接到微处理器的存储器组控制电路以及用于将微处理器与多个存储器连接的多路复用器银行。存储体控制电路根据中断信号和微处理器中断服务程序执行结束信号产生选择信号。复用器从微处理器输出页选择信号，或者根据来自存储体控制电路的输出信号输出预定页选择信号。

3. 发明授权

US08214716B2 Method for processing noise interference in data accessing device with serial advanced technology attachment interface 有权
标题翻译：用串行高级技术附件接口处理数据存取装置噪声干扰的方法
公开(公告)号：US08214716B2
公开(公告)日：2012-07-03
申请号：US12574891
申请日：2009-10-07
申请人： Pao-Ching Tseng , Shu-Fang Tsai , Chuan Liu
发明人： Pao-Ching Tseng , Shu-Fang Tsai , Chuan Liu
IPC分类号： H03M13/00
CPC分类号： G06F13/387 , H04L1/16
摘要： A method for processing noise interference in a serial advanced technology attachment (SATA) interface. In the method, when a receiver does not receive a SOF primitive (start of frame primitive) but does receive an EOF primitive (end of frame primitive) or WTRM primitive (wait for frame termination primitive), the receiver outputs a R_ERR primitive (reception error primitive) to enable a transmitter to resend original data and thus to eliminate the interference. In addition, if the transmitter detects an error during the data transmission, a HOLD primitive (hold data transmission primitive) will be issued to temporarily stop the data transmission.
摘要翻译：一种在串行高级技术附件（SATA）接口中处理噪声干扰的方法。在该方法中，当接收机未接收到SOF原语（帧原语开始），但是接收到EOF原语（帧原语结束）或WTRM原语（等待帧终止原语）时，接收机输出R_ERR原语（接收错误原语），以使发射机重新发送原始数据，从而消除干扰。另外，如果发送器在数据传输期间检测到错误，则将发出HOLD原语（保持数据传输原语）以暂时停止数据传输。

4. 发明申请

US20100050018A1 SATA primitive prediction and correction 有权
标题翻译： SATA原始预测和校正
公开(公告)号：US20100050018A1
公开(公告)日：2010-02-25
申请号：US12611926
申请日：2009-11-03
申请人： Chuan Liu , Pao-Ching Tseng
发明人： Chuan Liu , Pao-Ching Tseng
IPC分类号： G06F11/07
CPC分类号： G06F11/1004
摘要： A method of correcting corrupted primitives transmitted between a serial advanced technology attachment (SATA) host and a SATA device includes analyzing a current state, a previously transmitted primitive, or a previously received primitive; selecting at least one candidate primitive according to at least one of the current state, the previously transmitted primitive and the previously received primitive; predicting the identity of a current primitive according to at least one candidate primitive and a received current primitive; and replacing the corrupted primitive with the predicted primitive when the predicted primitive is different from the current primitive.
摘要翻译：一种校正在串行高级技术附件（SATA）主机和SATA设备之间传输的损坏的原语的方法包括分析当前状态，先前传输的原语或先前接收的原语; 根据当前状态，先前发送的原语和先前接收的原语中的至少一个，选择至少一个候选基元; 根据至少一个候选原语和接收到的当前原语来预测当前基元的标识; 并且当预测的原语与当前原语不同时，用预测的原语替换被破坏的原语。

5. 发明申请

US20070174504A1 Method and Apparatus for Advanced Technology Attachment Packet Interface Native Command Queuing 审中-公开
标题翻译：高级技术附件分组接口本地命令队列的方法和装置
公开(公告)号：US20070174504A1
公开(公告)日：2007-07-26
申请号：US11306661
申请日：2006-01-05
申请人： Pao-Ching Tseng , Ching-Yi Wu
发明人： Pao-Ching Tseng , Ching-Yi Wu
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , G06F3/0601 , G06F2003/0692
摘要： A method involves receiving a first packet having a reference number, the first packet received from a Serial ATA interface that is coupled to a host; sending a first acknowledgement to the host over the Serial ATA interface; receiving a second packet having an ATAPI command from the host over the Serial ATA interface; sending a second acknowledgement to the host over the Serial ATA interface, the second acknowledgement indicating that a bit within said host should be cleared in order to indicate that said Serial ATA interface is no longer busy; sending a data transfer setup packet containing the reference number to the host over the Serial ATA interface; executing the command received from the host in the first packet; and sending a completion packet to the host over the Serial ATA interface for indicating that the command was executed.
摘要翻译：一种方法包括接收具有参考号码的第一分组，从与主机耦合的串行ATA接口接收的第一分组; 通过串行ATA接口向主机发送第一个确认; 通过串行ATA接口从主机接收具有ATAPI命令的第二分组; 通过所述串行ATA接口向所述主机发送第二确认，所述第二确认指示应该清除所述主机内的位以指示所述串行ATA接口不再忙; 通过串行ATA接口向主机发送包含参考号码的数据传输建立包; 执行从第一分组中的主机接收的命令; 并通过串行ATA接口向主机发送完成数据包，以指示执行命令。

6. 发明授权

US08010868B2 Method for processing noise interference 有权
标题翻译：噪声干扰处理方法
公开(公告)号：US08010868B2
公开(公告)日：2011-08-30
申请号：US11889152
申请日：2007-08-09
申请人： Pao-Ching Tseng , Shu-Fang Tsai , Chuan Liu
发明人： Pao-Ching Tseng , Shu-Fang Tsai , Chuan Liu
IPC分类号： H03M13/00
CPC分类号： H04L1/0061 , G06F11/1004 , G11B20/18 , G11B2020/1843 , G11B2220/2516 , H04L1/18
摘要： A method for processing noise interference in a serial AT Attachment (SATA) interface. The method includes the steps of detecting whether there is an error in CRC (Cyclic Redundancy Check) checksum or whether an R_ERR primitive (reception error primitive) is received, detecting whether a FIS (Frame Information Structure) is a data type if there is any error and returning back to error state detecting step if there is no any error, detecting whether the FIS is a ATAPI packet command CDB (Command Descriptor Block) when the FIS is the data format, and writing a special tag to the CDB and returning back to the error detecting step.
摘要翻译：一种用于处理串行AT附件（SATA）接口中噪声干扰的方法。该方法包括以下步骤：检测CRC（循环冗余校验）校验和是否接收到R_ERR原语（接收错误原语）是否存在错误，检测FIS（帧信息结构）是否为数据类型，如果有错误，如果没有任何错误，返回到错误状态检测步骤，当FIS是数据格式时，检测FIS是否是ATAPI包命令CDB（命令描述符块），并将特殊标签写入CDB并返回到错误检测步骤。

7. 发明申请

US20080040536A1 METHOD AND APPARATUS FOR DEVICE TO REQUEST AND OPERATE AN EXTERNAL BUFFER PROVIDED FROM THE HOST 审中-公开
标题翻译：用于请求和操作从主机提供的外部缓冲器的设备的方法和装置
公开(公告)号：US20080040536A1
公开(公告)日：2008-02-14
申请号：US11733194
申请日：2007-04-09
申请人： Jih-Liang Juang , Pao-Ching Tseng , Cheng-Chieh Lin
发明人： Jih-Liang Juang , Pao-Ching Tseng , Cheng-Chieh Lin
IPC分类号： G06F13/00
CPC分类号： G06F13/385 , G06F3/061 , G06F3/0656 , G06F3/0671
摘要： A method utilized in an electrical system is proposed. The electrical system includes a device, a host comprising a storage medium, and an interface interconnecting the device and the host. In an example of the proposed method, the device sends a buffer create request to the host. In response to the buffer create request, the host allocates a segment of the storage medium to the device. The device then utilizes the segment as an external buffer.
摘要翻译：提出了一种在电气系统中使用的方法。电气系统包括设备，包括存储介质的主机以及互连该设备和主机的接口。在所提出的方法的示例中，设备向主机发送缓冲器创建请求。响应于缓冲区创建请求，主机向设备分配存储介质的一段。然后，该设备将该段用作外部缓冲器。

8. 发明申请

US20070260756A1 Method for Processing Command via SATA Interface 审中-公开
标题翻译：通过SATA接口处理命令的方法
公开(公告)号：US20070260756A1
公开(公告)日：2007-11-08
申请号：US11279261
申请日：2006-04-11
申请人： Pao-Ching Tseng , Ching-Yi Wu
发明人： Pao-Ching Tseng , Ching-Yi Wu
IPC分类号： G06F3/00
CPC分类号： G06F13/28 , G06F3/0601 , G06F2003/0692
摘要： Methods for performing ATAPI NCQ and ATAPI normal command are provided. The method involves receiving a predefined packet comprising essential information regarding a host command, the predefined packet received from a Serial ATA interface that is coupled to a host, wherein the essential information further indicates whether the command is a NCQ command; executing the command; and sending a completion packet to the host over the Serial ATA interface for indicating that the command was executed.
摘要翻译：提供了执行ATAPI NCQ和ATAPI正常命令的方法。该方法包括接收包括关于主机命令的基本信息的预定义分组，从耦合到主机的串行ATA接口接收的预定义分组，其中基本信息还指示该命令是否是NCQ命令; 执行命令并通过串行ATA接口向主机发送完成数据包，以指示执行命令。

9. 发明申请

US20070005813A1 PERIPHERAL DEVICE AND METHOD FOR INTERPRETING REDEFINED FRAME INFORMATION STRUCTURE 审中-公开
标题翻译：外围设备和解码重构框架信息结构的方法
公开(公告)号：US20070005813A1
公开(公告)日：2007-01-04
申请号：US11306902
申请日：2006-01-16
申请人： Jih-Liang Juang , Pao-Ching Tseng , Jeng-Horng Tsai
发明人： Jih-Liang Juang , Pao-Ching Tseng , Jeng-Horng Tsai
IPC分类号： G06F3/00
CPC分类号： G06F3/0632 , G06F3/0607 , G06F3/0676 , G06F3/0677
摘要： A peripheral device for receiving a data frame containing control information from a serial transmission channel is disclosed. The peripheral device includes an information interpreter and a control unit. The information interpreter is coupled to the serial transmission channel, and used for receiving the data frame and interpreting the data frame to generate an operation signal according to the control information. The control unit is coupled to the information interpreter, and used for receiving the operation signal to execute an operation according to the control information.
摘要翻译：公开了一种用于从串行传输信道接收包含控制信息的数据帧的外围设备。外围设备包括信息解释器和控制单元。信息解释器耦合到串行传输信道，用于接收数据帧并根据控制信息解释数据帧以产生操作信号。控制单元耦合到信息解释器，并用于接收操作信号以根据控制信息执行操作。

10. 发明申请

US20050240855A1 Method for processing noise interference 有权
标题翻译：噪声干扰处理方法
公开(公告)号：US20050240855A1
公开(公告)日：2005-10-27
申请号：US11039948
申请日：2005-01-24
申请人： Pao-Ching Tseng , Shu-Fang Tsai , Chuan Liu
发明人： Pao-Ching Tseng , Shu-Fang Tsai , Chuan Liu
IPC分类号： H03M13/00
CPC分类号： H04L1/0061 , G06F11/1004 , G11B20/18 , G11B2020/1843 , G11B2220/2516 , H04L1/18
摘要： A method for processing noise interference in a serial AT Attachment (SATA) interface. The method includes the steps of detecting whether there is an error in CRC (Cyclic Redundancy Check) checksum or whether an R_ERR primitive (reception error primitive) is received, detecting whether a FIS (Frame Information Structure) is a data type if there is any error and returning back to error state detecting step if there is no any error, detecting whether the FIS is a ATAPI packet command CDB (Command Descriptor Block) when the FIS is the data format, and writing a special tag to the CDB and returning back to the error detecting step.
摘要翻译：一种用于处理串行AT附件（SATA）接口中噪声干扰的方法。该方法包括以下步骤：检测CRC（循环冗余校验）校验和是否接收到R_ERR原语（接收错误原语）是否存在错误，检测FIS（帧信息结构）是否为数据类型，如果有错误，如果没有任何错误，返回到错误状态检测步骤，当FIS是数据格式时，检测FIS是否是ATAPI包命令CDB（命令描述符块），并将特殊标签写入CDB并返回到错误检测步骤。

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