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    • 5. 发明授权
    • Method for cleaning a polishing pad
    • 清洁抛光垫的方法
    • US08721401B2
    • 2014-05-13
    • US13163667
    • 2011-06-17
    • Li JiangMingqi Li
    • Li JiangMingqi Li
    • B24B53/017B24B53/00
    • B24B53/017
    • A method for cleaning a polishing pad includes dispensing a first amount of deionized water on the polishing pad; cleaning the polishing pad with an acidity/alkalinity solution after dispensing the first amount of deionized water on the polishing pad; rinsing the polishing pad with a second amount of deionized water after cleaning the polishing pad with the acidity/alkalinity solution; removing the acidity/alkalinity solution from the polishing pad. In a subsequent CMP process, the method includes polishing a GST material device for obtaining an improved performance of the GST material device.
    • 一种用于清洁抛光垫的方法包括:在抛光垫上分配第一量的去离子水; 在抛光垫上分配第一量的去离子水后,用酸度/碱度溶液清洗抛光垫; 用酸度/碱度溶液清洗抛光垫后用第二量的去离子水冲洗抛光垫; 从抛光垫去除酸度/碱度溶液。 在随后的CMP工艺中,该方法包括抛光GST材料装置以获得GST材料装置的改进的性能。
    • 6. 发明申请
    • METHOD FOR FORMING METAL GATE AND MOS TRANSISTOR
    • 形成金属栅和MOS晶体管的方法
    • US20120142150A1
    • 2012-06-07
    • US13176678
    • 2011-07-05
    • Li JiangMingqi Li
    • Li JiangMingqi Li
    • H01L21/336H01L21/28
    • H01L29/66545H01L21/31053H01L29/6653H01L29/7833
    • The invention provides a method for forming a metal gate and a method for forming a MOS transistor. The method for forming a metal gate includes: providing a substrate; forming a sacrificial oxide layer and a polysilicon gate on the substrate; forming a silicon oxide layer on sidewalls of the sacrificial oxide layer and the polysilicon gate; forming a stop layer that covers the substrate; removing a part of the stop layer in the spacers; forming a second interlayer dielectric layer that covers the first interlayer dielectric layer, the spacers and the polysilicon gate; polishing the second interlayer dielectric layer to expose the spacers and the polysilicon gate; removing the polysilicon gate to form a trench; removing the sacrificial oxide layer in the trench; and forming a metal gate in the trench. The invention prevents from recesses and therefore metal bridge and metal residuals in the recesses.
    • 本发明提供一种用于形成金属栅极的方法和用于形成MOS晶体管的方法。 形成金属栅极的方法包括:提供基板; 在所述基板上形成牺牲氧化物层和多晶硅栅极; 在所述牺牲氧化物层和所述多晶硅栅极的侧壁上形成氧化硅层; 形成覆盖所述基板的停止层; 去除隔离物中的一部分停止层; 形成覆盖所述第一层间电介质层,所述间隔物和所述多晶硅栅极的第二层间电介质层; 抛光所述第二层间电介质层以暴露所述间隔物和所述多晶硅栅极; 去除多晶硅栅极以形成沟槽; 去除沟槽中的牺牲氧化物层; 并在沟槽中形成金属栅极。 本发明防止了凹槽中的金属桥和凹陷中的金属残留物。
    • 8. 发明授权
    • Polishing method and method for forming a gate
    • 抛光方法及形成栅极的方法
    • US08541308B2
    • 2013-09-24
    • US13244196
    • 2011-09-23
    • Li JiangMingqi Li
    • Li JiangMingqi Li
    • H01L21/461H01L21/302
    • H01L21/31053C09G1/04H01L29/495H01L29/66545
    • A polishing method and a method for forming a gate are provided. The method includes forming a dummy gate on a semiconductor substrate including a sacrificial oxide layer and a polysilicon layer which covers the sacrificial oxide layer, forming spacers around the dummy gate, and successively forming a silicon nitride layer and a dielectric layer covering the silicon nitride layer. The method further includes polishing the dielectric layer until the silicon nitride layer is exposed, polishing the silicon nitride layer on a fixed abrasive pad until the polysilicon layer is exposed by using a polishing slurry with a PH value ranging from 10.5 to 11 and comprising an anionic surfactant or a zwitterionic surfactant. Additionally, the method includes forming an opening after removing the dummy gate, and forming a gate in the opening. The method eliminates potential erosion and dishing caused in the polishing of the silicon nitride layer.
    • 提供了一种用于形成栅极的抛光方法和方法。 该方法包括在包括牺牲氧化物层和覆盖牺牲氧化物层的多晶硅层的半导体衬底上形成伪栅极,在虚拟栅极周围形成间隔物,并且依次形成氮化硅层和覆盖氮化硅层的电介质层 。 该方法还包括抛光电介质层,直到暴露氮化硅层,在固定的研磨垫上抛光氮化硅层,直到通过使用pH值范围为10.5至11的抛光浆料暴露多晶硅层,并且包含阴离子 表面活性剂或两性离子表面活性剂。 此外,该方法包括在去除虚拟门之后形成开口,并在开口中形成栅极。 该方法消除了在氮化硅层的抛光中引起的潜在的腐蚀和凹陷。
    • 9. 发明授权
    • Method for forming metal gate and MOS transistor
    • 金属栅极和MOS晶体管的形成方法
    • US08507336B2
    • 2013-08-13
    • US13176678
    • 2011-07-05
    • Li JiangMingqi Li
    • Li JiangMingqi Li
    • H01L21/336H01L21/28
    • H01L29/66545H01L21/31053H01L29/6653H01L29/7833
    • The invention provides a method for forming a metal gate and a method for forming a MOS transistor. The method for forming a metal gate includes: providing a substrate; forming a sacrificial oxide layer and a polysilicon gate on the substrate; forming a silicon oxide layer on sidewalls of the sacrificial oxide layer and the polysilicon gate; forming a stop layer that covers the substrate; removing a part of the stop layer in the spacers; forming a second interlayer dielectric layer that covers the first interlayer dielectric layer, the spacers and the polysilicon gate; polishing the second interlayer dielectric layer to expose the spacers and the polysilicon gate; removing the polysilicon gate to form a trench; removing the sacrificial oxide layer in the trench; and forming a metal gate in the trench. The invention prevents from recesses and therefore metal bridge and metal residuals in the recesses.
    • 本发明提供一种用于形成金属栅极的方法和用于形成MOS晶体管的方法。 形成金属栅极的方法包括:提供基板; 在所述基板上形成牺牲氧化物层和多晶硅栅极; 在所述牺牲氧化物层和所述多晶硅栅极的侧壁上形成氧化硅层; 形成覆盖所述基板的停止层; 去除隔离物中的一部分停止层; 形成覆盖所述第一层间电介质层,所述间隔物和所述多晶硅栅极的第二层间电介质层; 抛光所述第二层间电介质层以暴露所述间隔物和所述多晶硅栅极; 去除多晶硅栅极以形成沟槽; 去除沟槽中的牺牲氧化物层; 并在沟槽中形成金属栅极。 本发明防止了凹槽中的金属桥和凹陷中的金属残留物。
    • 10. 发明授权
    • Method for fabricating a high-K metal gate MOS
    • 高K金属栅MOS的制造方法
    • US08313991B2
    • 2012-11-20
    • US13178455
    • 2011-07-07
    • Li JiangMingqi Li
    • Li JiangMingqi Li
    • H01L21/338H01L21/336H01L21/3205H01L21/4763
    • H01L29/66545H01L29/78
    • A method is provided for fabricating a high-K metal gate MOS device. The method includes providing a semiconductor substrate having a surface region, a gate oxide layer on the surface region, a sacrificial gate electrode on the gate oxide layer, and a covering layer on the sacrificial gate electrode, an inter-layer dielectric layer on the semiconductor substrate and the sacrificial gate electrode. The method also includes planarizing the inter-layer dielectric layer to expose a portion of the covering layer atop the sacrificial gate electrode, implanting nitrogen ions into the inter-layer dielectric layer until a depth of implantation is deeper than a thickness of the portion of the covering layer atop the sacrificial gate electrode and polishing the inter-layer dielectric layer to expose a surface of the sacrificial gate electrode, removing the sacrificial gate electrode, and depositing a metal gate.
    • 提供了制造高K金属栅极MOS器件的方法。 该方法包括提供具有表面区域,表面区域上的栅极氧化物层,栅极氧化物层上的牺牲栅极电极和牺牲栅电极上的覆盖层的半导体衬底,半导体上的层间电介质层 基板和牺牲栅电极。 该方法还包括平坦化层间电介质层以暴露牺牲栅电极顶部的覆盖层的一部分,将氮离子注入到层间电介质层中,直到植入深度比该部分的厚度更深 覆盖层,并抛光该层间电介质层以暴露牺牲栅电极的表面,去除牺牲栅极电极和沉积金属栅极。