专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110036912A1 On-Chip Antenna and a Method of Fabricating the Same 失效
标题翻译：片上天线及其制造方法
公开(公告)号：US20110036912A1
公开(公告)日：2011-02-17
申请号：US12161958
申请日：2007-01-24
申请人： Li Hui Guo , Hong Yu Li , Min Tang
发明人： Li Hui Guo , Hong Yu Li , Min Tang
IPC分类号： G06K19/00 , H01Q7/00 , H01P11/00
CPC分类号： G06K19/07749 , G06K19/07775 , G06K19/07779 , Y10T29/49016
摘要： An on-chip antenna fabricated on a chip for wireless communication is disclosed. The on-chip antenna includes a first dielectric layer arranged on a surface of the chip of the radio frequency identification tag, a grounded shielding layer arranged on the first dielectric layer, a second dielectric layer arranged on the grounded shielding layer, and a planar antenna arranged on the second dielectric layer above the grounded shielding layer. A radio frequency identification tag with an on-chip antenna and a method of fabricating an on-chip antenna on a chip for wireless communication are also disclosed.
摘要翻译：公开了一种制造在用于无线通信的芯片上的片上天线。片上天线包括布置在射频识别标签的芯片的表面上的第一介电层，布置在第一介电层上的接地屏蔽层，布置在接地屏蔽层上的第二介电层和平面天线布置在接地屏蔽层上方的第二电介质层上。还公开了一种具有片上天线的射频识别标签和用于无线通信的芯片上制造片上天线的方法。

2. 发明授权

US08201746B2 On-chip antenna and a method of fabricating the same 失效
标题翻译：片上天线及其制造方法
公开(公告)号：US08201746B2
公开(公告)日：2012-06-19
申请号：US12161958
申请日：2007-01-24
申请人： Li Hui Guo , Hong Yu Li , Min Tang
发明人： Li Hui Guo , Hong Yu Li , Min Tang
IPC分类号： G06K19/06
CPC分类号： G06K19/07749 , G06K19/07775 , G06K19/07779 , Y10T29/49016
摘要： An on-chip antenna fabricated on a chip for wireless communication is disclosed. The on-chip antenna includes a first dielectric layer arranged on a surface of the chip of the radio frequency identification tag, a grounded shielding layer arranged on the first dielectric layer, a second dielectric layer arranged on the grounded shielding layer, and a planar antenna arranged on the second dielectric layer above the grounded shielding layer. A radio frequency identification tag with an on-chip antenna and a method of fabricating an on-chip antenna on a chip for wireless communication are also disclosed.
摘要翻译：公开了一种制造在用于无线通信的芯片上的片上天线。片上天线包括布置在射频识别标签的芯片的表面上的第一介电层，布置在第一介电层上的接地屏蔽层，布置在接地屏蔽层上的第二介电层和平面天线布置在接地屏蔽层上方的第二电介质层上。还公开了一种具有片上天线的射频识别标签和用于无线通信的芯片上制造片上天线的方法。

3. 发明授权

US08893127B2 Method and system for loading application to a local memory of a co-processor system by using position independent loader 有权
标题翻译：通过使用位置无关的加载程序将应用程序加载到协处理器系统的本地存储器的方法和系统
公开(公告)号：US08893127B2
公开(公告)日：2014-11-18
申请号：US12869164
申请日：2010-08-26
申请人： Li Hui Guo , Yan Li , Haibo Lin , Yonghua Lin , Yudong Yang
发明人： Li Hui Guo , Yan Li , Haibo Lin , Yonghua Lin , Yudong Yang
IPC分类号： G06F9/46 , G06F9/445 , G06F9/38
CPC分类号： G06F9/445 , G06F9/3881 , G06F2212/251 , G06F2212/253
摘要： A co-processor system and a method for loading an application to a local memory of a co-processor system. In the method, re-locatable code and descriptive data are copied from a loading region to a non-loading region. An executable image to be loaded is loaded using the re-locatable code copied to the non-loading region according to the descriptive data. The local memory includes a loading region and a non-loading region, the loading region stories a loader and descriptive data of an executable image to be loaded of the application, and the loader includes re-locatable code. A system is provided for carrying out the steps of the method. In accordance with the system and method of the present invention, flexibility of co-processor system application development is improved without occupying additional storage space.
摘要翻译：一种协处理器系统和一种将应用程序加载到协处理器系统的本地存储器的方法。在该方法中，可重新定位的代码和描述性数据从加载区域复制到非加载区域。根据描述性数据，使用可重新定位的代码复制到非加载区域来加载要加载的可执行映像。本地存储器包括加载区域和非加载区域，加载区域描述加载器和要应用程序加载的可执行映像的描述数据，并且加载器包括可重定位代码。提供了一种用于执行该方法的步骤的系统。根据本发明的系统和方法，在不占用额外存储空间的情况下，协同处理器系统应用开发的灵活性得到改善。

4. 发明申请

US20110055833A1 CO-PROCESSOR SYSTEM AND METHOD FOR LOADING AN APPLICATION TO A LOCAL MEMORY 有权
标题翻译：用于加载应用于本地存储器的CO处理器系统和方法
公开(公告)号：US20110055833A1
公开(公告)日：2011-03-03
申请号：US12869164
申请日：2010-08-26
申请人： Li Hui Guo , Yan Li , Haibo Lin , Yonghua Lin , Yudong Yang
发明人： Li Hui Guo , Yan Li , Haibo Lin , Yonghua Lin , Yudong Yang
IPC分类号： G06F9/46
CPC分类号： G06F9/445 , G06F9/3881 , G06F2212/251 , G06F2212/253
摘要： A co-processor system and a method for loading an application to a local memory of a co-processor system. In the method, re-locatable code and descriptive data are copied from a loading region to a non-loading region. An executable image to be loaded is loaded using the re-locatable code copied to the non-loading region according to the descriptive data. The local memory includes a loading region and a non-loading region, the loading region stories a loader and descriptive data of an executable image to be loaded of the application, and the loader includes re-locatable code. A system is provided for carrying out the steps of the method. In accordance with the system and method of the present invention, flexibility of co-processor system application development is improved without occupying additional storage space.
摘要翻译：一种协处理器系统和一种将应用程序加载到协处理器系统的本地存储器的方法。在该方法中，可重新定位的代码和描述性数据从加载区域复制到非加载区域。根据描述性数据，使用可重新定位的代码复制到非加载区域来加载要加载的可执行映像。本地存储器包括加载区域和非加载区域，加载区域描述加载器和要应用程序加载的可执行映像的描述数据，并且加载器包括可重定位代码。提供了一种用于执行该方法的步骤的系统。根据本发明的系统和方法，在不占用额外存储空间的情况下，协同处理器系统应用开发的灵活性得到改善。

5. 发明申请

US20100025095A1 Device Carrying an Intergrated Circuit/Components and Method of Producing the Same 审中-公开
标题翻译：装载集成电路的器件及其制造方法
公开(公告)号：US20100025095A1
公开(公告)日：2010-02-04
申请号：US12083442
申请日：2005-10-12
申请人： Li Hui Guo , Qing Xin Zhang
发明人： Li Hui Guo , Qing Xin Zhang
IPC分类号： H05K1/16 , H05K3/30
CPC分类号： H05K1/16 , H05K3/007 , H05K3/4688 , H05K2203/0152 , H05K2203/016 , H05K2203/066 , H05K2203/1572 , Y10T29/4913
摘要： A method of forming an integrated circuit component on an insulating substrate (21), comprising providing a first layer arrangement and a second layer arrangement, each layer arrangement comprising a supply substrate and a dielectric layer (17), the dielectric layer of at least one of the layer arrangements comprising the integrated circuit component therein; attaching the first layer arrangement on one surface of the insulating substrate with the dielectric layer of the first layer arrangement facing the insulating substrate, and attaching the second layer arrangement on an opposing surface of the insulating substrate with the dielectric layer of the second layer arrangement facing the insulating substrate, wherein the first layer arrangement and the second layer arrangement are so arranged to sandwich at least a portion of the insulating substrate between the first and second layer arrangements.
摘要翻译：一种在绝缘衬底（21）上形成集成电路部件的方法，包括提供第一层布置和第二层布置，每个层布置包括供电基板和介电层（17），所述电介质层至少一个包括其中的集成电路部件的层布置; 将所述第一层布置在所述绝缘基板的一个表面上，其中所述第一层布置的介电层面向所述绝缘基板，以及将所述第二层布置附接在所述绝缘基板的相对表面上，所述第二层布置的介电层面向绝缘基板，其中第一层布置和第二层布置被布置成将绝缘基板的至少一部分夹在第一和第二层布置之间。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式