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1. 发明授权

US4670872A Communication link contention resolution system 失效
标题翻译：通信链路争用解决系统
公开(公告)号：US4670872A
公开(公告)日：1987-06-02
申请号：US751103
申请日：1985-07-02
申请人： Leroy D. Cordill
发明人： Leroy D. Cordill
IPC分类号： H04L12/413 , H04J3/02 , H04J3/06 , H04L7/00
CPC分类号： H04L12/413
摘要： Each of a plurality of programmable master devices having access to a data communication link is assigned a unique address based on the priority of that master device. The unique address of each master device is loaded into an associated counter when a link contention signal is impressed on the link by one of the master devices, and all counters begin counting down at the same time and at the same rate when the contention signal is terminated, whereby the counter with the lowest number address times out first and its associated master device can gain access to the data link. The unique address of each master device thus provides a way for higher priority master devices to lock out lower priority master devices so as to prevent simultaneous transmission on the data link and also to prevent loss of high priority data.
摘要翻译：具有对数据通信链路的访问权的多个可编程主设备中的每一个被分配了基于该主设备的优先级的唯一地址。当链路争用信号由主设备之一施加在链路上时，每个主设备的唯一地址被加载到相关联的计数器中，并且所有计数器在争用信号是相同时间并以相同的速率开始递减计数终止，由此具有最低数量地址的计数器首先超时并且其相关联的主设备可以访问数据链路。因此，每个主设备的唯一地址为较高优先级的主设备锁定较低优先级的主设备提供了一种方式，以防止数据链路上的同时传输，并且还防止丢失高优先级数据。

2. 发明授权

US07063302B2 Sample valve with integral sample shut off function for chromatograph 有权
公开(公告)号：US07063302B2
公开(公告)日：2006-06-20
申请号：US10093599
申请日：2002-03-08
申请人： Leroy D. Cordill
发明人： Leroy D. Cordill
IPC分类号： F16K31/12 , F16K1/36 , F16K3/32 , F16K5/10 , B01L11/00
CPC分类号： G01N30/20 , G01N2030/201 , G01N2030/202 , G01N2030/205 , G01N2030/8804 , Y10T137/4456 , Y10T436/11 , Y10T436/118339 , Y10T436/2575
摘要： A multiple port valve integrated with the function of the sample shut off valve is disclosed. The integration of the sample shut off function eliminates extra plumbing and labor costs associated with a separate sample shut off valve. Additionally, the multiple port valve integrated with the function of the sample shut off valve provides a shorter equilibration time and less tubing volume.

3. 发明授权

US4233500A Method and apparatus for providing a digital output in response to an analog input and for providing an analog output in response to a digital input 失效
标题翻译：用于响应于模拟输入提供数字输出并响应于数字输入提供模拟输出的方法和装置
公开(公告)号：US4233500A
公开(公告)日：1980-11-11
申请号：US840425
申请日：1977-10-07
申请人： Leroy D. Cordill
发明人： Leroy D. Cordill
IPC分类号： G06F3/05 , H03M1/00 , G06F15/46 , H03K13/09
CPC分类号： G06F3/05 , H03M1/12 , H03M1/66
摘要： The accuracy of the conversion of an analog signal to digital form is improved by amplifying the input signal by different factors and automatically utilizing the highest amplified input signal which has a voltage level within operational limitations in the analog to digital conversion process. Output data from a digital computer, based on the input data, is converted from digital form to analog form and is routed to a required location by the use of control logic and optically isolated digital signals used to address other computers.
摘要翻译：模拟信号转换为数字形式的精度通过以不同的因素放大输入信号并自动利用在模数转换过程中具有操作限制内的电压电平的最高放大输入信号来改进。来自数字计算机的输出数据基于输入数据从数字形式转换为模拟形式，并通过使用控制逻辑和用于寻址其他计算机的光隔离数字信号路由到所需位置。

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