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1. 发明授权

US07144299B2 Methods and devices for supporting substrates using fluids 失效
标题翻译：使用流体支撑底物的方法和装置
公开(公告)号：US07144299B2
公开(公告)日：2006-12-05
申请号：US11125605
申请日：2005-05-09
申请人： Leonel R. Arana , Terry L. Sterrett , Devendra Natekar
发明人： Leonel R. Arana , Terry L. Sterrett , Devendra Natekar
IPC分类号： B24B1/00
CPC分类号： B24B7/228 , B24B41/068 , Y10T29/49998
摘要： Electronic device support and processing methods are described. One embodiment includes a method of processing an electronic device including solder bumps extending therefrom. The method includes providing at least one fluid selected from the group consisting of electrorheological fluids and magnorheological fluids on a support structure. The solder bumps extending from the electronic device are positioned in the fluid. The fluid is activated by applying a field selected from the group consisting of an electric field and a magnetic field to the fluid. The activated fluid mechanically holds the electronic device in place. A surface of the electronic device is polished while the electronic device is held in place by the activated fluid. The fluid is deactivated by removing the applied field from the fluid, and the electronic device is separated from the deactivated fluid. Other embodiments are described and claimed.
摘要翻译：描述电子设备支持和处理方法。一个实施例包括处理包括从其延伸的焊锡凸块的电子器件的方法。该方法包括在支撑结构上提供至少一种选自电流变流体和流变流体的流体。从电子设备延伸的焊料凸块位于流体中。通过将从电场和磁场组成的组中选出的场施加到流体来激活流体。活化流体将电子设备机械地保持在适当位置。电子设备的表面被抛光，同时电子设备被活化的流体保持就位。通过从流体中除去所施加的场，使流体失活，并且电子装置与去活化流体分离。描述和要求保护其他实施例。

2. 发明申请

US20080251932A1 Method of forming through-silicon vias with stress buffer collars and resulting devices 审中-公开
标题翻译：用应力缓冲圈和结果装置形成通硅通孔的方法
公开(公告)号：US20080251932A1
公开(公告)日：2008-10-16
申请号：US12157806
申请日：2008-06-12
申请人： Leonel R. Arana , Devendra Natekar , Michael Newman , Charan K. Gurumurthy
发明人： Leonel R. Arana , Devendra Natekar , Michael Newman , Charan K. Gurumurthy
IPC分类号： H01L23/48
CPC分类号： H01L21/76898 , H01L2224/13 , H01L2924/1461 , H01L2924/00
摘要： A method of forming a via having a stress buffer collar, wherein the stress buffer collar can absorb stress resulting from a mismatch in the coefficients of thermal expansion of the surrounding materials. Other embodiments are described and claimed.
摘要翻译：一种形成具有应力缓冲套环的通孔的方法，其中所述应力缓冲环可以吸收由周围材料的热膨胀系数不匹配引起的应力。描述和要求保护其他实施例。

3. 发明授权

US07402515B2 Method of forming through-silicon vias with stress buffer collars and resulting devices 有权
公开(公告)号：US07402515B2
公开(公告)日：2008-07-22
申请号：US11169595
申请日：2005-06-28
申请人： Leonel R. Arana , Devendra Natekar , Michael Newman , Charan K. Gurumurthy
发明人： Leonel R. Arana , Devendra Natekar , Michael Newman , Charan K. Gurumurthy
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/76898 , H01L2224/13 , H01L2924/1461 , H01L2924/00
摘要： A method of forming a via having a stress buffer collar, wherein the stress buffer collar can absorb stress resulting from a mismatch in the coefficients of thermal expansion of the surrounding materials. Other embodiments are described and claimed.

4. 发明授权

US07592704B2 Etched interposer for integrated circuit devices 有权
标题翻译：用于集成电路器件的蚀刻插入器
公开(公告)号：US07592704B2
公开(公告)日：2009-09-22
申请号：US12169542
申请日：2008-07-08
申请人： Terry L. Sterrett , Devendra Natekar
发明人： Terry L. Sterrett , Devendra Natekar
IPC分类号： H01L23/053 , H01L23/48
CPC分类号： H05K3/4038 , H01L21/486 , H01L23/49827 , H01L24/48 , H01L2224/16225 , H01L2224/16227 , H01L2224/48227 , H01L2924/00014 , H01L2924/14 , H05K3/06 , H05K2201/09881 , H05K2201/10378 , H05K2201/2018 , H05K2203/0369 , H05K2203/1476 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer. In one embodiment, the interposer 106 includes columnar interconnects which may be fabricated by etching a conductive member such as copper foil, for example. In one application, the pitch or center to center spacing of the columnar interconnects may be defined by masking techniques to provide an interconnect pitch suitable for a particular application. In yet another aspect, etching rates may be controlled to provide height to width aspect ratios of the columnar interconnects which are suitable for various applications.
摘要翻译：在一个实施例中，组装包装堆叠包括第一集成电路封装和第二集成电路封装，其使用中介层机械和电连接。在一个实施例中，插入器106包括可以通过例如蚀刻诸如铜箔的导电构件来制造的柱状互连。在一个应用中，柱状互连的间距或中心到中心间隔可以通过掩模技术来定义，以提供适合于特定应用的互连间距。在另一方面，可以控制蚀刻速率以提供适合于各种应用的柱状互连的高宽比长宽比。

5. 发明授权

US07413995B2 Etched interposer for integrated circuit devices 有权
标题翻译：用于集成电路器件的蚀刻插入器
公开(公告)号：US07413995B2
公开(公告)日：2008-08-19
申请号：US10924396
申请日：2004-08-23
申请人： Terry L. Sterrett , Devendra Natekar
发明人： Terry L. Sterrett , Devendra Natekar
IPC分类号： H01L21/44 , H01L21/48
CPC分类号： H05K3/4038 , H01L21/486 , H01L23/49827 , H01L24/48 , H01L2224/16225 , H01L2224/16227 , H01L2224/48227 , H01L2924/00014 , H01L2924/14 , H05K3/06 , H05K2201/09881 , H05K2201/10378 , H05K2201/2018 , H05K2203/0369 , H05K2203/1476 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer. In one embodiment, the interposer 106 includes columnar interconnects which may be fabricated by etching a conductive member such as copper foil, for example. In one application, the pitch or center to center spacing of the columnar interconnects may be defined by masking techniques to provide an interconnect pitch suitable for a particular application. In yet another aspect, etching rates may be controlled to provide height to width aspect ratios of the columnar interconnects which are suitable for various applications.
摘要翻译：在一个实施例中，组装包装堆叠包括第一集成电路封装和第二集成电路封装，其使用中介层机械和电连接。在一个实施例中，插入器106包括可以通过例如蚀刻诸如铜箔的导电构件来制造的柱状互连。在一个应用中，柱状互连的间距或中心到中心间隔可以通过掩模技术来定义，以提供适合于特定应用的互连间距。在另一方面，可以控制蚀刻速率以提供适合于各种应用的柱状互连的高宽比长宽比。

6. 发明授权

US08227907B2 Flexible interconnect pattern on semiconductor package 有权
标题翻译：半导体封装上的柔性互连图案
公开(公告)号：US08227907B2
公开(公告)日：2012-07-24
申请号：US13004815
申请日：2011-01-11
申请人： Yoshihiro Tomita , David Chau , Gregory M. Chrysler , Devendra Natekar
发明人： Yoshihiro Tomita , David Chau , Gregory M. Chrysler , Devendra Natekar
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L21/4867 , H01L21/563 , H01L23/3675 , H01L23/42 , H01L23/5389 , H01L24/24 , H01L2223/6677 , H01L2224/16225 , H01L2224/18 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/73259 , H01L2224/73267 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/1423 , H01L2924/15311 , H01L2924/16152 , H01L2924/351 , H01L2924/00
摘要： An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
摘要翻译：本发明的一个实施例是制造金属互连的技术。将第一金属迹线印刷在附接到封装中的散热器的基板或空腔的管芯上，以将第一金属迹线电连接到基板中的电源触点。设备安装在第一个金属轨迹上。当封装电源时，该设备从基板接收电力。

7. 发明授权

US07514116B2 Horizontal Carbon Nanotubes by Vertical Growth and Rolling 有权
标题翻译：水平碳纳米管通过垂直生长和滚动
公开(公告)号：US07514116B2
公开(公告)日：2009-04-07
申请号：US11322504
申请日：2005-12-30
申请人： Devendra Natekar , Yoshihiro Tomita , Chi-Won Hwang
发明人： Devendra Natekar , Yoshihiro Tomita , Chi-Won Hwang
IPC分类号： C23C16/00
CPC分类号： H05K1/097 , B82Y10/00 , H01L24/27 , H01L24/29 , H01L24/83 , H01L25/0657 , H01L2224/29 , H01L2224/29101 , H01L2224/29298 , H01L2224/838 , H01L2225/06541 , H01L2225/06575 , H01L2924/00011 , H01L2924/00013 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H05K3/125 , H05K2201/026 , H05K2203/013 , H01L2924/00 , H01L2924/3512 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929
摘要： Horizontal carbon nanotubes may be used for on-die routing and other applications. In one example, a catalyst is applied to a plurality of different points on a substrate. Carbon nanotubes are then grown vertically on the plurality of different points to form a plurality of vertical carbon nanotube structures on the substrate. The vertical carbon nanotuhe structures are then rolled to form horizontal carbon nanotube structures.
摘要翻译：水平碳纳米管可用于管芯路由和其他应用。在一个实例中，将催化剂施加到基底上的多个不同点。然后在多个不同点上垂直生长碳纳米管，以在基底上形成多个垂直碳纳米管结构。然后将垂直碳纳米管结构轧制以形成水平碳纳米管结构。

8. 发明授权

US07915081B2 Flexible interconnect pattern on semiconductor package 有权
标题翻译：半导体封装上的柔性互连图案
公开(公告)号：US07915081B2
公开(公告)日：2011-03-29
申请号：US11395549
申请日：2006-03-31
申请人： Yoshihiro Tomita , David Chau , Gregory M. Chrysler , Devendra Natekar
发明人： Yoshihiro Tomita , David Chau , Gregory M. Chrysler , Devendra Natekar
IPC分类号： H01L21/00 , H01L21/44
CPC分类号： H01L21/4867 , H01L21/563 , H01L23/3675 , H01L23/42 , H01L23/5389 , H01L24/24 , H01L2223/6677 , H01L2224/16225 , H01L2224/18 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/73259 , H01L2224/73267 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/1423 , H01L2924/15311 , H01L2924/16152 , H01L2924/351 , H01L2924/00
摘要： An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
摘要翻译：本发明的一个实施例是制造金属互连的技术。将第一金属迹线印刷在附接到封装中的散热器的基板或空腔的管芯上，以将第一金属迹线电连接到基板中的电源触点。设备安装在第一个金属轨迹上。当封装电源时，该设备从基板接收电力。

9. 发明申请

US20070090517A1 Stacked die package with thermally conductive block embedded in substrate 审中-公开
标题翻译：具有嵌入基板的导热块的堆叠管芯封装
公开(公告)号：US20070090517A1
公开(公告)日：2007-04-26
申请号：US11243809
申请日：2005-10-05
申请人： Sung-won Moon , Devendra Natekar , Chia-pin Chiu
发明人： Sung-won Moon , Devendra Natekar , Chia-pin Chiu
IPC分类号： H01L23/34
CPC分类号： H01L23/3128 , H01L21/563 , H01L23/481 , H01L25/0657 , H01L2224/05001 , H01L2224/05009 , H01L2224/05548 , H01L2224/13025 , H01L2224/16 , H01L2224/73203 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2225/06589 , H01L2924/00014 , H01L2924/19041 , H01L2224/05599 , H01L2224/05099
摘要： Disclosed are embodiments of a stacked die package including a thermally conductive block disposed in the substrate. The die stack may include a lower die thermally coupled with the conductive block and one or more upper die disposed on the lower die. The upper die may be electrically interconnected to one another and with the lower die by a number of thru-vias, and the die stack may also be electrically coupled with the substrate. Other embodiments are described and claimed.
摘要翻译：公开了包括设置在基板中的导热块的堆叠管芯封装的实施例。管芯堆叠可以包括与导电块热连接的下模和设置在下模上的一个或多个上模。上模可以彼此电互连并且通过多个通孔与下模电连接，并且管芯堆叠也可以与衬底电耦合。描述和要求保护其他实施例。

10. 发明申请

US20070001266A1 Integrated circuit die containing particle-filled through-silicon metal vias with reduced thermal expansion 有权
标题翻译：集成电路管芯包含具有减少的热膨胀的颗粒填充的通过硅的金属通孔
公开(公告)号：US20070001266A1
公开(公告)日：2007-01-04
申请号：US11174125
申请日：2005-06-30
申请人： Leonel Arana , Michael Newman , Devendra Natekar
发明人： Leonel Arana , Michael Newman , Devendra Natekar
IPC分类号： H01L29/40 , H01L21/44
CPC分类号： H01L21/76898 , H01L21/2885 , H01L23/481 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/11 , H01L2224/11424 , H01L2224/11462 , H01L2224/1147 , H01L2224/13009 , H01L2224/13216 , H01L2224/13224 , H01L2224/13239 , H01L2224/13244 , H01L2224/13247 , H01L2224/13284 , H01L2224/13384 , H01L2224/13386 , H01L2924/00014 , H01L2924/0002 , H01L2924/01322 , H01L2924/12033 , H01L2924/14 , H01L2924/0105 , H01L2224/05552 , H01L2924/00
摘要： A method, apparatus and system with an electrically conductive through hole via of a composite material with a matrix forming a continuous phase and embedded particles, with a different material property than the matrix, forming a dispersed phase, the resulting composite material having a different material property than the matrix.
摘要翻译：一种具有导电通孔通孔的方法，装置和系统，其具有形成连续相的基质的复合材料的导电通孔，并且具有与基质不同的材料性质的嵌入的颗粒，形成分散相，所得复合材料具有不同的材料属性比矩阵。

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